JP2000284748A - Driving device for alternating-current type plasma display panel and alternating-current type plasma display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the light-shade contrast on a screen. SOLUTION: A luminance level decision circuit 20 decides whether or not the black level of a display image is lighter than specific lightness according to the luminance signal of a display image of one picture. When the black level is lighter, a sequence control circuit 18 generates and outputs a sequence control signal for controlling the number of maintaining discharge pulses in a specific subfield among multiple subfields in one field. A driving sequence generating circuit 16A increases or decreases only the number of the maintaining discharge pulses of the specific subfield according to the sequence control signal without varying the total number of maintaining discharge pulses of multiple subfields in one field.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AC plasma display device, and more particularly to a driving technique for a plasma display panel (hereinafter, also referred to as a PDP) for performing gradation display.

[0002]

2. Description of the Related Art FIG. 7 is a partial perspective view for explaining a structure of a surface discharge type AC PDP which is one of the conventional AC type plasma displays disclosed in, for example, Japanese Patent Laid-Open No. 10-3281. It is. The surface discharge type PDP 21 shown in FIG. That is, a sustain electrode 104 as the first electrode X and a scanning electrode 105 as the second electrodes Y1 to Yj are formed on the front glass substrate 102 as a display surface in parallel with each other. , 10
5, a dielectric layer 106 is formed on the substrate 102, and a protective layer 107 is further formed on the layer 106. On the other hand, on a rear glass substrate 103 facing the front glass substrate 102, a third electrode disposed in a direction perpendicular to the sustain electrodes 104 and the scan electrodes 105 is provided.
The address electrodes 108 are formed as the electrodes A1 to Ak.
08 and a partition 110 is formed in parallel with the partition 1.
A phosphor 109 is attached on the side surface of the substrate 10, on the address electrode 108, and on the rear glass substrate 103.

Further, an arbitrary scanning electrode Yj and an address electrode A
The discharge electrodes are defined at the intersections with the scan electrodes Y1 to Yj so that the address selection of lighting or extinguishing can be performed for each of the defined discharge cells.
And the address electrodes A1 to Ak are insulated and independent from each other.

FIG. 8 is a block diagram showing a conventional driving device for displaying an image on the PDP 21 shown in FIG. 8, a video signal 10 is input to a video signal processing circuit 11, separated into a luminance signal and a chrominance signal by the video signal processing circuit 11, and thereafter, converted into an analog-digital conversion circuit (hereinafter referred to as an A / D circuit). ) 13 is input. The video signal 10 is also supplied to the sync separation circuit 12.
And outputs a vertical synchronizing signal and a horizontal synchronizing signal which are used as references for the operation of the control circuit 15. Further, the control circuit 15 writes the RGB signals digitally converted by the A / D circuit 13 into and out of the frame memory 14. In addition, the control circuit 1
5 also controls the drive sequence generation circuit 16 for driving the PDP 21, and the drive sequence generation circuit 16 generates a sequence for driving the PDP 21 by this control. As a result, the drive sequence generation circuit 16
The signals output from the scan driver 22 are respectively
Input to the sustain driver 23 and the address driver 24,
Each of the driver units 22 to 24 generates and outputs a driving pulse of the PDP 21 according to the input signal and the high voltage.
However, the address driver 24 includes the frame memory 14
Accordingly, a data signal for generating an address pulse in a writing period is also input.

Next, an AC type plasma display device is described.
A gradation display method will be described. FIG. 9 shows a case where gradation display is performed.
It is a block diagram of one field of the case. Here, one feel
Is the time required to display one picture on the screen.
NTSC (National Television System Committe
In the case of e), it is equivalent to about 16.7 msec (60 Hz)
I do. In FIG. 9, the vertical direction is the first and second electrodes X,
A line in the row direction consisting of Y1 to Yj,
The flow between them is shown. One field consists of multiple subfields
For example, 256 gradations (2⁸Gradation) display
Is performed, as shown in FIG. 9, the first subfield
To the eighth subfield SF1 to SF8
Will have. Allows gradation display of each subfield
In order to achieve the same performance, the sustain discharge pulse for each sustain discharge period ST
The number of fields differs for each subfield, for example, the first subfield.
The light emission / non-light emission in field SF1 is displayed as a binary number at the bottom.
Defined as the least significant bit (called LSB)
The minimum number of units is 1 (2 ⁰). Therefore, the second
Subfield SF2 and third subfield SF3
Light emission and non-light emission at the second bit and the third bit, respectively.
And the number of sustain discharge pulses is 2 (2¹)
And 4 (2^Two). Then, the eighth subfield S
F8 is the most significant bit in binary notation (called MSB)
Where the number of sustain discharge pulses is the largest, 128
(2⁷). As described above, the data of each subfield
The number of sustaining discharge pulses is arranged according to the power of 2 as described above.
In this way, all sub-features from 0 with no sustain discharge emission
255 (2⁰+2¹+2^Two+2^Three+2
^Four+2^Five+2⁶+2⁷256) gradation display up to
You. In FIG. 9, each subfield is deleted.
The last period ET, the write period WT, and the sustain discharge period ST
In chronological order.

FIG. 10 is a timing chart showing each drive waveform in a certain subfield disclosed in, for example, Japanese Patent Application Laid-Open No. 10-3281. here,
The application of the priming pulse during the erasing period ET will be mainly described, and the subsequent detailed description of the discharge light emission operation is described in detail in JP-A-10-3281. I will.

A sustain driver pulse shown in FIG. 10A is applied from a sustain driver 23 shown in FIG. 8 to a sustain electrode 104 which is a first electrode X shown in FIG. 7, and a scan electrode 105 which is a second electrode Y shown in FIG. Similarly, the scan driver pulse shown in FIG. The write driver pulse shown in FIG. 10C is applied to the address electrode 108 as the third electrode in FIG.

The erasing period (ET) provided in each subfield is a period in which all the cells of the AC type plasma display panel are in the same state, and as shown in FIG. The sustain electrode 10 of FIG.
4 is applied. The voltage V of the priming pulse 31 (P
Since p) is set to be equal to or higher than the discharge starting voltage between the scan electrode 105 and the sustain electrode 104 in FIG. 7, all the cells can be made to emit light regardless of the emission / non-emission of the immediately preceding subfield. When the priming pulse 31 is applied, a first voltage is generated between the X and Y electrodes, and a large amount of wall charges are generated on the surface of the protective layer 107 in FIG. Thereafter, when the priming pulse 31 falls, an electric field due to wall charges remains between the X and Y electrodes, and this electric field is large, and the discharge can be started again by itself. However, since there is no externally applied voltage, electrons and ions generated by this discharge are X, Y
Neutralizes and disappears without being attracted to the electrode. Erasing is performed in this manner.

The writing period (WT) provided in each subfield is a period for controlling the presence / absence of wall charge of each cell by selecting a matrix of row electrodes and column electrodes of an arbitrary cell on the screen. is there. As shown in FIG. 10B, a negative scanning pulse 36 is sequentially applied to the scanning electrodes Y1 to Yj, and the address electrode A1 is applied in accordance with the display data.
By applying a positive address pulse 38 to .about.Ak, a second voltage is generated between the address electrodes A1 to Ak and the scan electrodes Y1 to Yj to generate a write discharge.

Here, the first voltage is a potential difference between the sustain electrode X and the scan electrode Yj during the erasing period.
According to 0 (a), V (Pp) = (first voltage). Similarly, the second voltage is a potential difference between the address electrode Ak and the scanning electrode Yj during the writing period, and is V (Ap) -V (Sc
p) = (second voltage).

After the scanning of one entire screen is completed,
The transition to the sustain discharge period (ST) occurs in any of the subfields. In the sustain discharge period, only the cells having wall charges during the write period perform the sustain discharge. In the cell selected in the writing period, the sustain discharge pulse 33 is alternately applied between the sustain electrode X and the scan electrode Yj in the sustain discharge period, and the sustain discharge occurs. The amount of light emitted by the sustain discharge is controlled by the number of sustain discharge pulses, thereby enabling a gradation display of a display image.

As described above, one of the features of the AC plasma display device is that the application of the plying pulse during the erasing period can be increased. That is, the priming pulse has a function of enabling all cells to emit light irrespective of light emission / non-light emission of the immediately preceding subfield, and also has a priming (seeding) effect. This is described in detail in Japanese Patent Application Laid-Open No. Hei 10-3281, but if a small amount of charged particles generated by the priming pulse remain, these charged particles have a function of ensuring discharge in the next writing. . Since this kind of fire effect lasts for a long time, all subfields SF1 in one field
There is no need to have a priming pulse in SF8. For example, as shown in FIG. 11, of the eight subfields SF1 to SF8 belonging to one field, only three subfields having a priming pulse may be set. FIG. 11A shows sustain driver pulses in the first to fourth subfields SF1 to SF4, and FIG. 11B shows the fifth subfield SF.
The sustain driver pulses in the fifth to eighth subfields SF8 are shown.

As described above, the erasing period (ET), the writing period (WT), and the sustain discharge period (ST) are arranged in chronological order for each subfield.
The driving waveforms as shown in FIG.
Below, how is generated in
This will be described with reference to FIG. As shown in the drawing, a pulse generation circuit is independently provided for each of the erasing period, the writing period, and the sustaining discharge period, and each pulse generation circuit is a switch 4 controlled by the timing control circuit 48.
7 is selected. That is, in the erasing period (ET), there is either a case where there is a priming pulse or a case where there is no priming pulse.
1), the output signal of the priming pulse generation circuit 41 and the output signal of the
Choose by. On the other hand, the writing period (W
In T), as shown in FIGS. 10A and 10B, the pulse 36 must be generated in the same manner regardless of the subfield.
Is directly input to the switch 47 and output. Further, in the sustain discharge period, the number of sustain discharge pulses differs for each subfield. Therefore, the sustain discharge generating circuit 44 actually includes the sustain discharge pulse generating circuit 44a (the number of pulses 2 ⁰ ) for the first subfield SF1. To the sustain discharge pulse generation circuit 44h (pulse number 2 ⁷ ) for the eighth sub-field SF8, and each circuit 44a
To 44h are selected by the switch 46 for each corresponding subfield, and the selected signal is output via the switch 47. Thus, a plurality of subfields existing in one field are respectively generated.

As described above, there are subfields in which a priming pulse exists and subfields in which no priming pulse exists during the erasing period (ET). As described above, the priming pulse causes all cells to emit light at once. Therefore, there is a problem that the screen luminance increases, and the number of priming pulses in one field is reduced as much as possible to suppress the luminance increase. However, since the priming pulse also has a pilot effect, the number of priming pulses cannot be made completely zero. For this reason, it is necessary to discharge by a priming pulse at least once in one field.

[0015]

The driving device of the conventional plasma display device is configured as described above.
Since the priming pulse is applied once or more than once in one field, even in a black signal of zero luminance, the luminance corresponding to the number of times the priming pulse is applied is present, and the actual contrast on the display surface is reduced. descend.
For this reason, when the same image information is input to the plasma display device and another display device (for example, a CRT color television) and the two display screens are compared with each other, the contrast of light and dark in the display screen of the plasma display device is changed to the television. Is worse than that of other video equipment. In particular, when a signal that is entirely bright and has a relatively narrow dynamic range is displayed by the plasma display device, the brightness of the displayed image becomes less clear.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and a plasma capable of improving the contrast of a displayed image even when an image signal which is bright and has a narrow dynamic range as a whole is input. It is an object to provide a display device and a driving device thereof.

[0017]

The invention according to claim 1 is
One field is composed of n (n is an integer of 2 or more) subfields, and each of the n subfields has at least a write period and a sustain discharge period, and in the sustain discharge period of each subfield, A driving device used for an AC type plasma display panel that forms a display image of the one field by applying a different number of sustain discharge pulses to a panel electrode for each of the subfields, wherein Based on the image information signal, it is determined whether or not the brightness of the darkest part of the display image is brighter than a predetermined brightness. If it is determined that the brightness is bright, the n which constitutes the one field is determined.
If the number of sustain discharge pulses in at least one of the first to (i-1) th (2 ≦ i ≦ n) subfields is not bright, among the subfields, When the determination is made, the number of sustain discharge pulses is set to be greater than the number of sustain discharge pulses set for the subfield.

According to a second aspect of the present invention, there is provided the AC plasma display panel driving device according to the first aspect,
When it is determined to be bright, the number of sustain discharge pulses in at least one of the i-th subfield to the n-th subfield among the n subfields constituting the one field is determined. When it is determined that the sub-field is not bright, the number of sustain discharge pulses is reduced from the number of sustain discharge pulses set for the sub-field, and at least one of the i-th to n-th sub-fields is reduced. The sustain discharge pulse number decrease and the first subfield to the (i)
-1) The number of sustain discharge pulses in at least one subfield of the first subfield is equal to the increase in the number of sustain discharge pulses.

According to a third aspect of the present invention, in the AC plasma display panel driving device according to the first or second aspect, the image information signal emits light in any of the n subfields. The signal is a signal that provides image bit information that indicates

According to a fourth aspect of the present invention, there is provided the AC plasma display panel driving device according to any one of the first to third aspects.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention judges the degree of lightness and darkness in a display image of one frame, and when the luminance of the darkest part is higher than a predetermined luminance, a plurality (n: n) belonging to one field is determined. (Integral> 1) without increasing the number of sustain discharge pulses in a predetermined plurality of (at least two) subfields, while decreasing the number of sustain discharge pulses in the other plurality (at least two). It has a feature in controlling.

Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. In the following drawings, the same reference numerals as those in the above-described drawings indicate the same or corresponding parts as those in the related art.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of an AC type plasma display apparatus 100 according to the present embodiment.
1 and a driving device for the PDP 21. In each code, the characteristic portions 16A, 18 and 20 indicate the following, respectively.
First, reference numeral 20 denotes a luminance level determination circuit,
In response to the input of 0, the video signal processing circuit 11
Is divided into a luminance signal and a chrominance signal, and one display screen (1
When the luminance signals of the display image for the frame) are sequentially output to the luminance level determination circuit 20, the circuit 20 determines the darkest part of the display image based on the luminance signal (corresponding to the image information signal of the display image). Alternatively, a level (black signal) having the lowest luminance is detected, it is determined whether or not the detected level is brighter than a level indicating a predetermined brightness, and a result of the determination is output as a determination signal. Reference numeral 18 denotes a predetermined subfield (at least two subfields of eight subfields SF1 to SF8 in one field) (see FIG. 9) in accordance with the determination signal output from the luminance level determination circuit 20. This is a sequence control circuit that generates and outputs a sequence control signal for enabling the number of sustain discharge pulses to be changed in the target). That is, the circuit 18 has a function of generating the change command when the determination signal indicates a bright result, and has information on the number of the subfield in which the number of sustain discharge pulses should be changed. . Further, 16A is a drive sequence generation circuit, and only when the sequence control signal gives a change command,
It has a function of increasing or decreasing the number of sustain discharge pulses in the predetermined sub-field from the number set during normal operation.

FIG. 2 is a block diagram schematically showing the internal structure of the drive sequence generation circuit 16A of FIG.
As shown in FIG. 2, the circuit 16A includes an address driver drive sequence generation circuit 16A1 and a scan driver drive sequence generation circuit 1 corresponding to the address driver 24, the scan driver 22, and the sustain driver 23 in FIG.
6A2 and sustain driver driving sequence generation circuit 1
6A3, of which the scanning driver driving sequence generator 16A2 and the sustain driver driving sequence generator 16A3 are characteristic parts having a configuration different from that of the prior art. However, both parts 16A2, 16A
3 has the same circuit configuration except that one of the circuit units 16A2 does not need to generate a priming pulse.
4 shows an example of the internal configuration of A3. Further, the circuit 16A
Has first and second input terminals IT1 and IT2, and first to third output terminals OT1 to OT3 connected to the drivers 24, 22, and 23, respectively.

Although various structures have been devised for the surface discharge type AC PDP 21 shown in FIG. 1, a typical structure shown in FIG.
Incorporated as the structure of P21. Hereinafter, the point of view in the present embodiment will be described first.

The waveform of the luminance signal for one screen output to the luminance level determination circuit 20 generally has various shapes, but is roughly classified into three. That is, (i) the luminance signal of each part of the display screen is uniformly distributed from the dark area to the bright area, and (ii) the luminance signal of each part of the display screen is previously determined as shown in FIG. (Not shown), which has only a portion exceeding a predetermined luminance signal (also referred to as a predetermined determination level or test level) 51, which is generally bright and has a narrow dynamic range, or (iii) the entirety. It is roughly divided into those that are dark and have a narrow dynamic range. Here, when a display image (video image) whose luminance signal has a waveform of the type (ii) is input to the AC plasma display device 100, the contrast is improved when the display image is displayed on the PDP 21. Handle.

Now, the display image signal becomes the optimum image data to be displayed on the plasma display panel.
When the display image signal is converted into a digital signal by the A / D circuit 13, the seventh and eighth subfields SF
7, SF8, the lowest gradation level at which image data is always determined to be present, that is, 12 for 256 gradation display.
8 (2 ⁷ ) +64 (2 ⁶ ) = 192
If the value is determined as the value of the predetermined luminance signal 51, it can be said that a signal having a narrow dynamic range of at least 192 or more when the gradation level of the image data is represented by 256 tones corresponds to the case (ii). When such a display image signal having a narrow dynamic range is displayed on a plasma display panel having a small contrast as described above, an image in which the brightness is not clearly clear is obtained.

Therefore, when the image signal as shown in (ii) above is displayed, the seventh subfield SF7 is used as a reference subfield (corresponding to the ith (2 ≦ i ≦ n) th subfield), and The number of sustain discharge pulses in at least one of the lower first to sixth subfields is set when the detected minimum luminance level of the display image is lower than the predetermined determination level 51 described above. By increasing the number of normal sustain discharge pulses
First subfield SF1 to sixth subfield SF
The dynamic range indicated by the lower six subfields up to six can be made larger than the normal dynamic range. More specifically, the fifth
Subfield SF5 and / or sixth subfield S
By increasing the number of sustain discharge pulses in F6, the total number of sustain discharge pulses from first subfield SF1 to sixth subfield SF6 is increased. As a result, the apparent dynamic range is expanded, and the contrast of the display image on the plasma display panel can be improved.

However, for example, only unilaterally increasing the number of sustain discharge pulses in the fifth subfield SF5 or the like will cause the first to eighth subfields SF1 to SF8 in a plurality of subfields forming one field.
The total number of sustain discharge pulses up to 8 also increases, and the white peak (that is, “11111111” in 8-bit gray scale)
, The brightest white information represented by) also increases.

Therefore, the same amount as the number of sustain discharge pulses increased to expand the dynamic range on the lower bit side is used for the seventh subfield SF on the upper bit side.
At least one of the seventh to eighth subfields SF8
The number of sustain discharge pulses is reduced for each of the subfields. As a result, the total number 255 of the sustain discharge pulses in one field does not change, and the white peak value does not change. That is, when comparing FIGS. 3 and 4, the level a of FIG. While the voltage value of the level a is the same as that of the level a, the darkest level (black level) of the display image falls from the level b in FIG. 3 to the level c in FIG. 4, and the contrast in the display screen increases. I do.

As described above, in the present embodiment, when displaying a bright (not dark) scene as a whole (detected by the luminance level determination circuit 20 in FIG. 1), While the part is displayed even darker, the part of the brightest level is displayed with the same brightness,
This is to improve the apparent contrast.

Next, the sustain discharge pulse control circuit (4) in the sustain driver driving sequence generation circuit 16A3 of FIG.
4, 46, 48 to 50) for controlling the number of sustain discharge pulses in the sustain discharge period of a plurality of predetermined subfields.

In the driving sequence generating circuit section 16A3 for the sustain driver in FIG. 5, the erasing period, the writing period and the sustain discharging period are made independent by the timing control circuit 48 which operates in response to the output signal of the control circuit 15 in FIG. Controlled.

Now, for example, assuming that the number of sustain discharge pulses in the fifth sub-field SF5 and the seventh sub-field SF7 are respectively increased and decreased by the same amount, the sequence generation of the fifth and seventh sub-fields SF5 and SF7 is performed. Is controlled by controlling the erase period + controlling the write period + SF
The control is to increase or decrease the sustain discharge period for 5 or SF7. Then, as described above, the control signal for switching the respective periods arranged in chronological order from the control circuit 15 is input to the timing control circuit 48,
In response to this, the circuit 48 outputs, for example, a HIGH-level pulse to the conversion circuit 49 at the start of the sustain discharge period of each subfield. Here, the above (i) or (iii)
When a display image having the waveform of (1) is input to the apparatus 100, that is, when the luminance level determination circuit 20 of FIG. 1 determines that (lowest luminance level) <(predetermined determination level 51), the sequence control circuit Numeral 18 outputs, for example, a LOW level signal to a conversion circuit (for example, an AND circuit) 49 during each sustain discharge period of the first to eighth sub-fields SF1 to SF8.
Outputs a signal (for example, a LOW level signal) for instructing the successive selection of the circuits 44a,... On the other hand, when the entire display screen is displayed as a display image signal that is bright and has a narrow dynamic range, that is, the determination circuit 20 in FIG. 1 determines that (minimum luminance level) ≧ (predetermined determination level 51). The sequence control circuit 18
Outputs a LOW level signal as usual during the sustain discharge period of the other subfields SF1 to SF4, SF6 and SF8 except the fifth and seventh subfields SF5 and SF7. SF7
For example, only during each sustain discharge period, a HIGH-level pulse is output. Thereby, the conversion circuit 49 receives the pulse of the sequence control signal and the HIGH-level pulse output from the timing control circuit 48, and
a, 44b,..., 44E,..., 44G, 44h are sequentially instructed, that is, the first to fourth, sixth, and eighth subfields SF1 to SF4, SF6, SF
In the sustain discharge period of No. 8, the LOW level signal is output to the fifth and seventh signals.
During the sustain discharge period of the subfields SF5 and SF7, for example, a HIGH-level pulse is output to the switch 50. In such a case, regarding the seventh subfield SF7, the normal sustain discharge period (the number of sustain discharge pulses is 2 ⁶ = 64) is changed to a predetermined special sustain discharge period (the number of sustain discharge pulses is G). The sequence of the entire seventh subfield SF7 can be rewritten to a desired sequence only by the control of rewriting. As mentioned above,
A signal for controlling the sustain discharge generating circuit 44 during the sustain discharge period of each subfield is input from the sequence control circuit 18 to the conversion circuit 49 (as described above, the level of the output signal of the circuit 18 is the luminance level Judgment circuit 20
Of the first to fourth, sixth, and eighth subfields SF1 to SF4, SF6, and SF8 according to the determination result of
W level, and the fifth and seventh subfields SF5 and SF5
It becomes HIGH level in SF7). Here, a circuit for generating a special sustain discharge pulse number which is not a power of 2 is a circuit 44A (pulse number A) for the first subfield SF1, a circuit 44B (pulse number B) for the second subfield, and so on. Is similarly defined as a circuit 44H (number of pulses H) for the eighth sub-field, since the total number of sustain discharge pulses in one field is not changed. Satisfies the relational expression of A + B + C + D + E + F + G + H = 255. Here, the number of sustain discharge pulses in each subfield after the change is defined as A to H, instead of fixing the number of sustain discharge pulses in each subfield after the conversion, the number is arbitrarily determined according to image information. The purpose is to be able to change.

As described above, in the sustain discharge period, the timing of the sustain discharge period is adjusted by the conversion circuit 49 based on the sequence control signal input from the sequence control circuit 18 (both input to the conversion circuit 49). Only when both signals are, for example, HIGH level, for example, HIGH
A level signal is output from the same circuit 49). By controlling the switches 50a to 50h controlled for each subfield in the sustain frequency selection switch 50, a desired subfield is conventionally (normally) controlled. A desired sustain driver pulse having a different number of sustain discharge pulses can be obtained. In the above example, the switches 50a to 50h are connected to the respective sustain discharge pulse generation circuits 44a, 44b, 44c, 44 in accordance with the level of the sequence control signal.
d, 44E, 44f, 44G, and 44i are selected, and the switch 46 sequentially selects the outputs of the switches 50a to 50h under the control of the timing control circuit 48. Thus, in the fifth subfield SF5, a desired sustain driver pulse in which the number of sustain discharge pulses is increased by a predetermined amount is obtained, and in the seventh subfield SF7, the desired sustain driver pulse in which the number of sustain discharge pulses is reduced by the predetermined amount is obtained. A driver pulse is obtained, and in the other subfields, a normal sustain driver pulse having a normal sustain discharge pulse number is obtained.

As described above, also in the generation of the scan driver pulse, the circuit section 16A2 of FIG. 2 has the same configuration as that of the circuit section 16A3 shown in FIG. 5 (however, the circuit 41 of FIG. The portions 42 and 45 are configured as, for example, switch portions that are switched to the ground electrode during the erasing period according to the output of the timing control circuit 48), so that equivalent scan driver pulses can be obtained.

(Embodiment 2) The difference between the plasma display panel driving apparatus of the first embodiment and the driving apparatus of the present embodiment is that the type of the image information signal used for judging the brightness of the displayed image. It is in. That is, in the driving device according to the first embodiment, an analog luminance signal separated from the video signal 10 is used as an image information signal of a display image on one screen, but in the driving device according to the present embodiment,
As shown in FIG. 6, the subfield bit information signal after digital conversion by the A / D circuit 13 is used as an image information signal of a display image. This point will be described in detail below.

That is, when the signal after A / D conversion is represented by an 8-bit gray scale, the ith (1 ≦ i ≦ 8) bit counting from the LSB to the MSB (including the LSB) Can be said to be information indicating whether or not to emit light in the i-th subfield SFi ("1" indicates light emission, and "0" indicates no light emission). Therefore, for example, the eighth subfield SF8 corresponding to the MSB and the MSB
Seventh subfield S corresponding to the next lower bit
An image signal in which both the bit information of F7 is “1” can be determined to be a signal that provides a bright screen.
If the information of all bits corresponding to all of the to eighth subfields SF1 to SF8 is “0”, it can be determined that the signal provides a black screen. In other words, for each digitized luminance signal, the information of each bit (“1” or “0”)
By simply determining whether or not the display screen is bright or dark, that is, whether or not the display image is a bright image with a narrow dynamic range, the present embodiment utilizes this point. It is. For example, if the bit information of the predetermined determination level is “11000000”, and if the lowest bit information in the digital signal is “11000001”, the display screen is entirely bright and has a narrow dynamic range (see the above description). (Case (ii)).

Therefore, in the driving device of the present embodiment,
The circuit 17 for determining whether the darkest part in the display image is brighter than the predetermined brightness may be configured as a digital circuit.
(It is an analog circuit that requires an operation to compare the luminance signals of the respective parts one by one to finally find the minimum level and then compare it with a predetermined level.) There is an advantage that it can be realized more easily than 20. The other circuit configurations in FIG. 6 have the same configurations as those in the first embodiment.

(Supplementary Note) In the above description, for example, 192 in decimal notation is set as the predetermined reference 51 (FIG. 3) for determining whether or not to expand the dynamic range in one screen. This is for the following reason. That is, when the above control is applied to a display image having a sufficient dynamic range, the difference between the originally black portion and the black portion whose level has been reduced due to the rearrangement of the number of sustain discharge pulses is eliminated, and the image of the black portion region can be understood. This is to prevent the problem that the image becomes harder to appear, that is, the so-called black crush. Therefore, the value of the predetermined determination level 51 may be set as appropriate as long as such a level does not cause underexposure. That is, the judgment level or the test level 51 is a level that is not applied when a luminance signal lower than this level exists in one screen.

[0041]

According to the first and fourth aspects of the present invention, the dynamic range indicated in the first to (i-1) th subfields can be increased, so that the overall brightness is high. It is possible to improve the contrast when a display image with a narrow range is displayed on the plasma display panel.

According to the second and fourth aspects of the present invention, the number of sustain discharge pulses in a predetermined subfield is controlled without changing the total number of sustain discharge pulses in n subfields in one field. As a result, it is possible to control the darkest level even darker without changing the level of the brightest part in the screen on the overall bright screen with a narrow dynamic range, thereby expanding the dynamic range of the display screen. The apparent contrast can be significantly improved.

According to the third and fourth aspects of the present invention, the brightness of the display screen is determined based on the image bit information.
The circuit configuration of the determination part can be easily realized.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a plasma display device according to a first embodiment.

FIG. 2 is a block diagram illustrating a configuration example of a drive sequence generation circuit in FIG. 1;

FIG. 3 is a waveform diagram illustrating an example of a luminance signal.

FIG. 4 is a waveform diagram showing another example of a luminance signal.

FIG. 5 is a block diagram showing a configuration example of a sustain driver driving sequence generation circuit of FIG. 2;

FIG. 6 is a block diagram illustrating a configuration example of a plasma display device according to a second embodiment.

FIG. 7 is a partially cutaway perspective view of a surface discharge type AC plasma display panel.

FIG. 8 is a block diagram showing a configuration example of a conventional plasma display device.

FIG. 9 shows one-field RGB for gradation display.
FIG. 3 is a schematic diagram for explaining a configuration of a signal.

FIG. 10 is a timing chart showing an example of a sustain driver pulse, a scan driver pulse, and a write driver pulse in a subfield.

FIG. 11 is a timing chart showing an example of a sustain driver pulse for one field.

FIG. 12 is a block diagram illustrating a configuration example of a drive sequence generation circuit according to the related art.

[Explanation of symbols]

16A drive sequence generation circuit, 17 subfield bit information determination circuit, 18 sequence control circuit, 2
0 luminance level determination circuit, 21 PDP, 33 sustain pulse, 106 dielectric layer, 107 protective layer, 10
9 phosphor layer, 110 partition.

Claims (4)

[Claims] 1. One field is n (n is an integer of 2 or more)
Subfields, each of the n subfields has at least a write period and a sustain discharge period, and a different number of sustain fields are provided for each of the subfields during the sustain discharge period of each subfield. A drive device used for an AC plasma display panel that forms a display image of the one field by applying a discharge pulse to a panel electrode, wherein a drive signal is output from the display image based on an image information signal of the display image. It is determined whether or not the brightness of the darkest part is brighter than a predetermined brightness. When it is determined that the brightness is bright, among the n sub-fields constituting the one field, the first to sub-fields are determined. The sustain discharge pulse of at least one subfield in the (i-1) th (2 ≦ i ≦ n) th subfield And wherein the increase than sustain discharge pulse number that is set for the sub-field when it is determined that there is no bright number, AC-type plasma display panel driving device. 2. The AC plasma display panel driving apparatus according to claim 1, wherein when it is determined that the screen is bright, an i-th sub-field among the n sub-fields constituting the one field. When it is determined that the number of sustain discharge pulses in at least one of the n-th subfield is not bright, the number of sustain discharge pulses is set to be smaller than the number of sustain discharge pulses set for the subfield. A decrease in the number of sustain discharge pulses in at least one of the i-th subfield to the n-th subfield and the number of sustain discharge pulses in the first to (i-1) th subfields are reduced. At least one
A drive device for an AC type plasma display panel, characterized in that the number of sustain discharge pulses in each of the subfields is equal to the increase. 3. The driving apparatus for an AC plasma display panel according to claim 1, wherein the image information signal is image bit information indicating which of the n subfields emits light. A driving device for an AC type plasma display panel, wherein 4. An AC-type plasma display device, comprising the AC-type plasma display panel drive device according to claim 1. Description: