JP2000277768A - Method of forming solar battery - Google Patents
Method of forming solar batteryInfo
- Publication number
- JP2000277768A JP2000277768A JP11082255A JP8225599A JP2000277768A JP 2000277768 A JP2000277768 A JP 2000277768A JP 11082255 A JP11082255 A JP 11082255A JP 8225599 A JP8225599 A JP 8225599A JP 2000277768 A JP2000277768 A JP 2000277768A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor substrate
- main surface
- electrodes
- contact resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Photovoltaic Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は太陽電池の形成法に
関する。[0001] The present invention relates to a method for forming a solar cell.
【0002】[0002]
【従来の技術とその問題点】太陽電池の一般的な構造を
図2に示す。図2において、1は一導電型(例えばP
型)を示す半導体基板、1aは半導体基板1の表面部分
にリン原子が高濃度に拡散したn型を呈する領域、2は
一主面側の反射防止膜、3は半導体接合部、4は裏面電
極、5は表面電極である。2. Description of the Related Art A general structure of a solar cell is shown in FIG. In FIG. 2, 1 denotes one conductivity type (for example, P
Semiconductor substrate, 1a is an n-type region in which phosphorus atoms are diffused at a high concentration in the surface portion of the semiconductor substrate 1, 2 is an antireflection film on one main surface side, 3 is a semiconductor junction, 4 is a back surface The electrodes 5 are surface electrodes.
【0003】反射防止膜2は表面電極5に相当する部分
をエッチングして形成したり、反射防止膜2上から反射
防止膜2を透過して形成する。この種の太陽電池の電極
の形成法としては、従来、真空蒸着法、メッキ法、ある
いは印刷法などが用いられている。真空蒸着法では、接
触抵抗が十分低減された電極が形成されるが、生産性が
悪く、また製造装置も高価であるという欠点を有する。The anti-reflection film 2 is formed by etching a portion corresponding to the surface electrode 5, or is formed by passing the anti-reflection film 2 from above the anti-reflection film 2. Conventionally, as a method for forming an electrode of this type of solar cell, a vacuum deposition method, a plating method, a printing method, or the like has been used. In the vacuum evaporation method, an electrode with sufficiently reduced contact resistance is formed, but it has a disadvantage that productivity is low and a manufacturing apparatus is expensive.
【0004】一方、低コストに形成できる方法としては
メッキ法や印刷法があり、現在では量産性の点から印刷
法が主流である。印刷法に用いるペーストとしては、銀
などの導電ペーストが用いられる。導電ペーストを用い
て形成した電極は、シリコンとの密着強度が強いこと、
接触抵抗が小さいこと(オーミック接触すること)、線
抵抗値が低いこと、さらに半田濡れ性が良好なことなど
の諸特性が要求される。[0004] On the other hand, there are plating methods and printing methods as methods which can be formed at low cost. At present, the printing method is the mainstream from the viewpoint of mass productivity. As the paste used for the printing method, a conductive paste such as silver is used. Electrodes formed using conductive paste have strong adhesion strength to silicon,
Various characteristics such as low contact resistance (to make ohmic contact), low wire resistance, and good solder wettability are required.
【0005】しかし、印刷法による電極は導電ペースト
を高温で焼成するので、シリコンから成る半導体基板1
と電極5との界面に酸化膜が形成されやすく、接触抵抗
の低減には限界がある。さらに、高温で焼成した電極5
自体にも酸化膜が生じるため、半田濡れ性の改善には酸
処理が必要である。However, the electrodes formed by the printing method sinter the conductive paste at a high temperature.
An oxide film is easily formed at the interface between the electrode and the electrode 5, and there is a limit in reducing the contact resistance. Furthermore, the electrode 5 fired at a high temperature
Since an oxide film is formed on itself, an acid treatment is required to improve the solder wettability.
【0006】接触抵抗を低減させる方法として、特開昭
59−168668号公報では、銀粉末と4a族あるい
は5a族の金属の炭化物や窒化物から選ばれた少なくと
も一種の金属化合物と、有機結合材と、有機溶剤と、必
要に応じて加えられるガラス粉末とからなる導電ペース
トを用いることが開示されている。しかしながら、この
方法では、蒸着電極と同等の接触抵抗を得るのは困難で
あると共に、半田濡れ性が悪いという問題がある。As a method of reducing the contact resistance, Japanese Patent Application Laid-Open No. Sho 59-168668 discloses silver powder and at least one metal compound selected from carbides and nitrides of metals of the 4a or 5a group, and an organic binder. It is disclosed that a conductive paste comprising an organic solvent, an organic solvent, and glass powder added as needed is used. However, this method has a problem that it is difficult to obtain a contact resistance equivalent to that of a vapor deposition electrode and that solder wettability is poor.
【0007】また、半田濡れ性を改善する方法として、
特開昭59−84477号公報では、アルミニウム電極
や銀電極上に無電解メッキ法で銅またはニッケルを被着
することが開示されている。しかしながら、この方法で
は、接触抵抗が大きいという問題がある。このように、
印刷法では真空蒸着法と同等の接触抵抗値と半田濡れ性
を得るのは困難であるという問題があった。As a method for improving solder wettability,
JP-A-59-84477 discloses that copper or nickel is deposited on an aluminum electrode or a silver electrode by an electroless plating method. However, this method has a problem that the contact resistance is large. in this way,
The printing method has a problem that it is difficult to obtain the same contact resistance and solder wettability as the vacuum evaporation method.
【0008】本発明はこのような従来技術の問題点に鑑
みてなされたものであり、接触抵抗と半田濡れ性が悪い
という従来の問題点を解消した太陽電池の形成方法を提
供することを目的とする。The present invention has been made in view of such problems of the prior art, and an object of the present invention is to provide a method of forming a solar cell which has solved the conventional problems of poor contact resistance and poor solder wettability. And
【0009】[0009]
【問題点を解決するための手段】上記目的を達成するた
めに、本発明に係る太陽電池の形成方法では、一導電型
を呈する半導体基板の一主面側に他の導電型を呈する半
導体不純物の拡散層を設けるとともに、この半導体基板
の両主面側に電極を接続して設ける太陽電池の形成方法
において、前記半導体基板の一主面側の電極として銀ペ
ーストを塗布して焼き付けた後、この電極に電解メッキ
法で銅、ニッケル、またはスズを含浸させる。In order to achieve the above object, in a method for forming a solar cell according to the present invention, a semiconductor substrate exhibiting another conductivity type is provided on one principal surface side of a semiconductor substrate exhibiting one conductivity type. In the method for forming a solar cell, in which electrodes are connected to both main surfaces of the semiconductor substrate, a silver paste is applied and baked as an electrode on one main surface of the semiconductor substrate. This electrode is impregnated with copper, nickel or tin by electrolytic plating.
【0010】このように形成すると、半導体基板と電極
との界面の接触抵抗が改善され、接触抵抗と半田濡れ性
の良好な電極を安価に形成できる。つまり、電極の表面
には電解メッキ処理で銅、ニッケル、またはスズなどが
被着されて半田濡れ性は当然改善されるが、電極内部に
わたってこれらの金属を含有させ、焼成電極内部を稠密
化することにより接触抵抗も改善される。With this structure, the contact resistance at the interface between the semiconductor substrate and the electrode is improved, and an electrode having good contact resistance and good solder wettability can be formed at low cost. In other words, copper, nickel, tin or the like is deposited on the surface of the electrode by electrolytic plating to improve the solder wettability, but these metals are contained throughout the inside of the electrode to densify the inside of the fired electrode. This also improves the contact resistance.
【0011】[0011]
【発明の実施の形態】以下、本発明を添付図面にもとづ
き詳細に説明する。図1は本発明の太陽電池素子の形成
方法を示す断面図である。まず、半導体基板1を用意す
る(図1(a)参照)。この半導体基板1は、単結晶ま
たは多結晶シリコンなどからなる。この半導体基板1
は、ボロン(B)などのp型半導体不純物を1×1016
〜1018atoms/cm3 程度含有し、比抵抗1.5
Ωcm程度の基板である。単結晶シリコン基板の場合は
引き上げ法などによって形成され、多結晶シリコン基板
の場合は鋳造法などによって形成される。多結晶シリコ
ン基板は、大量生産が可能で製造コスト面で単結晶シリ
コン基板よりも有利である。引き上げ法や鋳造法によっ
て形成されたインゴットを300〜500μm程度の厚
みにスライスして、10cm×10cmもしくは15c
m×15cm程度の大きさに切断して半導体基板とす
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing a method for forming a solar cell element of the present invention. First, a semiconductor substrate 1 is prepared (see FIG. 1A). This semiconductor substrate 1 is made of single crystal or polycrystalline silicon. This semiconductor substrate 1
Is to add 1 × 10 16 p-type semiconductor impurities such as boron (B).
About 10 18 atoms / cm 3 , specific resistance 1.5
The substrate is about Ωcm. In the case of a single crystal silicon substrate, it is formed by a pulling method or the like, and in the case of a polycrystalline silicon substrate, it is formed by a casting method or the like. Polycrystalline silicon substrates can be mass-produced and are more advantageous than single-crystal silicon substrates in terms of manufacturing cost. An ingot formed by a pulling method or a casting method is sliced into a thickness of about 300 to 500 μm, and 10 cm × 10 cm or 15 c
The semiconductor substrate is cut into a size of about mx 15 cm.
【0012】次に、半導体基板1を拡散炉中に配置し
て、オキシ塩化リン(POCl3 )などの中で加熱する
ことによって、半導体基板1の表面部分にリン原子を拡
散させてn型を呈する領域1aを形成し、半導体接合部
3を形成する(図1(b)参照)。このn型を呈する領
域1aは0.2〜0.5μm程度の深さに形成され、シ
ート抵抗が40Ω/□以上になるように形成される。こ
の熱拡散で、半導体基板1の外表面全体にn型を呈する
領域1aとリン原子を含むリンガラス層(不図示)が、
半導体基板1の一主面側のn型を呈する領域1aのみを
残して他の部分は、フッ酸と硝酸を主成分とするエッチ
ング液に浸漬けして除去した後、純水で洗浄する(図1
(c))。Next, the semiconductor substrate 1 is placed in a diffusion furnace and heated in phosphorus oxychloride (POCl 3 ) or the like to diffuse phosphorus atoms into the surface of the semiconductor substrate 1 so that n-type is formed. A region 1a is formed, and a semiconductor junction 3 is formed (see FIG. 1B). The n-type region 1a is formed at a depth of about 0.2 to 0.5 μm and has a sheet resistance of 40Ω / □ or more. Due to this thermal diffusion, an n-type region 1 a and a phosphorus glass layer (not shown) containing phosphorus atoms are formed on the entire outer surface of the semiconductor substrate 1.
The remaining portion except for the n-type region 1a on one main surface side of the semiconductor substrate 1 is removed by dipping in an etching solution containing hydrofluoric acid and nitric acid as main components, and then washed with pure water (FIG. 1
(C)).
【0013】次に、半導体基板1の一主面側に反射防止
膜2を形成する(図1(d)参照)。この反射防止膜2
はたとえば窒化シリコン膜などからなりシランとアンモ
ニアとの混合ガスを用いたプラズマCVD法などで形成
される。この反射防止膜2は、半導体基板1の表面で光
が反射するのを防止して、半導体基板1内に光を有効に
取り込むために設ける。そして、この反射防止膜2は電
極に相当する部分をエッチングした上でペーストを塗布
して焼成する。もしくはこの反射防止膜2上にペースト
を直接塗布して焼成する。塗布と焼成においては裏面電
極材料4を塗布して乾燥した後、表面電極材料5を塗布
して乾燥する。この電極材料4、5は銀粉末と有機ビヒ
クルにガラスフリットを銀100重量部に対して0.1
〜5重量部添加してペースト状にしたものをスクリーン
印刷法で印刷して600〜800℃で1〜30分程度焼
成することで焼き付けられる。このガラスフリットは、
PbO、B2 O3 、SiO2 のうち少なくとも一種を含
む軟化点が500℃以下のものなどからなる。Next, an antireflection film 2 is formed on one main surface side of the semiconductor substrate 1 (see FIG. 1D). This antireflection film 2
Is formed of, for example, a silicon nitride film by a plasma CVD method using a mixed gas of silane and ammonia. The antireflection film 2 is provided to prevent light from being reflected on the surface of the semiconductor substrate 1 and to effectively take in light into the semiconductor substrate 1. The antireflection film 2 is formed by etching a portion corresponding to an electrode, applying a paste, and firing the paste. Alternatively, a paste is directly applied on the antireflection film 2 and baked. In the application and baking, after the back electrode material 4 is applied and dried, the front electrode material 5 is applied and dried. The electrode materials 4 and 5 were prepared by adding glass frit to silver powder and an organic vehicle in an amount of 0.1 to 100 parts by weight of silver.
The paste is added by about 5 parts by weight, and the paste is printed by a screen printing method and baked at 600 to 800 ° C. for about 1 to 30 minutes. This glass frit is
It is made of a material having a softening point of at least 500 ° C. containing at least one of PbO, B 2 O 3 and SiO 2 .
【0014】その後、CuSO4 (5水塩)、硫酸、お
よび光沢剤などから成る銅メッキ液に浸漬して、素子1
cm2 あたり0.03mAの直流電流を20分間通電す
る。一主面側と他の主面側に形成された電極をマイナス
側、金属銅などをプラス側にして通電する。このような
電解メッキを行うと、メッキ金属が電極の表面に被着す
るとともに、電極内部にも含浸する(図1(f))。し
たがって、電極内部のポーラスな部分にこれら金属が含
浸され稠密化される。メッキ液としては上記CuSO4
(5水塩)に代えて、塩化ニッケル、塩化スズなどを用
いてもよい。光沢剤は必要に応じて添加すればよい。Thereafter, the element 1 was immersed in a copper plating solution comprising CuSO 4 (pentahydrate), sulfuric acid, a brightener, and the like.
A DC current of 0.03 mA per cm 2 is applied for 20 minutes. The electrodes formed on one main surface side and the other main surface side are energized with the negative side and metal copper or the like on the positive side. When such electrolytic plating is performed, the plating metal adheres to the surface of the electrode and impregnates the inside of the electrode (FIG. 1 (f)). Therefore, these metals are impregnated into the porous portion inside the electrode and are denser. As the plating solution, the above CuSO 4
Nickel chloride, tin chloride or the like may be used instead of (pentahydrate). The brightener may be added as needed.
【0015】[0015]
【実施例】抵抗1.5Ωcmのシリコン基板内の一主面
側に、リン(P)を1×1017atoms/cm3 拡散
させて厚み850Åの窒化シリコン膜を形成した後、銀
100重量部に対してガラスフリットを3重量部含有し
た銀粉末と有機ビヒクルから成る銀ペーストを印刷して
750℃で15分間焼き付けた後、CuSO4 (5水
塩)64g/リッター、硫酸40ml/リッター、光沢
剤5ml/リッターの銅メッキ液内で素子1cm2 あた
り0.03mAの直流電流を20分間通電した。EXAMPLE A phosphorous (P) was diffused at 1 × 10 17 atoms / cm 3 on one principal surface side of a silicon substrate having a resistance of 1.5 Ωcm to form a silicon nitride film having a thickness of 850 ° and then 100 parts by weight of silver After printing a silver paste consisting of a silver powder containing 3 parts by weight of glass frit and an organic vehicle and baking at 750 ° C. for 15 minutes, CuSO 4 (pentahydrate) 64 g / liter, sulfuric acid 40 ml / liter, gloss A direct current of 0.03 mA per cm 2 of the device was applied for 20 minutes in a copper plating solution of 5 ml / liter of the agent.
【0016】比較のために通電しなかったとき、窒化物
を印刷ペーストに添加したとき、および線抵抗の影響を
確認するために二層印刷を行ったものを用意した。得ら
れた電気特性を表1に示す。For comparison, two-layer printing was performed when no current was supplied, when a nitride was added to the printing paste, and in order to confirm the effect of line resistance. Table 1 shows the obtained electrical characteristics.
【0017】[0017]
【表1】 [Table 1]
【0018】表1から明らかなように、銅メッキ処理を
行ったものでは、電流密度30.1mA/cm2 、電圧
0.582V、FF0.782、変換効率13.7%が
得られた。一方、銅メッキ処理を行わなかったもので
は、電流密度30.4/cm2、電圧0.580V、F
F0.730、変換効率12.87%、二層印刷したも
のでは、電流密度30.2/cm2 、電圧0.580
V、FF0.731、変換効率12.80%、窒化物と
してTiNを前記ペーストに重量比で10%を添加した
ものでは、電流密度30.3/cm2 、電圧0.580
V、FF0.740、変換効率13.00%となった。
これより銅メッキ処理による接触抵抗の低減の効果が確
認された。As is clear from Table 1, in the case of copper plating, a current density of 30.1 mA / cm 2 , a voltage of 0.582 V, an FF of 0.782 and a conversion efficiency of 13.7% were obtained. On the other hand, when the copper plating was not performed, the current density was 30.4 / cm 2 , the voltage was
F0.730, conversion efficiency 12.87%, two-layer printing, current density 30.2 / cm 2 , voltage 0.580
V, FF 0.731, conversion efficiency 12.80%, and a paste obtained by adding 10% by weight of TiN as a nitride to the paste has a current density of 30.3 / cm 2 and a voltage of 0.580.
V, FF 0.740, and conversion efficiency 13.00%.
Thus, the effect of reducing the contact resistance by the copper plating treatment was confirmed.
【0019】[0019]
【発明の効果】以上詳細に説明したように、本発明に係
る太陽電池の形成方法によれば、半導体基板の一主面側
の電極として銀ペーストを塗布して焼き付けた後、この
電極に電解メッキ法で銅、ニッケル、またはスズを含浸
させることから、高温で焼成された印刷電極に電解めっ
きが施されることにより、電極が稠密になり、接触抵抗
が大幅に改善できるので、光変換効率が大幅に向上す
る。しかも半田濡れ性についても改善され、後工程での
配線が容易になる。As described above in detail, according to the method for forming a solar cell according to the present invention, a silver paste is applied and baked as an electrode on one main surface side of a semiconductor substrate, and then the electrode is applied to the electrode. Since copper, nickel, or tin is impregnated by the plating method, the printed electrodes fired at a high temperature are subjected to electrolytic plating, so that the electrodes become denser and the contact resistance can be greatly improved. Is greatly improved. In addition, the solder wettability is also improved, and wiring in a later step is facilitated.
【図1】本発明に係る太陽電池の形成方法の一実施形態
を示す図である。FIG. 1 is a view showing one embodiment of a method for forming a solar cell according to the present invention.
【図2】従来の太陽電池を示す図である。FIG. 2 is a diagram showing a conventional solar cell.
1………半導体基板、1a………n型拡散層、2………
反射防止膜、3………半導体接合部、4………裏面電
極、5………表面電極1 ... Semiconductor substrate, 1a ... N-type diffusion layer, 2 ...
Antireflection film, 3 ... Semiconductor junction, 4 ... Back electrode, 5 ... Surface electrode
Claims (1)
に他の導電型を呈する半導体不純物の拡散層を設けると
ともに、この半導体基板の両主面側に電極を接続して設
ける太陽電池の形成方法において、前記半導体基板の一
主面側の電極として銀ペーストを塗布して焼き付けた
後、この電極に電解メッキ法で銅、ニッケル、またはス
ズを含浸させることを特徴とする太陽電池の形成方法。1. A solar cell provided with a diffusion layer of a semiconductor impurity having another conductivity type on one main surface side of a semiconductor substrate having one conductivity type and electrodes connected to both main surface sides of the semiconductor substrate. In the method of forming a solar cell, after applying and baking a silver paste as an electrode on one main surface side of the semiconductor substrate, the electrode is impregnated with copper, nickel, or tin by an electrolytic plating method. Forming method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11082255A JP2000277768A (en) | 1999-03-25 | 1999-03-25 | Method of forming solar battery |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11082255A JP2000277768A (en) | 1999-03-25 | 1999-03-25 | Method of forming solar battery |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2000277768A true JP2000277768A (en) | 2000-10-06 |
Family
ID=13769349
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11082255A Withdrawn JP2000277768A (en) | 1999-03-25 | 1999-03-25 | Method of forming solar battery |
Country Status (1)
Country | Link |
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JP (1) | JP2000277768A (en) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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