JP2000275603A - Power source circuit and electro-optical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce electric power required for detecting an output voltage. SOLUTION: An output voltage detecting element 210 intermittently detects an output voltage Vout according to a 2nd signal S2, and outputs it as a detected voltage Vin. A control unit 220 compares the detected voltage Vin and a reference voltage Vref according to a 1st signal S1 and generates a control signal CTR having a pulse width according to the difference voltage. A chopper-type voltage generating part 230 generates the output voltage Vout, based on the control signal CTR. Since the 1st signal S1 is synchronized with the 2nd signal S2, an output voltage Vout can be generated based on the comparison result, corresponding to an operation period of the output voltage detecting part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a power supply circuit for supplying power with low loss, and an electro-optical device with low power consumption.

[0002]

2. Description of the Related Art In general, a linear regulator is considered to be inefficient because all the voltage difference between input and output is consumed as power transistor loss. On the other hand, in the chopper type regulator, constant voltage control is performed to change the on / off ratio of the switching transistor according to the voltage difference between the input and output, so that the loss increases in proportion to the voltage difference between the input and output. There is no. Therefore, it is said that the chopper type regulator is more efficient than the linear regulator.

In the conventional chopper type regulator, an output voltage detecting section for detecting an output voltage value and a control section for comparing the detected output voltage with a reference waveform such as a triangular wave or a sawtooth wave are used. The control unit generates a control signal having a pulse width corresponding to the comparison result, and controls on / off of the switching transistor using the control signal. For this reason, even in the almost no-load state, there is a problem that the switching transistor is turned on and off, and accordingly, a loss is generated.

Therefore, it is conceivable to vary the frequency of generation of the control signal according to the load. That is, in the case of a heavy load, the generation period of the control signal is shortened, and the switching transistor is frequently turned on and off, thereby generating an output voltage that follows a load change. It is conceivable that the loss associated with the switching operation can be reduced by lengthening the cycle of occurrence of, and reducing the number of switching operations of the switching transistor that occur per unit time.

[0005]

However, even in the case where the frequency of generation of the control signal is varied, the output voltage section always operates, so that the loss by the output voltage section always occurs. . For example, when the output voltage is divided by resistance and the divided voltage is compared, the power consumed by the resistor is lost, but as the output voltage increases, the ratio of the resistance loss to the entire power supply circuit increases. Problem.

[0006] The present invention has been made in view of such circumstances, and it is an object of the present invention to provide a power supply circuit capable of supplying power corresponding to a load with low loss, and a method of reducing power consumption. An object of the present invention is to provide an electro-optical device which achieves the above.

[0007]

In order to achieve the above object, a power supply circuit according to the present invention receives power from a power supply line and supplies an output voltage to a load from an output terminal. Output voltage detecting means for intermittently detecting, comparing means for comparing the detected voltage detected by the output voltage detecting means with a target voltage to be supplied to the load, and corresponding to an operation period of the output voltage detecting means. Output voltage generating means for generating the output voltage based on the comparison result of the comparing means.

According to the present invention, since the output voltage detecting means operates intermittently, a detection period in which the output voltage is detected and a non-detection period in which the output voltage is not detected occur alternately. For this reason, if the output voltage is controlled by the comparison result corresponding to the non-detection period, the output voltage cannot be matched with the target voltage, but the output voltage generation means generates the output voltage based on the comparison result corresponding to the detection period. Therefore, it is possible to obtain a desired output voltage. That is, since the output voltage detecting means and the output voltage generating means operate in synchronization with each other, it is possible to reduce the power consumption during the non-detection period of the output voltage detecting means while controlling the output voltage corresponding to the load fluctuation. Thereby, the loss of the entire power supply circuit can be reduced.

In this case, the output voltage detecting means includes a switching element and first and second resistance elements connected in series between the output terminal and the power supply line,
Preferably, when the switching element is turned on, the detection voltage is output from a connection point between the first and second resistance elements. According to such a configuration, it is possible to intermittently operate the output voltage detecting means by controlling on / off of the switching element.

The power supply circuit according to the present invention receives power from a power supply line and supplies an output voltage to a load from an output terminal. The output voltage detection means intermittently detects the output voltage; Output voltage storage means for storing the detection voltage detected by the output voltage detection means until the next detection timing, and updating the storage content when a new detection voltage is detected; and It is characterized by comprising comparison means for comparing a detected voltage with a target voltage to be supplied to the load, and output voltage generation means for generating the output voltage based on a comparison result of the comparison means.

According to the present invention, when the output voltage detecting means operates intermittently, the detected voltage is stored in the output voltage storing means until the next detection period. Therefore, the output voltage generation means can operate asynchronously with the output voltage detection means. Further, according to this configuration, the output voltage detecting means may always operate, or may operate intermittently.

In this case, the output voltage detecting means includes a first switching element and first and second resistance elements connected in series between the output terminal and the power supply line. When the switching element is turned on, the detection voltage is output from the connection point of the first and second resistance elements, and the output voltage storage means stores the first and second resistance elements.
One end is connected to the connection point of the
A second switching element whose off-timing is controlled at the same timing as the first switching element; and a capacitor connected to the other end of the second switching element, wherein the detection voltage is stored in the capacitor. It is desirable. According to this configuration, by controlling the on / off of the first and second switching elements, it is possible to operate the output voltage detecting means intermittently and store the detected voltage in the capacitor.

Further, the specific contents of the output voltage generating means according to the present invention include switching means which is turned on in accordance with a signal corresponding to the magnitude of the load, and when the switching means is turned on, power is stored, When the switching unit is turned off, the power supply unit includes a power storage unit that discharges stored power as the output voltage and supplies the output voltage to the load, and a comparison unit applied to the power supply circuit, based on the comparison result, It is preferable that a control unit for controlling an ON period of the switching means be provided.

In this case, the switching means is turned on according to a signal corresponding to the magnitude of the load, and
When the switching means is on, the storage means stores power, while when the switching means is off, the storage means releases power and supplies it to the load. As a result of good supply, low power consumption can be achieved. Further, the ON period of the switching means is controlled in accordance with the result of comparison between the voltage actually supplied to the load from the power storage means and the target voltage to be supplied to the load. It is also possible to make the average voltage value constant at the target voltage. In addition, such a configuration can supply a negative voltage to the load if one end of the storage means is connected to the low side, and if one end of the storage means is connected to the high side,
A positive voltage can be supplied to the load.

[0015] Further, as a specific content of the control unit according to the present invention, when the output voltage is smaller in absolute value than a target voltage to be supplied to the load, the ON period of the switching means is lengthened. On the other hand, when the output voltage is higher in absolute value than the target voltage to be supplied to the load, it is preferable to perform control so as to shorten the ON period of the switching means. According to such a configuration, it is possible to reduce the power consumption and to supply the voltage from the storage unit at a constant target voltage.

Further, an electro-optical device according to the present invention has the above-described power supply circuit, and has a plurality of pixels in which an electro-optical material is sandwiched between two opposing substrates. And a driving unit that generates a driving signal for driving the plurality of pixels based on an output voltage of a power supply circuit.

According to the present invention, the output voltage detecting means of the power supply circuit can be operated intermittently, so that the power consumed there can be reduced and the power consumption of the electro-optical device can be reduced. Can be.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment First, a power supply circuit according to a first embodiment of the present invention will be described. FIG. 1 is a block diagram showing the overall configuration of the power supply circuit 200.

As shown in the figure, a power supply circuit 200 includes an output voltage detecting section 210 for detecting a value of an output voltage Vout according to a second signal S2, and comparing a voltage detected according to a first signal S1 with a reference voltage Vref. And a control unit 22 for generating a control signal CTR having a pulse width corresponding to the comparison result.
0 and a chopper type voltage generating section 230 which has a switching transistor inside and turns on / off based on a control signal CTR to generate an output voltage Vout.

Here, the first signal S1 is a signal in which pulses are supplied at intervals according to the magnitude of the load. Specifically, when the load is high, as shown in FIG. In addition, the pulse period P1 having a constant pulse width W1 becomes longer, while the pulse period P2 becomes shorter as shown in FIG. 4 when the load is low. Such a signal can be generated when the magnitude of the load can be roughly estimated in advance by information given in advance, such as the relationship between the display pattern and the load in the liquid crystal display device, and is effective in reducing power consumption. . Otherwise, S1 is given as a signal with a constant pulse period P1.

As shown in FIGS. 3 and 4, the second signal S2 is synchronized with the first signal S1 and rises immediately before the first signal S1 rises from the L level to the H level. 1 signal S1 falls before falling from the H level to the L level. Here, the pulse width W2 of the second signal S2 is set narrower than the pulse width W1 of the first signal S1.

In such a configuration, the second signal S2
When the output voltage detector 210 operates and detects the value of the output voltage Vout during the period when
Reference numeral 20 compares the detected voltage with the reference voltage Vref to generate a control signal CTR. On the other hand, while the second signal S2 is at the L level, the output voltage detecting section 210 stops the detecting operation. Therefore, the output voltage detection section 210 consumes power only when the second signal S2 is at the H level, so that loss can be reduced.

FIG. 2 is a circuit diagram showing a detailed configuration of the power supply circuit 200. First, the output voltage detection unit 210
A p-channel transistor 211 connected in series between a voltage Vcc supply line and an output terminal out, a resistor R4,
R3, an n-channel transistor 212, and an inverter 213. The gate of the transistor 212 is supplied with the first signal S1, while the gate of the transistor 211 is connected to the inverter 21.
3, the second signal S2 is supplied.

Therefore, when the second signal S2 is at the H level, the transistors 211 and 212 are simultaneously turned on, and a current flows through the resistors R4 and R3. As a result, the line voltages of the voltage Vout and the voltage Vcc are changed to the resistances R4 and R3.
Is output as a detection voltage. On the other hand, when the second signal S2 is at the L level, the transistors 211 and 212 are simultaneously turned off, so that power is not consumed by the resistors R4 and R3. However, in this case, the output impedance of the output voltage detecting section 210 becomes a high impedance state, and the voltage Vi is output.
n cannot be output.

Next, in the control unit 220, the first signal S1 is supplied to the inverter 221 via the capacitor C1. The input terminal of the inverter 221 has a resistor R
1 is grounded. That is, the first signal S1
Is supplied to the inverter 221 via a differentiating circuit including at least the capacitor C1 and the resistor R1. Here, for convenience of explanation, the inverter 221 is used.
Is the terminal.

In the comparison circuit 222, a voltage Vin is supplied to one input terminal, and the other input terminal is connected to a supply line for the reference voltage Vref. The comparison circuit 222 outputs the voltage (Vin−Vre).
f), and is configured as, for example, a non-inverting amplifier having an operational amplifier and a resistor. For this reason,
The output voltage Vcp moves to the negative side when the voltage Vin gradually decreases and falls below the reference voltage Vref.
Conversely, when the voltage Vin rises and exceeds the reference voltage Vref, it moves to the positive side.

Note that the voltage Vout is a negative voltage, and the voltage Vin is obtained by dividing the line voltage of the voltage Vout and the voltage Vcc by the resistors R4 and R3, so that when the voltage Vout decreases (that is, the voltage Vout) When the voltage absolute value between the voltage and the ground level increases), the voltage Vin also decreases.

Next, the output terminal of the comparison circuit 222 is connected to the input terminal and the terminal of the inverter 221 via the diode D2 and the resistor R2. In a region where the terminal is more positive than the voltage obtained by adding the forward voltage of the diode D2 to the output voltage Vcp of the voltage comparison circuit 222, the diode D2
Is forward-biased, the resistance of the differentiating circuit is substantially a parallel resistance of the resistors R1 and R2, and in other regions, the diode D2 is reverse-biased. Only the resistor R1. Therefore, a substantial time constant from the voltage Vcc of the differentiating circuit to the threshold value Vth of the inverter is varied according to the output voltage Vcp of the comparing circuit 222.

Next, the output terminal of the inverter 221 is connected to the gate of the p-channel transistor 231 constituting the chopper type voltage generator 230. Here, for convenience of explanation, the output terminal of the inverter 221, that is, the gate of the transistor 231 is used as a terminal. The source of the transistor 231 is connected to the supply line for the voltage Vcc, while the drain is connected to the other end of the reactor L, one end of which is grounded. The other end of the reactor L is connected to a capacitor C via a diode D1.
2 and the output terminal out of the power supply circuit 200, and this voltage Vout is supplied to the load. Note that the other end of the capacitor C2 is grounded. Here, for convenience of explanation, the drain of the transistor 231, that is, the other end of the reactor L is a terminal.

The signal supplied to the input terminal of the inverter 221 is the first signal S1 that has passed through a differentiating circuit composed of the capacitor C1 and the resistor R1, so that the first
Instantaneously, the signal S1 transitions from the ground level GND to the voltage Vcc. As a result, the terminal voltage exceeds the threshold value Vth of the inverter 221 and the terminal voltage changes to the ground level GND.
The transistor 231 turns on. Therefore, the voltage of the drain of the transistor 231, that is, the terminal at the other end of the reactor L is substantially equal to the voltage Vcc, so that a current flows through the reactor L from the terminal to the ground, and energy is accumulated. .

On the other hand, a substantial time constant from the time when the voltage at the output terminal of the differentiating circuit reaches the threshold value Vth of the inverter 221 to the Vcc voltage of the differentiating circuit according to the output voltage Vcp of the comparing circuit 222 described above. When the voltage falls below the threshold value Vth of the inverter 221, the voltage at the terminal transitions to Vcc, so that the transistor 231 is turned off. Therefore, in reactor L,
In order to maintain the current flowing in the direction from the terminal to the ground point, the voltage is largely swinging to the negative side, and its voltage is a value obtained by subtracting the forward voltage of the diode D1 from the output terminal out voltage held by the capacitor C2. , The diode D1 becomes forward biased, and the energy stored in the reactor L moves to the capacitor C2. When all the energy stored in the reactor L moves to the capacitor C2, the current of the reactor L also becomes 0, and the diode D
1 becomes reverse bias again. The power required as the output voltage Vout of the power supply circuit 200 is supplied by the capacitor C2. Thereafter, such an operation is repeated.

Here, as described above, the time constant of the differentiating circuit varies according to the difference between the voltage Vin and the reference voltage Vref. For example, when the output voltage Vout falls below a predetermined voltage (when the absolute value of the output voltage Vout increases),
The output signal Vcp of the comparison circuit 222 moves to the negative side, and the time constant of the differentiating circuit decreases. Therefore, the voltage of the terminal attenuates from the voltage Vcc in a shorter time after the first signal S1 transitions to the H level. For this reason, the on-time of the transistor 231 is shortened, and the energy stored in the reactor L is reduced, so that the output voltage Vo
The control in the direction of increasing ut (decreasing the absolute value of the output voltage Vout) is performed.

On the other hand, when the output voltage Vout increases above a predetermined voltage, the output signal Vcp of the comparison circuit 222 moves to the positive side, and the time constant of the differentiating circuit increases. For this reason, the on-time of the transistor 202 becomes longer, so that control is performed in a direction to lower the output voltage Vout (increase the absolute value of the output voltage Vout).

That is, the terminal voltage is
Output voltage Vo according to the period exceeding the threshold value Vth of 1
ut will be controlled. Therefore, it is sufficient for the output voltage detection section 210 to detect the value of the output voltage Vout during such a period, and it is not necessary to detect the output voltage Vout in other periods.

By the way, the time constant of the differentiating circuit of this example is τ
Then, the range that the time constant τ can take is (C1R1R
2) / (R1 + R2) ≦ τ ≦ C1R1 The period during which the terminal voltage exceeds the threshold value Vth of the inverter 221 is determined by the time constant τ. Therefore, the second signal S2
Is determined so as to correspond to C1R1 at which the above time constant τ becomes the largest. Thus, at the timing for specifying the ON period of transistor 231, output voltage detection section 210 outputs
out can be reliably detected, and the output voltage detection unit 210 stops operating in an unnecessary period, so that power consumption can be reduced.

As a result of such control, that is, the line voltage of the output voltage Vout and the voltage Vcc is changed by the resistors R4 and R4.
Control is performed such that the voltage Vin divided by 3 falls within a fixed width centered on the reference voltage Vref. For this reason,
The average value of the output voltage Vout is fixed at a voltage at which the control in both directions is balanced. Therefore, the following equation is established.

Vref = Vin = (Vcc-Vout)
R3 / (R4 + R3) Therefore, the average value of the output voltage Vout is ΔVcc−
Vref · (R4 + R3) / R3}. The voltage Vout is a negative value including a sign as described above.

In the operation under a low load, as shown in FIG. 4, the pulse interval P2 of the first signal S1 is longer than the pulse interval P1 under a high load, so that the switching cycle of the transistor 202 is also reduced. Other than that, it is basically the same as when the load is high. However, because of the low load, the discharge of the capacitor C2 also proceeds slowly. Also at this low load, like at the high load,
Control for making the average value of the output voltage Vout constant is performed.

According to such a power supply circuit 200, the first
The output voltage detection unit 210 is controlled based on the second signal S2 synchronized with the signal S1 of FIG. 2, so that the power consumption of the resistors R3 and R4 can be reduced, and the loss of the power supply circuit 200 can be greatly reduced. Becomes possible. Further, if the first signal S1 can be a signal in which the interval between pulses having a constant width W1 becomes longer as the load increases, the transistor 231 turns on and off in accordance with the signal S1, so that energy can be efficiently stored in the reactor L. With it, it can be released. In particular, in an almost no-load state, the interval between pulses becomes very long and the switching frequency of the transistor 231 is reduced, so that the loss caused by switching can be reduced.
Furthermore, as a result of controlling the ON width of the transistor 231 such that the voltage Vin is stabilized at the reference voltage Vref,
It is also possible to make the voltage Vout at the output terminal constant.

<Second Embodiment> Next, a power supply circuit according to a second embodiment of the present invention will be described. This power supply circuit differs from the power supply circuit of the first embodiment shown in FIG. 2 except that the configuration of the output voltage detection unit 210 is different and the power supply circuit operates according to a third signal S3 that is asynchronous with the first signal S1. It is configured similarly.

FIG. 5 is a circuit diagram of an output voltage detector 210 'used in the power supply circuit according to the second embodiment. As shown in this figure, the output voltage detector 210 'includes a sample and hold circuit in addition to the components of the output voltage detector 210 of the first embodiment. The sample and hold circuit includes a capacitor C3 having one end grounded and the other end connected to the comparison circuit 222 of the control unit 220, and a resistor R3.
3 and an n-channel transistor 214 connected between the connection point of R4 and the other end of the capacitor C3. In addition, the gate of the transistor 214
The third signal S3 is supplied.

Here, the operation of the power supply circuit according to the second embodiment will be described with reference to FIG. As shown in this figure,
The third signal S3 is asynchronous with the first signal S1. Third
During the period when the signal S3 is at the H level, the transistors 211, 212, and 214 are turned on.
4. A current flows through R3, and the voltage Vout and the voltage Vcc
A voltage Vi obtained by dividing the line voltage by the resistors R4 and R3.
n is supplied to the capacitor C3 as a detection voltage. On the other hand, when the third signal S3 is at the L level, the transistors 211, 212 and 214 are turned off, so that no current flows through the resistors R4 and R3 and the voltage of the capacitor C3 is held. In other words, the detection voltage Vin is stored until the next detection timing by the sample-and-hold circuit, and when a new detection voltage Vin is detected, the stored content is updated.

Therefore, the control unit 220 compares the detection voltage Vin stored in the capacitor C3 with the reference voltage Vref even during the period in which the transistors 211 and 212 are off and the detection voltage Vin is not detected. , A voltage Vcp for controlling the differentiating circuit can be generated.

For this reason, the switching cycle of the transistor 231 of the chopper type voltage generator 230 (the first signal S
Assuming that Ta is the cycle of the output voltage detector 210 'and Tb is the cycle of the output voltage detector 210' (the cycle of the third signal S3), Ta <Tb can be set as in this example. For this reason, the cycle of detecting the output voltage can be made longer than in the first embodiment. Further, the pulse width W3 of the third signal S3 only needs to be long enough to charge the capacitor C3.
By appropriately setting the value of 3, the pulse width W2 of the second signal S2 described in the first embodiment can be made narrower. Therefore, according to this power supply circuit, the operation period of the output voltage detection unit 210 'can be shortened, and as a result, the loss can be further reduced. Further, as the comparison circuit 222 in the case of this configuration,
A configuration as an integrating amplifier is also possible, and the output terminal voltage V
Out can be made more accurate.

Although the inverter in the first and second embodiments has been described as a normal inverter, it may be a Schmitt trigger input. For diodes,
Although the description has been made with the ordinary diode, a Schottky diode may be used. In particular, for D1, it is desirable to use a Schottky diode having a small forward voltage in terms of efficiency.
Needless to say, D1 can be replaced with a synchronous rectifier circuit using a transistor or the like to further improve the efficiency.

Third Embodiment Next, an electro-optical device to which the power supply circuit according to the first embodiment is applied will be described.
FIG. 7 is a block diagram showing an electrical configuration of a liquid crystal display device as an example of the electro-optical device. As shown in this figure, the liquid crystal display panel 10 has i data lines X1 to X1.
At each intersection between Xi and j scanning lines Y1 to Yj, a pixel 16
Are formed. Each pixel 16 includes a liquid crystal display element (liquid crystal layer) 18 and a TFD (Thin Film Diode) element 20.
And are connected in series. In the figure, the TFD element 20 is connected to the data line side, and the liquid crystal layer 18 is connected to the scanning line side.
The configuration may be such that the TFD element 20 is connected to the scanning line side and the liquid crystal layer 18 is connected to the data line side.

Here, a detailed configuration of the liquid crystal display panel 10 will be described. FIG. 8 is a partially broken perspective view schematically showing one example. As shown in FIG. 1, the liquid crystal display panel 10 includes an element substrate 30 and an opposing substrate 32 disposed to oppose the element substrate 30. Among them, the element substrate 30
A plurality of pixel electrodes 34 are respectively arranged in a matrix on the opposing surface. Here, the pixel electrodes 34 arranged in the same column have data lines X1 to Xi extending in a strip shape in the column direction.
Are connected via the TFD elements 20 respectively. Here, when the TFD element 20 is viewed from the substrate side,
A first metal film 22, an oxide film 24 obtained by anodizing the first metal film 22, and a second metal film 26 have a metal / insulator / metal sandwich structure. For this reason,
The TFD element 20 has positive and negative bidirectional diode switching characteristics.

On the other hand, in the opposite substrate 32, the element substrate 3
The scanning lines Y1 to Yj extend in the row direction orthogonal to the data lines X1 to Xi and are arranged on the opposing surface of the pixel electrodes 34 so as to be opposite electrodes of the pixel electrodes 34.

Now, the element substrate 30 constructed as described above will be described.
The opposing substrate 32 maintains a constant gap (gap) by a sealing agent applied along the periphery of the substrate and spacers appropriately dispersed.
A TN (Twisted Nematic) type liquid crystal is sealed, whereby the liquid crystal layer 18 in FIG. 7 is formed. That is, the liquid crystal layer 18 is composed of the data line, the pixel electrode 34, and the liquid crystal located between the data line and the scanning line at the intersection of the data line and the scanning line.

In addition, the opposite substrate 32 is provided with color filters arranged in, for example, a stripe, a mosaic, a triangle, or the like according to the use of the liquid crystal display panel 10. A black matrix such as a resin material in which a metal material such as nickel or carbon or titanium is dispersed in a photoresist is provided. In addition, the element substrate 30 and the counter substrate 32
Each of the opposing surfaces is provided with an alignment film or the like that has been rubbed in a predetermined direction, and a polarizing plate corresponding to the alignment direction is provided on each back surface (both are not shown).

However, in the liquid crystal display panel 10,
The use of polymer-dispersed liquid crystal in which liquid crystals are dispersed as fine particles in a polymer eliminates the need for the above-mentioned alignment film, polarizing plate, etc., thereby increasing the light use efficiency and thus increasing the brightness of the liquid crystal display panel. And low power consumption.
When the liquid crystal display panel 10 is of a reflective type, the pixel electrode 34 is made of a metal film having a high reflectivity such as aluminum, and an SH (super homeotropic) type in which liquid crystal molecules are almost vertically aligned in the absence of a voltage. Liquid crystal or the like may be used.

The TFD element 20 is an example of a two-terminal switching element. In addition, an element using a ZnO (zinc oxide) varistor, an MSI (Metal Semi-Insulator) or the like, or two of these elements are used. Devices connected in series or parallel in the opposite direction can be applied as the two-terminal switching element.

The description returns to FIG. The scanning line signal driving circuit 110 outputs a voltage V1 supplied from the power supply circuit 210 according to a signal supplied from the driving control circuit 130,
V2, V3, V4, and V7 are selected and supplied as scanning signals to the respective scanning lines Y1 to Yj. here,
As an example of the waveform of the scanning signal, for example, a waveform shown in FIG. 9 is given. In the waveforms shown in this figure, scanning signals supplied to a certain scanning line Ym (Y1 ≦ Ym <Yj) and a scanning line Ym + 1 located next to the scanning line Ym, respectively, are shown. It is. As shown in these figures, the scanning signal is
The charge mode and the discharge mode are alternately switched for each row of the scanning lines, and when focusing on one scanning line, the mode is switched for each vertical scanning period TV. Here, when a certain scanning line is selected in the charging mode, the first one is selected.
In the second half of the horizontal scanning period, the scanning signal supplied to the scanning line is the voltage V1. As a result, the TFD element 20 becomes conductive, and a voltage corresponding to the data signal is charged in the liquid crystal layer. After a lapse of one vertical scanning period, the mode is switched to the discharge mode and a scanning line is selected. In the first half of the one horizontal scanning period, the scanning signal supplied to the scanning line is at the voltage V7. . For this reason,
Regardless of the data signal, the TFD element 20 conducts, and the liquid crystal layer is overcharged with a voltage having a polarity opposite to the voltage V1 with reference to an intermediate value between the data signals V3 and V4. Subsequently, in the latter half period, the scanning signal supplied to the scanning line becomes the voltage V2. As a result, the TFD element 20 becomes conductive, and the overcharged liquid crystal is discharged according to the data signal. The waveform of the scanning signal is
Various waveforms other than this can be applied, for example, a waveform in which only the charging mode is alternately output with the positive electrode and the negative electrode,
A waveform whose polarity is inverted every horizontal scanning period, and further, n
The polarity may be inverted every horizontal scanning period.
It is also possible to perform only frame inversion without performing inversion driving every one horizontal scanning period.

The data signal drive circuit 120 supplies a data signal to each of the data lines X1 to Xi. This data signal is defined by voltages V3 and V4 selected during a part of the scanning signal. Further, the drive control circuit 130 generates a clock signal, a control signal, and the like based on an externally supplied image signal and a synchronization signal, and controls the scan signal drive circuit 110 and the data signal drive circuit 120, respectively. . Here, the clock signal, the control signal, and the like generated by the drive control circuit 130 include the above-described clock signal that defines the timing of each scanning signal, a signal for selecting the voltage of the scanning signal, and the like. In addition, for example, as shown in FIG. 10, a region A obtained by dividing the display screen of the liquid crystal display panel 10 along the extending direction of the scanning lines is a display region.
When the display switching signal instructs the region B to be a non-display region, the drive control circuit 130 generates the first signal S1 as follows. That is, first, as shown in FIG. 11, the drive control signal 130 includes a signal a for defining a period during which the voltages V1, V2, and V7 are to be supplied to each of the scanning lines Y1 to Yj, and an area A B that goes high during the period in which the scanning lines included in
Secondly, a first signal S1 is generated by calculating a logical sum of the logical product of the logical product and a signal c obtained by dividing the signal a by an appropriate multiple.

The first signal S1 thus generated is
In the period in which the scanning line included in the display area A is selected, the interval between the pulses having a certain width becomes dense, and in the period in which the scanning line included in the non-display area B is selected, the interval between the pulses is sparse. Become. That is, the pulse interval of the first signal S1 is made dense when the number of pixels to be driven is assumed to be large, and sparse when the number of pixels to be driven is assumed to be small. Generated. Strictly speaking, the number of pixels to be driven is zero during the period in which the scanning line included in the non-display area B is selected, but even in this case, each driving circuit consumes some power. Therefore, the configuration is such that a pulse is supplied as the first signal S1.

Now, the power supply circuit 200 ′
The power supply circuit 200 according to the embodiment is basically provided with two systems having the same configuration. After the above-described voltages V1 and V7 are generated by the respective systems, the voltages V2 and V3, which are intermediate voltages thereof, are further generated. Are respectively generated. In the liquid crystal display device 100, since the voltage V4 is at the ground level, the voltages V1, V2, V3, and V7 excluding the voltage V4 are actually supplied to the scanning signal drive circuit 110, while the voltage V3 is the data level. Signal drive circuit 120
Will be supplied.

Since the voltage V1 has a positive polarity,
The system that generates the voltage V1 has a configuration in which the polarity is inverted with respect to the ground level with respect to the power supply circuit 200 according to the first embodiment. Further, as the reference voltage Vref of each system, the output terminal voltages need to be V1 and V7, respectively, so that (Vcc−V1) · R3 / (R4 + R
3) and (Vcc−V7) · R3 / (R4 + R3). The power supply circuit 210 has a voltage V
1, V2, V3, and V7 may be individually generated by four systems. When the four systems are separately generated as described above, the voltages V1 and V2 are applied to the liquid crystal display panel 10.
When compensating according to the temperature of the liquid crystal display panel 1,
The temperature of 0 may be detected by a temperature-sensitive element such as a thermistor or a diode, and the detected temperature may be converted into a voltage by a temperature / voltage conversion table, and the converted voltage may be set as a reference voltage Vref. .

As described above, the voltages V1, V2, V3, and V7 used in the scanning signal driving circuit 110 for supplying a scanning signal to the liquid crystal display panel 10 and the data signal driving circuit 120 for supplying a data signal are supplied to the power supply circuit 200 '. And the first signal S1 having a pulse interval corresponding to the number of pixels to be driven is supplied to the power supply circuit 200 ′. While the frequency increases,
When the number of pixels to be driven is small, the switching frequency of the transistor increases, so that the scanning signal driving circuit 110 and the data signal driving circuit 120 can be driven in accordance with display contents. As a result, unnecessary switching in the power supply circuit is suppressed, so that loss is reduced and power consumption is reduced.

The liquid crystal display panel 100 has been described by taking a TFD element as a switching element as an example. However, the present invention is not limited to this. One substrate is provided with scanning lines and data lines, and at each intersection thereof. The TFT (Thin FilmT) is connected to the gate to the scanning line, the source to the data line, and the drain to the pixel electrode.
ransistor (thin film transistor). In addition, without using these switching elements, S
The present invention is also applicable to a passive liquid crystal using a TN (Super Twisted Nematic) liquid crystal. Further, the present invention can be applied to a display device that performs display using various electro-optical effects, such as an electroluminescence display device in which a light emitting layer is disposed instead of a liquid crystal.

<Modifications> The present invention is not limited to the above embodiments, and for example, the following modifications are possible.

(1) In the first and second embodiments described above, the output voltage detectors 210 and 210 'have the transistors 211 and 212. However, the transistor 211 is omitted and the resistor R3 is connected to the power supply. It may be connected to the Vcc supply line. In short, it goes without saying that any means may be used as long as the current flowing through the resistors R3 and R4 is cut off according to the second or third signals S2 and S3.

(2) In the second embodiment described above,
Although the output voltage Vout is generated by the chopper type voltage generator 230, the present invention is not limited to this, and it is needless to say that a linear type voltage generator may be used.

(3) In the third embodiment described above,
Although the example in which the power supply circuit described in the first embodiment is applied has been described, it is needless to say that the power supply circuit according to the second embodiment may be applied. Further, since these power supply circuits have very little loss, they are suitable as power supplies for various portable electronic devices that operate on a secondary battery such as a mobile phone, a notebook computer, or a portable VTR.

[0065]

As described above, according to the present invention, since the configuration for detecting the output voltage can be operated intermittently, the power consumed in the power supply circuit can be kept low.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an overall configuration of a power supply circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a detailed configuration of the power supply circuit.

FIG. 3 is a waveform chart for explaining an operation of the power supply circuit under a high load.

FIG. 4 is a waveform chart for explaining an operation of the power supply circuit under a low load.

FIG. 5 is a circuit diagram of an output voltage detection unit used in a power supply circuit according to a second embodiment of the present invention.

FIG. 6 is a waveform chart for explaining the operation of the power supply circuit.

FIG. 7 is a block diagram illustrating an electrical configuration of a liquid crystal display device as an example of an electro-optical device according to a third embodiment of the invention.

FIG. 8 is a partially broken perspective view showing a configuration of a main part of a liquid crystal display panel in the liquid crystal display device.

FIG. 9 is a waveform chart showing an example of a scanning signal in the liquid crystal display panel.

FIG. 10 is a diagram for describing screen division in the liquid crystal display panel.

FIG. 11 is a diagram illustrating a process of generating a first signal in the liquid crystal display device.

[Explanation of symbols]

 Reference Signs List 10 liquid crystal display panel 100 liquid crystal display device 110 scanning signal driving circuit 120 data signal driving circuit 130 driving control circuit 200 power supply circuit 210 output voltage generating section 220 control section 221 …… Inverter 230 …… Chopper type voltage generator 231 …… Transistor 222 …… Comparison circuit L …… Reactor

Claims (7)

[Claims] 1. A power supply circuit that receives power from a power supply line and supplies an output voltage to a load from an output terminal, wherein the output voltage detection means detects the output voltage intermittently, and the output voltage detection means detects the output voltage intermittently. Detection voltage,
Comparing means for comparing a target voltage to be supplied to the load with output voltage generating means for generating the output voltage based on a comparison result of the comparing means corresponding to an operation period of the output voltage detecting means A power supply circuit, characterized in that: 2. A power supply circuit that receives power from a power supply line and supplies an output voltage from an output terminal to a load, wherein the output voltage is detected by the output voltage detection means intermittently detecting the output voltage. Output voltage storage means for storing the detected voltage until the next detection timing, and updating the storage content when a new detected voltage is detected; supplying the detected voltage stored in the output voltage storage means; and supplying the detected voltage to the load. A power supply circuit comprising: comparison means for comparing a target voltage to be output; and output voltage generation means for generating the output voltage based on a comparison result of the comparison means. 3. The output voltage detecting means includes a switching element and first and second resistance elements connected in series between the output terminal and the power supply line, and when the switching element is turned on. The power supply circuit according to claim 1, wherein the detection voltage is output from a connection point between the first and second resistance elements. 4. The output voltage detecting means includes a first switching element and first and second resistance elements connected in series between the output terminal and the power supply line. When the switching element is turned on, the detection voltage is output from a connection point between the first and second resistance elements. The output voltage storage means has one end connected to a connection point between the first and second resistance elements. A second switching element whose on / off timing is controlled at the same timing as the first switching element; and a capacitor connected to the other end of the second switching element. The power supply circuit according to claim 2, wherein the voltage is stored. 5. The switching device according to claim 1, wherein the output voltage generation unit is configured to switch on according to a signal corresponding to a magnitude of a load, and to store power when the switching unit is turned on, and to store power when the switching unit is turned off. Power storage means for releasing the stored power as the output voltage and supplying the output voltage to the load, and the comparing means includes a control unit for controlling an on-period of the switching means based on a result of the comparison. The power supply circuit according to claim 1, wherein: 6. When the output voltage is smaller in absolute value than a target voltage to be supplied to the load, the control unit controls the ON period of the switching unit to be longer, 6. The power supply circuit according to claim 5, wherein when the voltage is higher in absolute value than a target voltage to be supplied to the load, control is performed so as to shorten an ON period of the switching means. 7. An electro-optical device comprising: the power supply circuit according to claim 1; and a plurality of pixels each including an electro-optical material sandwiched between two substrates facing each other; An electro-optical device comprising: a driving unit that generates a driving signal for driving the plurality of pixels based on an output voltage of a circuit.