JP2000269145A - Crystal growing method of compound semiconductor and semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a III-V compound semiconductor with few crystal defects. SOLUTION: This method for forming a layer 7 with III-V compound in a semiconductor, having a plurality of layers of different compositions including the layer 7 with III-V compound includes a process for performing crystal growth for a III-V compound semiconductor. In the method, molar flow rate of group V element in the initial stage of the crystal growth is larger than the molar flow rate of group V element in normal growth.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for growing a group III-V compound semiconductor crystal, and more particularly to a metal organic chemical vapor deposition method and a semiconductor light emitting device (light emitting diode).

[0002]

2. Description of the Related Art As a method for growing a compound semiconductor crystal, MOCVD (metal organic chemical vapor deposition) is well known, and in a semiconductor device, especially a light emitting device, good crystallinity is required to improve light emitting characteristics. Research is underway to obtain

Conventionally, much research has been conducted on the growth conditions of a light emitting portion such as an active layer and a cladding layer on a substrate for manufacturing a light emitting device. The crystallinity of relatively thick semiconductor layers, such as layers, has not been well studied.

[0004] However, there is a problem that the device characteristics deteriorate due to the crystallinity of a relatively thick semiconductor layer such as a current diffusion layer.

As a specific example, an example of a surface-emitting type device using an AlGaInP-based semiconductor material will be described. In such a light emitting device, in order to increase the luminous efficiency, it is necessary to provide a current diffusion layer on the light emitting portion and spread the current injected from the electrode to the entire active layer. For example, a surface emitting AlGaInP-based semiconductor light emitting device as shown in FIG. 8 has been proposed. Referring to FIG. 8, such a semiconductor light emitting device includes an n-type GaAs substrate 81, an n-type buffer layer 82,
Each layer of the n-type AlGaInP cladding layer 83, the AlGaInP active layer 84, the p-type AlGaInP cladding layer 85, and the p-type GaP current diffusion layer 87, and the n-type electrode 81
0 and a p-type electrode 811. Light emitted from the AlGaInP active layer 84 as a light emitting portion is extracted from the p-type electrode 811 side. Here, the p-type electrode 81
It is necessary to spread the current injected from No. 1 to the whole AlGInP active layer 84. For this reason, a thick layer of about 2 μm or more, generally about 5 μm is adopted as the GaP current diffusion layer 87 to expand the current and emit light in the entire AlGaInP active layer 84, thereby improving the light extraction efficiency in the upper surface direction. Is increasing.

[0006]

In such a semiconductor light emitting device, there is a problem that a large number of crystal defects called hillocks occur due to an increase in the thickness of the current diffusion layer.

This crystal defect is particularly caused by a group III-V compound semiconductor such as GaP, InGaP, AlGaInP,
AlGaAs, AlGaInAs and AlGaInN
Occurs frequently in system materials.

[0008] By increasing the number of crystal defects called hillocks, the crystallinity of the current diffusion layer is reduced. For this reason, there is a problem that the luminous efficiency is reduced. In addition, unevenness is generated on the growth surface due to a decrease in crystallinity, and furthermore, the electrode is easily peeled off at the time of forming the electrode, which causes a problem that the yield is reduced.

The present inventors have observed cross sections of these semiconductor light emitting devices where many crystal defects have occurred in order to identify the cause of the generation of crystal defects called hillocks. As a result, the density of occurrence of crystal defects increased near the interface of the thick layer.

Regarding the cause of the generation of crystal defects, when a group III-V compound semiconductor such as a GaP layer grows in a thick film, the bond between the group III atom and the group V atom breaks during the crystal growth, and the group V atom becomes It is considered that the vacancies are dissociated, and the vacancies generate crystal defects called hillocks.

Therefore, in a semiconductor having a plurality of layers having different compositions, the carrier concentration and the composition rapidly change near the interface between the layers and near the interface between the current diffusion layer and the light emitting portion. Is likely to occur.

The present invention provides a method for growing a compound semiconductor crystal which solves this problem, and also provides a semiconductor light emitting device having no crystal defects and having significantly improved luminous efficiency and yield.

[0013]

SUMMARY OF THE INVENTION In a first aspect, a method of the present invention comprises a layer having a III-V compound,
In the semiconductor having a plurality of layers having different compositions, the III-
A method for forming a layer having a group V compound, comprising the step of growing a group III-V compound semiconductor by a metalorganic chemical vapor deposition method, wherein a molar flow rate of a group V element in an early stage of crystal growth is included. Is larger than the molar flow rate of the group V element during normal growth.

In one embodiment, the molar flow rate of the group V element in the initial stage of the crystal growth is 1.2 times or more larger than the molar flow rate of the element during the normal growth.

[0015] In a second aspect, the method of the present invention comprises:
A method for forming a layer having a group III-V compound in a semiconductor having a plurality of layers having different compositions, including a layer having a group II-V compound, comprising the steps of: A step of crystal-growing a group V compound semiconductor, wherein the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth is such that It is larger than the molar flow ratio of the elements.

In one embodiment, the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth is the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth. 1.2 times greater than

In a third aspect, the method of the present invention comprises:
A method for forming a layer having a group III-V compound in a semiconductor having a plurality of layers having different compositions, including a layer having a group II-V compound, comprising the steps of: The method includes a step of crystal-growing a group V compound semiconductor, wherein the growth temperature in the initial stage of crystal growth is higher than the growth temperature in normal growth.

In one embodiment, the growth temperature in the initial stage of the crystal growth is higher than the growth temperature in the normal growth by 10 ° C. or more.

[0019] In one embodiment, the III-V compound semiconductor includes GaP.

In one embodiment, the III-V compound semiconductor includes Ga _x In ₁ -xP (0 <x ≦ 1).

In one embodiment, the group III-V
Compound semiconductor is Al_xGa_yIn_{1-x- y}P (0 <x ≦ 1,
0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

In one embodiment, the III-V compound semiconductor includes Al _x Ga ₁ -xP (0 ≦ x ≦ 1).

In one embodiment, the above III-V grouping
Compound semiconductor is Al_xGa_yIn_{1-x- y}As (0 ≦ x ≦
1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

In one embodiment, the group III-V
Compound semiconductor is Al_xGa_yIn_{1-x- y}N (0 ≦ x ≦ 1,
0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

[0025] In one embodiment, the group III-V compound semiconductor _{is, In x Ga 1-x As} y P 1-y (0 ≦ x ≦ 1,
0 ≦ y ≦ 1).

In one embodiment, the thickness of the III-V compound semiconductor layer is 2 μm or more.

The semiconductor light emitting device of the present invention comprises: a substrate; a light emitting portion having a lower clad layer, an active layer, and an upper clad layer on the substrate; A semiconductor light emitting device having a group V compound semiconductor layer, wherein the group III-V compound semiconductor layer is a layer formed by any of the methods of the present invention.

In one embodiment, the semiconductor light emitting device of the present invention has a current blocking layer between the upper clad layer and the III-V compound semiconductor layer.

[0029]

DETAILED DESCRIPTION OF THE INVENTION In a first aspect of the method of the present invention,
A group III-V compound semiconductor is formed by metal organic chemical vapor deposition.

Group III-V compounds include group III (group 13 of the periodic table) aluminum Al, gallium Ga, indium In or thallium Tl and group V (group 15) phosphorus P, arsenic As and antimony Sb. Or a compound having an atomic ratio of 1: 1 generated with nitrogen N or the like.

The metal organic chemical vapor deposition method is a chemical vapor deposition method (CVD) using an organic metal as a raw material substrate, and particularly refers to a vapor phase epitaxy.

Materials used for the metal organic chemical vapor deposition method
For the aluminum of group III compound
And trimethyl aluminum (CH_Three)_ThreeAl and bird
Ethyl aluminum (C_TwoH_Five)_ThreeAl, gallium Ga
Trimethylgallium (CH_Three)_ThreeGa and G
Liethyl gallium (C_TwoH_Five)_ThreeGa, Indium In
Trimethylindium (CH_Three)_ThreeIn and
Triethylindium (C_TwoH_Five)_ThreeIn and Tariu
Trimethyl thallium (CH_Three) _ThreeTl
And triethyl thallium (C_TwoH_Five)_ThreeUsed by Tl
It is possible. Phosphide as a material for phosphorus V
PH_ThreeAnd tertiary butyl phosphine TBP,
Arsine AsH as a material for arsenic As_ThreeAnd Tasha
As a material for l-butylamine TBA and antimony Sb
SbH_ThreeAnd NH as a material of nitrogen N_ThreeAnd N_TwoIs used
Is available.

In the first aspect of the method of the present invention, III-
The molar flow rate of the group V element in the initial stage of crystal growth of the group V compound semiconductor is set to be larger than the molar flow rate of the group V element during normal growth.

In one embodiment, the III-V compound semiconductor contains at least GaP.

According to this embodiment, a GaP layer having a large band gap and having a reduced crystal defect called a hillock can be crystal-grown. When applied to a semiconductor light emitting device having a GaP layer, the crystal of the current diffusion layer can be grown. Problems such as a decrease in luminous efficiency due to a decrease in the property and a decrease in yield such as peeling due to unevenness at the time of electrode formation are improved.

In one embodiment, the III-V compound semiconductor contains at least Ga _x In _1-x P (0 <x ≦ 1).

According to this embodiment, the inclusion of In further reduces crystal defects called hillocks.
Since the In atom has a small bond energy with the P atom, it easily diffuses on the growth surface during the growth, and the generation of crystal defects is suppressed.

[0038] In one embodiment, III-V compound semiconductor is at least _{Al x Ga y In 1-xy} P (0 <x
≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

According to this embodiment, the band gap can be increased by including Al, and crystal defects called hillocks are reduced.

In one embodiment, the III-V compound semiconductor has at least Al _x Ga _{1 -x} As (0 ≦ x ≦ 1).
including.

According to this embodiment, the effect of the present invention is:
It is obtained in an AlGaAs layer and an AlGaAs-based semiconductor light emitting device.

[0042] In one embodiment, III-V compound semiconductor is at least _{Al x Ga y In 1-xy} As (0 ≦
x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

According to this embodiment, the effect of the present invention is:
It is obtained in an AlGaInAs layer and an AlGaInAs-based semiconductor light emitting device.

[0044] In one embodiment, the group III-V compound semiconductor at least _{Al x Ga y In 1-xy} N (0 ≦ x
≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

According to this embodiment, the effect of the present invention is as follows:
It is obtained in an AlGaInN layer and an AlGaInAs-based semiconductor light emitting device.

[0046] In one embodiment, the group III-V compound semiconductor, at least _{In x Ga 1-x As y} P 1-y (0 ≦ x
≦ 1, 0 ≦ y ≦ 1).

According to this embodiment, the effect of the present invention is as follows:
It is obtained in an InGaAsP layer and an InGaAsP-based semiconductor light emitting device.

The crystal growth of the group III-V compound semiconductor is as follows.
It can be performed on any layer depending on the desired laminated structure. In one embodiment, crystal growth is performed on the upper cladding layer of the light emitting section, and in one embodiment,
Crystal growth is performed on the current blocking layer on the upper cladding layer of the light emitting section.

“Early stage of crystal growth” refers to a period of the initial stage of crystal growth including at least the starting point of crystal growth. Preferably, from the start of crystal growth until a quarter of the thickness of the desired layer is formed, more preferably, half the thickness of the desired layer is formed from the start of the crystal growth. Means the period until

"Normal growth" means a crystal growth period after the initial stage of crystal growth.

The “molar flow rate of the group V element” is the number of moles of the group V element introduced for crystal growth per unit time, and is preferably from 1.05 × 10 ⁻⁴ to the initial stage of crystal growth.
1.05 mol / min.

The molar flow rate of the group V element is usually
Preferably it is 1 × 10 ^-4 to 1 mol / min.

The molar flow rate of the group V element in the initial stage of crystal growth is set to be larger than that in the normal growth. Preferably, the molar flow rate of the group V element in the initial stage of the crystal growth is 1.05 times or more as large as that in the normal growth. More preferably, the molar flow rate of the group V element at the initial stage of crystal growth is 1.1 times or more larger than that at the time of normal growth.

In one embodiment, the molar flow rate of the group V element at the initial stage of crystal growth is 1.2 times higher than that at the time of normal growth.
More than double.

According to this embodiment, the effects of the present invention can be obtained more efficiently. Further, there is an advantage that the consumption of the group V element can be reduced.

On the other hand, the upper limit of the molar flow rate of the group V element in the initial stage of crystal growth is not particularly limited, but is preferably set to twice or less than that in normal growth.

Here, the molar flow rate of the group V element and the group III element in the initial stage of crystal growth and during normal growth is such that the finally formed III-V compound layer becomes a single crystal, and the group III element contained therein. The ratio of element to group V element is 1:
It is adjusted to be 1.

Here, even if the molar flow rate of the group V element is increased, a single crystal having a ratio of the group III element to the group V element of 1: 1 can be obtained even if the molar flow rate of the group V element is large. Within the range of conditions as disclosed herein, Group V elements and I
Due to chemical interaction with group II elements, the stoichiometric ratio is 1:
This is because it becomes 1.

The III-V compound semiconductor layer provided by the above method can have any thickness depending on the desired semiconductor design.

In one embodiment, the thickness of the III-V compound semiconductor layer provided by the above method is 2 μm.
That is all.

According to this embodiment, a problem caused by crystal defects has been particularly remarkable in the prior art.
Crystal defects in the II-V compound semiconductor are improved.

As the apparatus, materials, manufacturing conditions, and the like for carrying out the method of the present invention, any conventionally known apparatuses and manufacturing conditions for crystal growth of III-V compound semiconductors can be used. Preferably, an MOCVD apparatus or the like can be used as the apparatus.

In a second aspect of the method of the present invention, II
The ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth of the group IV compound semiconductor is larger than the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth. I do.

The ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of the crystal growth is preferably set to be at least 1.05 times larger than that during the normal growth. More preferably, it is 1.1 times or more.

In one embodiment, the ratio of the molar flow rate of the Group V element to the molar flow rate of the Group III element in the initial stage of crystal growth is usually the ratio of the molar flow rate of the Group V element during growth to the molar flow rate of the Group III element. The ratio is made 1.2 times or more larger than the ratio.

According to this embodiment, there is an advantage that the total molar flow rate can be reduced.

On the other hand, the upper limit of the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth is not particularly limited, but is preferably not more than twice that in normal growth.

The molar flow rate of the group V element and the group III element at the initial stage of crystal growth and during normal growth is determined by the ratio of the group III element to the group V element in the finally formed III-V compound layer. It is adjusted to be 1: 1.

Here, even if the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth is increased, a single crystal having a ratio of the group III element to the group V element of 1: 1 can be obtained. This is because even if the molar flow rate of the group V element is large,
This is because in the condition range disclosed in the present specification, the stoichiometric ratio becomes 1: 1 due to the chemical interaction between the group V element and the group III element.

The molar flow rates of the group V elements at the initial stage of crystal growth and during normal growth can be the same as those described above with respect to the first aspect of the present invention.

The “molar flow rate of the group III element” is the number of moles of the group III element introduced for crystal growth per unit time, and is preferably 1 × 10 ^{−5 in the} initial stage of crystal growth.
１1 × 10 ⁻³ mol / min.

The molar flow rate of the group III element during normal growth is preferably 1 × 10 ⁻⁵ to 1 × 10 ⁻³ mol / min.

The ratio of the molar flow rate of the group V element to the molar flow rate of the group III element in the initial stage of crystal growth is preferably 1
0 to 1000.

The ratio of the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth is preferably 10
~ 1000.

In the second aspect of the method of the present invention, the definitions of terms, devices, materials, manufacturing conditions, and the like other than those described above are applicable to those described in the first aspect.

In a third aspect of the method of the present invention, III-
The growth temperature in the initial stage of crystal growth of the group V compound semiconductor is higher than the growth temperature during normal growth.

Here, the growth temperature refers to the temperature of the group III-V compound at the time of crystal growth of the group III-V compound.

The growth temperature at the initial stage of crystal growth is preferably 10 ° C. or higher than the growth temperature during normal growth.

In one embodiment, the growth temperature at the initial stage of crystal growth is higher than the growth temperature during normal growth by 10 ° C. or more.
According to this embodiment, in addition to the above effects, the substrate temperature can be lowered, and the diffusion of the dopant can be suppressed. The characteristics of the semiconductor light emitting device including the group III-V compound layer formed according to this embodiment can be kept good.

Although the upper limit of the growth temperature in the initial stage of crystal growth is not particularly limited, it is preferable that the growth temperature during normal growth does not exceed 100 ° C. or more, and the growth temperature during normal growth is 80 ° C.
More preferably, it does not exceed the above.

Therefore, the initial growth temperature of the crystal is:
Preferably, it is 690-860 ° C. The growth temperature during normal growth is preferably 680 to 850 ° C.

In the third aspect of the method of the present invention, the definitions of terms, devices, materials, manufacturing conditions and the like other than those described above are applicable to those described in the first aspect.

Next, the semiconductor light emitting device of the present invention will be described.

The semiconductor light emitting device of the present invention has a light emitting portion 8 having a substrate 1, a lower cladding layer 3, an active layer 4, and an upper cladding layer 5 on the substrate, and a light emitting portion 8 having a thickness on the light emitting portion 8. A semiconductor light emitting device having a group III-V compound semiconductor layer 7 having a thickness of 2 µm or more, wherein the group III-V compound semiconductor layer 7 is formed by any one of the methods of the present invention.

The substrate 1 is a semiconductor which is epitaxially grown thereon, and can be made of a conventionally known material, for example, GaAs is preferable. The substrate 1 is
It can be manufactured by a conventionally known method.

The thickness of the substrate 1 can be selected arbitrarily according to the desired semiconductor design, but is preferably 300 to 4
00 μm.

The lower cladding layer 3 is a layer for confining carriers in the active layer, and can be made of a conventionally known material, and is preferably, for example, AlGaInP or AlGaAs. The lower cladding layer 3 can be manufactured by a conventionally known method. For example, it can be manufactured by an MOCVD apparatus.

The thickness of the lower cladding layer 3 can be arbitrarily selected depending on the desired semiconductor design, but is preferably 0.5 to 2 μm.

The active layer 4 is a layer that emits light, and can be made of a conventionally known material, for example, AlGaInP.
And AlGaAs are preferable. Also, the active layer 4
It can be manufactured by a conventionally known method. For example,
It can be manufactured by an MOCVD apparatus.

The thickness of the active layer 4 can be selected arbitrarily according to a desired semiconductor design, but is preferably 0.00
1 to 2 μm.

The upper cladding layer 5 is a layer for confining carriers in the active layer, and can be made of a conventionally known material, and is preferably, for example, AlGaInP or AlGaAs. The upper cladding layer 5 can be manufactured by a conventionally known method. For example, it can be manufactured by an MOCVD apparatus.

The thickness of the upper cladding layer 5 can be arbitrarily selected depending on the desired semiconductor design, but is preferably 0.5 to 10 μm.

The lower clad layer 3, the active layer 4, and the upper clad layer 5 form the light emitting section 8.

In the semiconductor light emitting device of the present invention, III
The group V compound semiconductor layer 7 has a thickness of 2 μm or more.

The material of the III-V compound semiconductor layer 7 and the manufacturing method thereof are as described above as the method of the present invention.

In one embodiment of the semiconductor light emitting device of the present invention, a current blocking layer 6 is provided between the upper cladding layer 5 and the group III-V compound semiconductor layer 7.

According to this embodiment, the current in the current diffusion layer can be further expanded, and the luminous efficiency can be increased.

The current blocking layer 6 is a layer for confining current, and may be formed of a conventionally known material.
lGaInP and AlGaAs are preferred. The current blocking layer 6 can be manufactured by a conventionally known method. For example, it can be manufactured by the MOCVD method.

The thickness of the current blocking layer 6 can be arbitrarily selected in accordance with a desired semiconductor design, but is preferably set to a value of 0.1.
1 to 1 μm.

Hereinafter, specific examples of the present invention will be described. The following examples are all for illustrative purposes,
It is non-limiting.

[0101]

(Embodiment 1) FIG. 1 shows an AlGaInP using a compound semiconductor crystal growth method according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view of a semiconductor light emitting device including a system compound semiconductor light emitting device. The first embodiment will be described with reference to FIG.

First, the following layers were sequentially grown. (1) n-GaAs substrate 1, (2) n-GaAs buffer layer 2 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5 μm
m, (3) n- (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦
1, 0 ≦ y ≦ 1) cladding layer 3 (x = 1.0, y = 0.
5, Si concentration 5 × 10 ¹⁷ cm ⁻³ ) thickness 1.0 μm,
(4) (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1, 0 ≦
y ≦ 1) active layer 4 (x = 0.3, y = 0.5), thickness 0.5 μm, (5) p- (Al _x Ga _1-x ) _y In _1-y P
(0 ≦ x ≦ 1, 0 ≦ y ≦ 1) cladding layer 5 (x = 1.
0, y = 0.5, Zn concentration 5 × 10 ¹⁷ cm ^-3), the thickness 1.0μm, (6) p-Al x Ga y In 1-xy P (0 ≦
x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) intermediate layer 6, the thickness 0.1μm, (7) p-Al x Ga y In 1-xy P (0 ≦
x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) Current diffusion layer 7
(X = 0.10, y = 0.90, Zn concentration 1 × 10 ¹⁸ c
m ^-3 ), thickness 5 μm.

Each of the layers (1) to (7) is formed by MOCVD.
It was formed at a growth temperature of 700.degree.

Next, an n-type electrode 10 and a p-type electrode 11 were formed to complete a semiconductor light emitting device.

In this embodiment, when the current diffusion layer 7 is formed, the initial growth is about 1 μm, and the remaining growth is about 4 μm.
m is normal growth.

The molar flow rate of the group V element was 1.2 × 10 ⁻³ mol / min during the initial growth and 1.0 × 10 ⁻³ mol / min during the normal growth. The molar flow rate of the group III element was 2.0 × 10 ⁻⁵ mol /
And 2.0 × 10 ⁻⁵ mol / min during normal growth.

The growth temperature during initial growth is:
700 ° C., which was 700 ° C. during normal growth.

[0108] in this embodiment _{p-Al x Ga y In 1} -xy P
FIG. 9 shows the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element (hereinafter referred to as V / III) in the layer thickness direction when the current diffusion layer 7 was grown in the layer thickness direction with respect to the normal growth. . (Accordingly, this ratio is 1 during normal growth.) In this example, V / III in the initial stage of growth was set to 60, and then gradually reduced to 50 in normal growth. Therefore, the ratio of V / III in the initial stage of growth to V / III during normal growth is 1.2.

The AlGaInP-based semiconductor light emitting device manufactured according to the present embodiment uses a p-AlGaInP layer as a current diffusion layer. In this type of semiconductor light emitting device, crystal defects called hillocks have conventionally been generated at about 1000 / cm ⁻² , but in the present embodiment, they have been halved to about 500 / cm ⁻² .

The reason is considered as follows.

Conventionally, a group III-V compound semiconductor such as an AlGaInP layer has a crystal structure of II atoms such as Ga atoms and In atoms.
Since the bond between the group I element and the P atom that is a group V element is not strong, the P atom that is a group V element is easily dissociated, which causes crystal defects called hillocks to be easily generated during growth. Therefore, it is considered that, when the molar flow rate of the P-atom, which is a group V element, is increased during the crystal growth, the dissociation of the P-atom, which is a group V element, is reduced, and the generation of crystal defects called hillocks is suppressed.

Further, it is considered that the flow rate of the group V element at the initial stage of the growth greatly contributes to the effect confirmed in this embodiment. This is because, when a semiconductor having a plurality of layers including a III-V compound semiconductor layer is grown, crystal defects are likely to occur at the growth interface.

Further, the present embodiment was carried out by changing the ratio of V / III at the initial stage of growth to V / III during normal growth to various values, and the hillock defect density of each obtained semiconductor light emitting device was measured. . The result is shown in FIG. From this figure,
V / II at the beginning of growth relative to V / III during normal growth
It can be seen that if the ratio of I is 1.2 or more, the crystal defect density decreases to 100 cm ^-2 or less.

In this embodiment, as described above, by increasing the molar flow rate of the group V element only about 1 μm in the initial stage of growth, crystal defects called hillocks were remarkably reduced as described above. The consumption of the group V element hardly increased, and the luminous efficiency and the yield were improved. As for the characteristics, the luminous efficiency of the yellow semiconductor light emitting device having a wavelength of 590 nm was increased by 10% and the yield was increased by 10% as compared with the conventional case.

(Embodiment 2) FIG. 2 shows an AlGaIn using a compound semiconductor crystal growth method according to a second embodiment of the present invention.
It is sectional drawing of the semiconductor light emitting element which is a P type compound semiconductor light emitting element. The second embodiment will be described with reference to FIG.

First, the following layers were sequentially laminated. (1) n-GaAs substrate 21 (2) n-GaAs buffer layer 22 (Si concentration 5 × 10
¹⁷cm^-3), Thickness 0.5 μm, (3) n- (Al_xGa
_1-x)_yIn_1-yP (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) cladding
Layer 23 (x = 1.0, y = 0.5, Si concentration 5 × 10¹⁷
cm^-3), Thickness 1.0 μm, (4) (Al_xGa_1-x)_y
In_1-yP (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) active layer 24 (x
= 0.45, y = 0.5), thickness 0.5 μm, (5) p
(Al_xGa_1-x)_yIn_1-yP (0 ≦ x ≦ 1, 0 ≦ y ≦
1) Cladding layer 25 (x = 1.0, y = 0.5, Zn concentration
Degree 5 × 10¹⁷cm^-3), Thickness 1.0 μm, (6) p-I
n_xGa_1-yP (0 ≦ x ≦ 1) intermediate layer 26 (Zn concentration 1 ×
10¹⁸cm ^-3), Thickness 0.1 μm, (7) p- (Al_x
Ga_1-x)_yIn_1-yP (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) current
Diffusion layer 27 (x = 0.50, y = 0.20, Zn concentration 1
× 10¹⁸cm^-3), Thickness 5 μm.

Next, the n-type electrode 210 and the p-type electrode 21
1 was completed to complete a semiconductor light emitting device.

FIG. 11 shows p-Al _x Ga _y In according to this embodiment.
_It shows the growth temperature of the _1-xy P current diffusion layer in the thickness direction. The initial growth of about 1 μm is grown at 750 ° C.
Growing at 0 ° C.

In the AlGaInP-based semiconductor light emitting device manufactured according to this embodiment, the p-AlGaInP
Layers were used. In this type of semiconductor light emitting device, crystal defects called hillocks have conventionally been generated at about 1000 / cm ⁻² , but in the present embodiment, they have been halved to about 500 / cm ⁻² .

The reason for this is that, conventionally, a group III-V compound semiconductor such as an AlGaInP layer has a strong bond between a group III element such as a Ga atom or an In atom and a P atom which is a group V element in a crystal. P atoms, which are group elements, are easily dissociated, causing crystal defects called hillocks to easily occur during growth. Here, when the growth temperature is increased, P atoms that are Group V elements are easily dissociated, but at the same time, migration (diffusion) on the surface becomes active,
The generation of crystal defects called hillocks is also suppressed.

It is considered that the effect of this embodiment is largely attributable to the growth temperature at the initial stage of growth. Because I
This is because when a semiconductor having a plurality of layers including a II-V compound semiconductor layer is grown, crystal defects are likely to occur at the growth interface.

Further, the present example was carried out by changing the initial temperature of the growth to various values, and the hillock defect density of each of the obtained semiconductor light emitting devices was measured. The result is shown in FIG.
According to this figure, the temperature at the initial stage of the growth is 1% lower than the temperature during the normal growth.
It can be seen that increasing the temperature by 0 ° C. or more reduces the crystal defect density to 500 cm ⁻² or less.

In this embodiment, almost the same results as those of the first embodiment were obtained for the hillocks by increasing the growth temperature only in the initial growth of about 0.5 μm. Diffusion of the dopant from the current diffusion layer into the active layer also hardly increased, and the luminous efficiency and the yield were improved. As for the characteristics, the luminous efficiency and the yield of the yellow semiconductor light emitting device having a wavelength of 590 mm were increased by 10% and 10% respectively.

(Embodiment 3) FIG. 3 shows an AlGaIA using a compound semiconductor crystal growth method according to a third embodiment of the present invention.
It is sectional drawing of the semiconductor light emitting element which is an s type compound semiconductor light emitting element. The third embodiment will be described with reference to FIG.
In this embodiment, a method combining both the first and second embodiments is applied. That is, the conditions of the molar flow rate of each of the group III and V elements were the same as in Example 1, and the temperature conditions were the same as in Example 2.

First, the following layers were laminated. (1) On an n-GaAs substrate 31, an n-GaAs buffer layer 32 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5 μm
m, (2) n- (Al _x Ga _{1 -x} ) _y In _{1 -y} As (0 ≦ x
≦ 1, 0 ≦ y ≦ 1) cladding layer 33 (x = 0.3, y =
0.5, Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 1.0 μ
m, (3) (Al _x Ga _{1 -x} ) _y In _{1 -y} As (0 ≦ x ≦
1, 0 ≦ y ≦ 1) active layer 34 (x = 0, y = 0.5),
0.5 μm thick, (4) P- (Al _x Ga _1-x ) _y In _1-y
P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) cladding layer 35 (x =
0.3, y = 0.5, Zn concentration 5 × 10 ¹⁷ cm ^-3), the thickness 1.0μm, (5) p-Al x Ga y In 1-xy As
(0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) Intermediate layer 3
6 (x = 0.2, y = 0.6, Zn concentration 5 × 10 ¹⁷ cm
^-3), thickness 0.1μm, (6) p-Al x Ga y In
_1-xy As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦
1) Current diffusion layer 37 (x = 0.6, y = 0.2, Zn concentration 3 × 10 ¹⁸ cm ⁻³ ), thickness 5 μm.

Next, the n-type electrode 310 and the p-type electrode 31
1 was formed, and the semiconductor light emitting device was completed.

FIG. 13A shows V / V of the current diffusion layer in this embodiment.
The ratio of the III ratio in the layer thickness direction is shown, and FIG. 13B shows the difference in growth temperature. 1000 / cm for conventional light emitting device
^Although about ^{-2 was} generated, in the present embodiment, it was greatly reduced to about 10 / cm ^-2 (1/50 of the conventional value) due to both the effect of the V / III ratio and the effect of the growth temperature.

The obtained semiconductor light emitting device has improved luminous efficiency and yield. In terms of characteristics, a semiconductor light emitting device having a wavelength of 1020 nm has a luminous efficiency of 30% and a yield of 3 as compared with the conventional semiconductor light emitting element
Increased by 0%.

(Embodiment 4) FIG. 4 is a sectional view of a semiconductor light emitting device which is an AlGaAs-based compound semiconductor light emitting device according to a fourth embodiment of the present invention. The fourth embodiment will be described with reference to FIG. The difference from the first embodiment is that the material system was formed of an Al _x Ga _{1 -x} As layer, an intermediate layer having a different composition was provided below the current diffusion layer, and the present invention was applied from this layer. That is.

First, the following layers were laminated. (1) n-GaAs substrate 41, (2) n-GaAs buffer layer 42 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5
μm, (3) n-Al _x Ga _{1 -x} As (0 ≦ x ≦ 1) cladding layer 43 (x = 0.7, Si concentration 5 × 10 ¹⁷ c
m ⁻³ ), thickness 1.0 μm, (4) Al _x Ga _{1 -x} As (0
≦ x ≦ 1) active layer 44 (x = 0.05), thickness 0.5 μ
m, (5) p-Al _x Ga _{1 -x} As (0 ≦ x ≦ 1) cladding layer 45 (x = 0.7, Zn concentration 5 × 10 ¹⁷ cm ⁻³ ),
1.0 μm thickness, (6) p-Al _x Ga _1-x As (0 ≦ x
≦ 1) Intermediate layer 46 (x = 0.10, Zn concentration 1 × 10 ¹⁸⁾
cm ^-3 ), thickness 0.1 μm, (7) p-Al _x Ga _{1 -x} A
s (0 ≦ x ≦ 1) current diffusion layer 47 (x = 0.80, Zn
Concentration 5 × 10 ¹⁸ cm ⁻³ ), thickness 5 μm, (8) p-Ga
As contact layer, thickness 0.1 μm.

Next, the n-type electrode 410 and the p-type electrode 41
1 was completed to complete a semiconductor light emitting device.

FIG. 14 shows the ratio of V / III in the thickness direction of the intermediate layer 46 and the current diffusion layer 47 in this embodiment. The crystal defects in the light-emitting element using a conventional Al _x Ga _1-x As current spreading layer, called 3000 / cm ^-2 order of hillocks occurs, in this example, 100 pieces / cm ^-2 degrees and (conventional About 1/30).

In the semiconductor light emitting device thus obtained, the luminous efficiency and the yield are improved.
Luminous efficiency of 30 mm compared to conventional 50 mm infrared semiconductor light emitting device
% And the yield also increased by 30%.

[0134] Further, in this embodiment, as the material for the current diffusion layer 47, GaP _{layer, Al x Ga y In 1-} xy As (0
≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) layer, and I
to produce a semiconductor light-emitting device in a similar manner using the respective _{n x Ga 1-x As y} P 1-y (0 ≦ x ≦ 1,0 ≦ y ≦ 1) layer. As a result, similarly, the number of hillocks of crystal defects could be significantly reduced.

Embodiment 5 FIG. 5 is a sectional view of a semiconductor light emitting device which is an AlGaInN based compound semiconductor light emitting device according to a fifth embodiment of the present invention. The fifth embodiment will be described with reference to FIG. The difference from the other embodiments is that the present invention is applied from the cladding layer which is the light emitting portion.

First, the following layers were laminated. (1) Sapphire substrate 51, (2) n-AlInN buffer layer 52 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5
μm, (3) n-Al x Ga y In 1-xy N (0 ≦ x ≦
1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) cladding layer 53 (x
= 0.2, y = 0.8, Si concentration 5 × 10 ¹⁷ cm ⁻³ ),
Thickness _{1.0μm, (4) Al x Ga} y In 1-xy N (0 ≦
x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) The active layer 54 (x
= 0, y = 0.9), thickness 0.5 μm, (5) p-Al
_{x Ga y In 1-xy N} (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x
+ Y ≦ 1) cladding layer 55 (x = 0.2, y = 0.8,
Zn concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 1.0 μm, (6)
_{p-Al x Ga y In 1} -xy P (0 ≦ x ≦ 1,0 ≦ y ≦
1, 0 ≦ x + y ≦ 1) intermediate layer 56 (x = 0.5, y =
0.5, Zn concentration 1 × 10 ¹⁸ cm ⁻³ ) thickness 0.1 μm,
_{(7) p-Al x Ga} y In 1-xy N (0 ≦ x ≦ 1,0 ≦
y ≦ 1, 0 ≦ x + y ≦ 1) Current diffusion layer 57 (x = 0.
8, y = 0.2, Zn concentration 2 × 10 ¹⁸ cm ⁻³ ), thickness 5
μm.

Next, the n-type electrode 510 and the p-type electrode 51
1 was completed to complete a semiconductor light emitting device.

FIG. 15 shows V / II in the thickness direction of the cladding layer 55, the intermediate layer 56, and the current spreading layer 57 in this embodiment.
Shows the ratio of I. In a conventional light emitting device using an Al _x Ga _y In _1-xy N current diffusion layer, crystal defects called hillocks of about 3000 / cm ⁻² were generated.
It was greatly reduced to about 00 pieces / cm ^-2 (about 1/30 of the conventional value). In this example, the growth temperature was set to 1000 ° C.

The light emitting efficiency and the yield of the thus obtained semiconductor light emitting device were improved. In terms of characteristics, a 460 mm wavelength blue semiconductor light emitting device has a luminous efficiency of 3
It increased by 0%, and the yield also increased by 50%.

Embodiment 6 FIG. 6 is a sectional view of a semiconductor light emitting device which is an AlGaInP based compound semiconductor light emitting device according to a sixth embodiment of the present invention. The sixth embodiment will be described with reference to FIG. The difference from the first embodiment is that the current blocking layer 6 is provided at the center between the cladding layer 65 and the current diffusion layer 67.
9 is provided.

First, the following layers were laminated. (1) n-GaAs substrate 61, (2) nGaAs buffer layer 62 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5 μm
m, (3) n- (Al _x Ga _1-x ) _y In _1-y P (0 ≦ x ≦
1, 0 ≦ y ≦ 1) cladding layer 63 (x = 1.0, y =
0.5, Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 1.0 μ
m, (4) (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1,
0 ≦ y ≦ 1) active layer 64 (x = 0.15, y = 0.
5), thickness 0.5 μm, (5) p- (Al _x Ga _1-x ) _y
In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) cladding layer 65
(X = 1.0, y = 0.5, Zn concentration 5 × 10 ¹⁷ c
m ^-3), thickness 1.0μm, (6) p-Al x Ga y In
_1-xy P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1)
Intermediate layer 66 (x = 0.2, y = 0.7, Zn concentration 1 × 1
0 ¹⁸ cm ^-3) Thickness _{0.1μm (7) n-Al x} Ga y In 1-xy P (0 ≦ x ≦ 1,0 ≦
y ≦ 1, 0 ≦ x + y ≦ 1) Current blocking layer 69 (x = 0.
1, y = 0.8, Si concentration 5 × 10 ¹⁷ cm ^-3), the thickness 0.5μm, (8) p-Al x Ga y In 1-xy P (0 ≦
x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) Current diffusion layer 67
(X = 0.1, y = 0.8, Zn concentration 5 × 10 ¹⁸ c
m ^-3 ), thickness 5 μm.

The n-type electrode 610 and the p-type electrode 611 were formed to complete a semiconductor light emitting device.

In this embodiment, a current blocking layer 69 is provided at the center between the cladding layer 65 and the current diffusion layer 67. As a result, the current injected from the electrode 611 spreads further in the current diffusion layer 67, and the light extraction efficiency is further improved.

In the characteristics, the luminous efficiency of the light emitting semiconductor light emitting device having a wavelength of 610 nm was increased to 40% as compared with the conventional device.

(Embodiment 7) FIG. 7 is a sectional view of a semiconductor light emitting device which is an AlGaInP-based compound semiconductor light emitting device according to a seventh embodiment of the present invention. The seventh embodiment will be described with reference to FIG. The difference from the sixth embodiment is that a current blocking layer 79 between the cladding layer 75 and the current diffusion layer 77 is provided in the peripheral portion.

First, the following layers were laminated. (1) n-GaAs substrate 71, (2) n-GaAs buffer layer 72 (Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5
μm, (3) n- (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x
≦ 1, 0 ≦ y ≦ 1) cladding layer 73 (x = 1.0, y =
0.5, Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 1.0 μ
m, (4) (Al _x Ga _{1 -x} ) _y In _{1 -y} P (0 ≦ x ≦ 1,
0 ≦ y ≦ 1) active layer 74 (x = 0.15, y = 0.
5), thickness 0.5 μm, (5) p- (Al _x Ga _1-x ) _y
In _1-y P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) cladding layer 75
(X = 1.0, y = 0.5, Zn concentration 5 × 10 ¹⁷ c
m ^-3), thickness 1.0μm, (6) p-Al x Ga y In
_1-xy P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1)
Intermediate layer (x = 0.2, y = 0.7, Zn concentration 1 × 10 ¹⁸
cm ^-3) 76, the thickness 0.1μm, (7) n-Al x Ga y
In _1-xy P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦
1) Current blocking layer 79 (x = 0.1, y = 0.8, Si concentration 5 × 10 ¹⁷ cm ⁻³ ), thickness 0.5 μm, (8) p-A
_{l x Ga y In 1-xy} P (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦
x + y ≦ 1) Current spreading layer 77 (x = 0.1, y = 0.
8, Zn concentration 5 × 10 ¹⁸ cm ⁻³ ) thickness 5 μm.

An n-type electrode 710 and a p-type electrode 711 were formed to complete a semiconductor light emitting device.

In the present embodiment, the current blocking layer 79 between the cladding layer 75 and the current diffusion layer 77 is provided on the peripheral portion, so that the current injected from the electrode 711 is applied to the current diffusion layer 77 at the center. And the light extraction efficiency is further improved. In the characteristics, the luminous efficiency of the light emitting semiconductor light emitting device having a wavelength of 610 nm was increased by 40% as compared with the conventional device.

Further, semiconductor light-emitting devices were manufactured in the same manner as in Examples 1 to 7 except that the composition ratios x and y of the respective layers were appropriately changed. As a result, in each case, the effect of the present invention was sufficiently obtained.

Further, the present invention can be applied to all semiconductor light emitting devices even if the structure of the current confinement is different, and the effect of the present invention can be obtained.

In the above embodiment, Zn was used as the dopant of the current diffusion layer. However, similar effects can be obtained by using another dopant such as Mg or Be instead of Zn. Further, the same effect was obtained when an n-type dopant such as Si, Se, or Te was used. Further, as other materials, AlGaAs, AlGaInN, AlGaIn
As a result of a similar experiment performed on As and InGaAsP, similar effects of the present invention were obtained.

[0152]

According to the method of the present invention, the molar flow rate of the group V element at the initial stage of crystal growth is larger than the molar flow rate of the group V element at the time of normal growth, or the group III element at the initial stage of crystal growth. When the ratio of the molar flow rate of the group V element to the molar flow rate is larger than the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth, or when the growth temperature in the initial stage of crystal growth is lower than the normal growth temperature. Is higher than the growth temperature, a group III-V compound semiconductor with reduced crystal defects called hillocks can be grown. When this method is applied to a semiconductor light emitting device, problems such as a decrease in luminous efficiency due to a decrease in crystallinity of the current diffusion layer and a decrease in yield such as peeling due to unevenness during electrode formation are improved.

According to the compound semiconductor light emitting device of the present invention,
The molar flow rate of the group V element at the initial stage of crystal growth is larger than the molar flow rate of the group V element at the time of normal growth, or the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element at the initial stage of crystal growth is: I during normal growth
Crystal defects called hillocks are reduced by increasing the ratio of the molar flow rate of the group V element to the molar flow rate of the group II element or by increasing the growth temperature in the initial stage of crystal growth higher than the growth temperature during normal growth. However, the luminous efficiency due to the decrease in the crystallinity of the current diffusion layer is increased, and the peeling due to the unevenness at the time of forming the electrode is reduced, so that the yield is greatly improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor light emitting device formed by using the method of Embodiment 1.

FIG. 2 is a cross-sectional view of a semiconductor light emitting device formed by using the method of the second embodiment.

FIG. 3 is a cross-sectional view of a semiconductor light emitting device formed by using the method of the third embodiment.

FIG. 4 is a cross-sectional view of a semiconductor light emitting device formed by using the method of the fourth embodiment.

FIG. 5 is a sectional view of a semiconductor light emitting device formed by using the method of the fifth embodiment.

FIG. 6 is a cross-sectional view of a semiconductor light emitting device formed by using the method of the sixth embodiment.

FIG. 7 is a cross-sectional view of a semiconductor light emitting device formed by using the method of the seventh embodiment.

FIG. 8 is a sectional view of a conventional semiconductor light emitting device.

FIG. 9 is a graph showing the ratio of V / II1 in the thickness direction of the current diffusion layer 7 formed using the method of the first embodiment.

FIG. 10 shows a current diffusion layer 7 in the method of the first embodiment.
The ratio of V / III in the early stage of growth to that in normal growth,
4 is a graph showing the relationship between the density of crystal defects called hillocks and the occurrence density.

FIG. 11 is a graph showing a difference between a growth temperature in an initial growth direction of a current diffusion layer 27 formed by using the method of the second embodiment and a growth temperature thereafter.

FIG. 12 shows a current diffusion layer 27 in the method of the second embodiment.
4 is a graph showing the relationship between the difference in growth temperature between the initial growth and the normal growth in the layer thickness direction and the density of crystal defects called hillocks.

FIG. 13A is a graph showing a V / III ratio in a thickness direction of a current diffusion layer 37 formed by using the method of the third embodiment.

FIG. 13B is a graph showing a difference in growth temperature between the initial growth and the normal growth of the current diffusion layer 37 formed by using the method of the third embodiment.

FIG. 14 is a graph showing the ratio of V / III in the thickness direction of the intermediate layer 46 and the current diffusion layer 47 formed by using the method of the fourth embodiment.

FIG. 15 shows a clad layer 5 formed by using Example 5.
5 / intermediate layer 56 and current diffusion layer 57 in the thickness direction V / II
7 is a graph showing the ratio of I.

[Explanation of symbols]

1, 21, 31, 41, 51, 61, 71, 81 Substrate 2, 22, 32, 42, 52, 62, 72, 82 Buffer layer 3, 23, 33, 43, 53, 63, 73, 83 Lower cladding Layer 4, 24, 34, 44, 54, 64, 74, 84 Active layer 5, 25, 35, 45, 55, 65, 75, 85 Upper cladding layer 6, 26, 36, 46, 56, 66, 76 Middle Layers 7, 27, 37, 47, 57, 67, 77, 87 Current spreading layer 8 Light emitting unit 10, 210, 310, 410, 510, 610, 71
0,810 n-type electrode 11, 211, 311, 411, 511, 611, 71
1,811 p-type electrode

 ──────────────────────────────────────────────────続 き Continued on front page (72) Inventor Junichi Nakamura 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Hiroshi Nakatsu 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside (72) Inventor Takahisa Kurahashi 22-22, Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Tetsuro Murakami 22-22, Nagaike-cho, Abeno-ku, Osaka-shi, Osaka F Terms (reference) 5F041 AA03 AA40 AA41 CA34 CA35 CA36 CA65 5F045 AA04 AB09 AB11 AB17 AB18 AC07 AC08 AC20 AD11 BB12 CA10 DA53 EE17 EK27

Claims (21)

[Claims] 1. A layer comprising a group III-V compound,
In the semiconductor having a plurality of layers having different compositions, the III-
A method of forming a layer having a group V compound, comprising the step of growing a group III-V compound semiconductor by metalorganic chemical vapor deposition, wherein a molar flow rate of a group V element in an initial stage of crystal growth is provided. But,
A method wherein the molar flow rate of the group V element during normal growth is larger than that. 2. The method according to claim 1, wherein the molar flow rate of the group V element in the initial stage of the crystal growth is at least 1.2 times larger than the molar flow rate of the element during the normal growth. 3. A layer comprising a III-V compound.
In the semiconductor having a plurality of layers having different compositions, the III-
A method for forming a layer having a group V compound, comprising a step of growing a group III-V compound semiconductor by metalorganic chemical vapor deposition, wherein a molar flow rate of a group III element in an initial stage of crystal growth is provided. The molar flow ratio of the group V element to the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth. 4. The method according to claim 3, wherein V is a function of the molar flow rate of the group III element in the initial stage of the crystal growth.
A method wherein the ratio of the molar flow rate of the group V element is at least 1.2 times greater than the ratio of the molar flow rate of the group V element to the molar flow rate of the group III element during normal growth. 5. A layer comprising a group III-V compound,
In the semiconductor having a plurality of layers having different compositions, the III-
A method of forming a layer having a group V compound, comprising the step of growing a group III-V compound semiconductor by metalorganic chemical vapor deposition, wherein the initial growth temperature of the crystal growth is the normal growth temperature. The method, when the growth temperature is higher than when. 6. The method according to claim 5, wherein the initial growth temperature of the crystal is 10 ° C. or higher than the normal growth temperature. 7. The method according to claim 1, wherein the group III-V compound semiconductor is Ga
The method according to any one of claims 1 to 6, comprising P. 8. The method according to claim 1, wherein the III-V compound semiconductor is Ga
_x In including _1-x P a (0 <x ≦ 1), The method according to any one of claims 1-6. 9. The method according to claim 1, wherein the group III-V compound semiconductor is Al.
_{x Ga y In 1-xy P} (0 <x ≦ 1,0 ≦ y ≦ 1,0 ≦ x
+ Y ≦ 1). The method according to any one of claims 1 to 6, comprising: 10. The method according to claim 10, wherein the group III-V compound semiconductor is A
l _x Ga containing _{1-x P (0 ≦ x} ≦ 1), The method according to any one of claims 1-6. 11. The method according to claim 11, wherein the group III-V compound semiconductor is A
_{l x Ga y In 1-xy} As (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0
≦ x + y ≦ 1). 12. The group III-V compound semiconductor, wherein A
_{l x Ga y In 1-xy} N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦
The method according to any one of claims 1 to 6, wherein x + y ≦ 1). 13. The method according to claim 13, wherein the III-V compound semiconductor is
n_xGa_1-xAs_yP_{1 -y}(0 ≦ x ≦ 1, 0 ≦ y ≦ 1)
The method according to any one of claims 1 to 6. 14. The method according to claim 1, wherein the thickness of the group III-V compound semiconductor layer is 2 μm or more. 15. A substrate, and a light emitting unit having a lower clad layer, an active layer, and an upper clad layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting portion, wherein the III-V compound semiconductor layer is formed by the method according to claim 1. A semiconductor light-emitting device that is a layer. 16. A light emitting unit having a substrate, a lower cladding layer, an active layer, and an upper cladding layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting portion, wherein the III-V compound semiconductor layer is formed by the method according to claim 2. A semiconductor light-emitting device that is a layer. 17. A substrate, and a light emitting unit having a lower cladding layer, an active layer, and an upper cladding layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting portion, wherein the III-V compound semiconductor layer is formed by the method according to claim 3. A semiconductor light-emitting device that is a layer. 18. A substrate, and a light emitting unit having a lower cladding layer, an active layer, and an upper cladding layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting portion, wherein the III-V compound semiconductor layer is formed by the method according to claim 4. A semiconductor light-emitting device that is a layer. 19. A light emitting unit having a substrate, a lower clad layer, an active layer, and an upper clad layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting section, wherein the III-V compound semiconductor layer is formed by the method according to claim 5. A semiconductor light-emitting device that is a layer. 20. A substrate, and a light emitting unit having a lower cladding layer, an active layer, and an upper cladding layer on the substrate,
A semiconductor light-emitting device having a III-V compound semiconductor layer having a thickness of 2 μm or more on the light-emitting portion, wherein the III-V compound semiconductor layer is formed by the method according to claim 6. A semiconductor light-emitting device that is a layer. 21. Any one of claims 15 to 20
9. The semiconductor light emitting device according to item 6, further comprising a current blocking layer between the upper cladding layer and the III-V compound semiconductor layer.