JP2000243826A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a semiconductor device to have a heat dissipation effect without making thin the thickness of an oxide film on a substrate by a method wherein an isolation region is connected with a lead frame via a wiring layer. SOLUTION: Conductive material films 2, such as polysilicon films, are respectively formed within sidewall oxide films 1 subsequent to the formation of trenches. Each one-layer wiring 3, each two-layer wiring 4 and the uppermost layer wiring 5 are thermally and electrically connected with each conductive material film 2. A drain electrode 6, a gate electrode 7 and a source electrode 8 are formed in a transistor. Heat generated in a semiconductor device follows the path of the conductive material films 2 in the interiors of the trenches, the wiring 3, the wiring 4, the wiring 5, bonding pads, bonding wires and a lead frame and it becomes possible to effectively dissipate the heat. Thereby, in the SOI device, it becomes possible to relax the self-heating effect peculiar to the device without causing a reduction in the operating frequency of the transistor and at the same time, the enhancement of the thermal reliability of the device is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an SOI (Silicon On Insulator) device.

[0002]

BACKGROUND OF THE INVENTION Problems to be Solved by the Invention
I-devices are highly expected as high-speed elements from the viewpoint of low parasitic capacitance. This is mainly because the parasitic capacitance to the substrate is reduced.

As an isolation region, a trench isolation and a selective oxidation isolation are generally used. On the other hand, since the element is surrounded by an oxide film having a lower thermal conductivity than silicon, there is a self-heating effect. For this reason, in order to suppress a thermal rise, it may be required to consider, for example, a limitation of a driving frequency, a limitation of a power supply, and a limitation of a use temperature environment.

In an SOI device, if the oxide film thickness is reduced, the thermal resistance can be about twice that of silicon.
In this case, the parasitic capacitance with respect to the substrate increases, which hinders the actual increase in speed.

An object of the present invention is to provide a semiconductor device having a heat radiation effect without reducing an oxide film thickness on a substrate.

[0006]

According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device in which a semiconductor layer is formed on an insulating substrate, and the semiconductor layer is element-isolated in an isolation region, the isolation region is connected to a lead frame via a wiring layer. . In addition,
The wiring layer is desirably the uppermost wiring layer of three or more multilayer wiring layers.

With the above structure, the heat accumulated in the semiconductor device can secure a path to the lead frame, can effectively dissipate heat, and can improve the reliability of the device and increase the oxide film thickness. The accompanying reduction in parasitic capacitance and improvement in operation speed can be achieved.

[0008]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to the present invention. Although FIG. 1 shows an example of a MOS transistor, the present invention can be applied to a bipolar transistor and other elements as well.

In FIG. 1, reference numeral 1 denotes a sidewall oxide film after the formation of a trench, 2 denotes a conductive material such as polysilicon formed inside the trench, and 3 denotes a single layer that makes thermal and electrical connection with the conductive material 2. The second metal wiring layer 4 is a second metal wiring layer for making thermal and electrical connection with the metal wiring layer 3, and the fifth metal wiring layer 4 is
Third metal wiring layer for making thermal and electrical connection with
Denotes a first metal wiring layer serving as a drain / source electrode of the transistor, 7 denotes a gate electrode of the transistor, and 9 denotes an interlayer insulating film between wiring layers.

FIG. 2 is a schematic diagram of an IC mounted with the semiconductor device shown in FIG. In FIG. 2, 10 is an IC,
Reference numeral 11 denotes a bonding pad inside the IC 10, reference numeral 12 denotes a bonding wire connecting the bonding pad 11 and the lead frame, reference numeral 13 denotes a lead frame, and reference numeral 14 denotes a lead frame connected to the uppermost wiring layer.

With this configuration, heat generated in the semiconductor device is transferred to the conductive material 2 in the trench, the first-layer wiring 3,
A two-layer wiring 4, an uppermost wiring 5, a bonding pad 11,
By following the paths of the bonding wire 12 and the lead frame 14, heat can be effectively dissipated.

[0013]

As described above, according to the present invention, effective heat radiation can be achieved by securing the heat path from the trench portion including the mounting, and the operating frequency of the SOI device can be reduced. It is possible to alleviate the self-heating effect peculiar to this without causing any problem, and at the same time, to improve the thermal reliability.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device of the present invention including a trench portion.

FIG. 2 is a perspective view showing a mounted state.

[Explanation of symbols]

Reference Signs List 1 sidewall oxide film after trench formation 2 conductive material such as polysilicon formed inside trench 3, 6, 8 first metal wiring layer 4 second metal wiring layer 5 third metal wiring layer 7 Gate electrode of transistor 9 Interlayer insulating film between wiring layers 10 IC 11 Bonding pad inside IC 12 Bonding wire 13, 14 Lead frame

Claims (2)

[Claims] 1. A semiconductor device in which a semiconductor layer is formed on an insulating base, and the semiconductor layer is element-isolated in an isolation region, wherein the isolation region is connected to a lead frame via a wiring layer. A semiconductor device characterized by the above-mentioned. 2. The semiconductor device according to claim 1, wherein the wiring layer is an uppermost wiring layer among three or more multilayer wiring layers.