JP2000243797A - Semiconductor wafer, and cutting method thereof, and semiconductor wafer assembly and cutting method thereof - Google Patents

Semiconductor wafer, and cutting method thereof, and semiconductor wafer assembly and cutting method thereof

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Publication number
JP2000243797A
JP2000243797A JP3942099A JP3942099A JP2000243797A JP 2000243797 A JP2000243797 A JP 2000243797A JP 3942099 A JP3942099 A JP 3942099A JP 3942099 A JP3942099 A JP 3942099A JP 2000243797 A JP2000243797 A JP 2000243797A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
material layer
semiconductor
magnetic material
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3942099A
Other languages
Japanese (ja)
Inventor
Hiroyuki Sakida
洋之 崎田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP3942099A priority Critical patent/JP2000243797A/en
Publication of JP2000243797A publication Critical patent/JP2000243797A/en
Pending legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Dicing (AREA)

Abstract

PROBLEM TO BE SOLVED: To automatically discriminate the quality of semiconductor chips based on whether or not a magnetic material layer is present on the side of the semiconductor chip, when the semiconductor chips are cut off by a method wherein a magnetic material layer is provided in the side of a semiconductor wafer with a primary surface, where electronic elements or patterns are physically and chemically formed. SOLUTION: A magnetic material layer 4, composed of magnetic powder and binder which binds magnetic powder together, is previously applied on the side of a semiconductor wafer laminate. Lastly, when a magnet is made to approach separated semiconductor chip laminates 8, the semiconductor chip laminate 8 with the magnetic material layer 4 formed on its side is attracted by the magnet. The semiconductor chip laminate 8 having no magnetic material layer 4 formed on its side is not attracted to the magnet. As a result, the semiconductor chip laminates 8 which are possessed of arc-shaped sides, defective in shape, and not suitable for use in the manufacture of products can be easily and surely sorted out.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体ウエハ技
術、特に半導体ウエハ又は半導体ウエハ組立体の切断の
際に発生する形状不良の製品から容易に分離できる半導
体ウエハ及びその切断法並びに半導体ウエハ組立体及び
その切断法に属する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer technology, and more particularly to a semiconductor wafer which can be easily separated from a defective product generated when cutting a semiconductor wafer or a semiconductor wafer assembly, a method for cutting the same, and a semiconductor wafer assembly And its cutting method.

【0002】[0002]

【従来の技術】半導体チップ積層体を製造する際に、薄
板状に形成された半導体ウエハの主面に種々の電子素子
又は電子回路を含む同一の複数の電子素子又はパターン
が物理化学的に形成され、その後、半導体ウエハを切断
して個々の電子パターンに分離される。例えば、高圧ダ
イオードを製造するとき、特開平10−217094号
公報に示されるように、主面上に種々の電子素子及びパ
ターンを形成した薄板状の半導体ウエハは、周知のワイ
ヤソー又はダイシングブレードを使用して、賽の目状の
半導体チップに切断分離される。
2. Description of the Related Art When manufacturing a semiconductor chip laminate, a plurality of identical electronic elements or patterns including various electronic elements or electronic circuits are formed physicochemically on a main surface of a semiconductor wafer formed in a thin plate shape. Then, the semiconductor wafer is cut and separated into individual electronic patterns. For example, when manufacturing a high-voltage diode, as shown in JP-A-10-217094, a thin plate-shaped semiconductor wafer having various electronic elements and patterns formed on a main surface thereof uses a well-known wire saw or dicing blade. Then, it is cut and separated into dice-shaped semiconductor chips.

【0003】[0003]

【発明が解決しようとする課題】平面円形状の半導体ウ
エハを平面四角形状のチップに切断分割すると、半導体
ウエハの周辺側の半導体チップは、平面四角形状となら
ず一部が欠けた形状となり、このような半導体チップ
は、形状不良の切屑となり製品に使用できない。従来で
は、形状不良の半導体チップを目視で判別し除去するた
め、量産工程を導入できず生産性の点で問題があった。
When a semiconductor wafer having a plane circular shape is cut and divided into chips having a plane square shape, the semiconductor chips on the peripheral side of the semiconductor wafer have a partially chipped shape instead of a plane square shape. Such a semiconductor chip becomes a chip having a defective shape and cannot be used for a product. Conventionally, since a semiconductor chip having a defective shape is visually determined and removed, a mass production process cannot be introduced, and there is a problem in productivity.

【0004】本発明は、形状不良の半導体チップを自動
的に選別できる半導体ウエハ及びその切断法を提供する
ことを目的とする。また、本発明は形状不良の半導体チ
ップ積層体を自動的に選別できる半導体ウエハ積層体及
びその切断法を提供することを目的とする。
[0004] It is an object of the present invention to provide a semiconductor wafer capable of automatically selecting a semiconductor chip having a defective shape, and a method of cutting the same. Another object of the present invention is to provide a semiconductor wafer laminate capable of automatically selecting a semiconductor chip laminate having a defective shape, and a method for cutting the same.

【0005】[0005]

【課題を解決するための手段】本発明による半導体ウエ
ハは、電子素子又はパターンが物理化学的に形成された
少なくとも1つの主面を有する半導体ウエハの側面に磁
性物質層(4)が設けられる。半導体ウエハの側面に磁性
物質層(4)を設けるので、半導体ウエハを個々の半導体
チップに切断したとき、不良形状の半導体チップの側面
に形成された磁性物質層(4)の有無により製品の形状良
否を自動的に選別することができる。
A semiconductor wafer according to the present invention has a magnetic material layer (4) provided on a side surface of a semiconductor wafer having at least one main surface on which electronic elements or patterns are formed physicochemically. Since the magnetic material layer (4) is provided on the side surface of the semiconductor wafer, when the semiconductor wafer is cut into individual semiconductor chips, the shape of the product depends on the presence or absence of the magnetic material layer (4) formed on the side surface of the defective semiconductor chip. Pass / fail can be automatically selected.

【0006】本発明の実施の形態では、磁性物質層(4)
は、磁性粉体と、磁性粉体を連結する結合剤である。半
導体ウエハ(2)は、複数の半導体ウエハ(2)を積層した半
導体ウエハ積層体(1)を構成し、隣合う複数の半導体ウ
エハ(2)は半田層(3)により相互に固着される。
In the embodiment of the present invention, the magnetic material layer (4)
Is a binder for connecting the magnetic powder and the magnetic powder. The semiconductor wafer (2) forms a semiconductor wafer stack (1) in which a plurality of semiconductor wafers (2) are stacked, and a plurality of adjacent semiconductor wafers (2) are fixed to each other by a solder layer (3).

【0007】本発明による半導体ウエハ切断法は、半導
体ウエハ(2)の側面に磁性物質層(4)を形成する工程と、
直径方向面又は直径方向面と平行な面に沿って半導体ウ
エハ(2)を切断して個々の半導体チップを形成する工程
と、磁性物質層(4)を検出して、磁性物質層(4)を有する
形状不良の半導体チップを選別する工程とを含む。
The method for cutting a semiconductor wafer according to the present invention comprises the steps of forming a magnetic material layer (4) on a side surface of a semiconductor wafer (2);
A step of forming individual semiconductor chips by cutting the semiconductor wafer (2) along a diametric surface or a plane parallel to the diametric surface, detecting the magnetic material layer (4), and detecting the magnetic material layer (4) Selecting a semiconductor chip having a defective shape having the following.

【0008】また、本発明による半導体ウエハ積層体切
断法は、積層した複数の半導体ウエハ(2)の側面に磁性
物質層(4)を形成した半導体ウエハ積層体(1)を用意する
工程と、直径方向面又は直径方向面と平行な面に沿って
半導体ウエハ積層体(1)を切断して半導体チップ積層体
(8)を形成する工程と、磁性物質層(4)を検出して、磁性
物質層(4)を有する形状不良の半導体チップ積層体(8)を
選別する工程とを含む。
The method for cutting a semiconductor wafer laminate according to the present invention comprises the steps of: preparing a semiconductor wafer laminate (1) in which a magnetic material layer (4) is formed on the side surfaces of a plurality of laminated semiconductor wafers (2); Cutting the semiconductor wafer laminate (1) along a diametric surface or a surface parallel to the diametric surface to form a semiconductor chip laminate
The method includes a step of forming (8) and a step of detecting the magnetic material layer (4) and selecting a semiconductor chip laminate (8) having the magnetic material layer (4) and having a poor shape.

【0009】本発明の実施の形態では、半導体チップ又
は半導体チップ積層体(8)に磁石(10)を近接させて、磁
性物質層(4)を有する形状不良の半導体チップ又は半導
体チップ積層体(8)を磁石(10)に吸着させて選別するか
又は磁気感応素子により磁性物質層(4)を有する形状不
良の半導体チップ又は半導体チップ積層体(8)を選別す
ることができる。また、本発明による半導体ウエハ組立
体切断法では、直径方向面又は直径方向面と平行な面に
沿って切断した半導体ウエハ積層体(1)の切断部(6)に接
着用樹脂(7)を充填して、板状の半導体ウエハ積層体(1)
間を接着用樹脂(7)で固着する工程と、前記の面と直角
な面に沿って更に半導体ウエハ積層体(1)を切断する工
程と、エッチング液中に半導体ウエハ積層体(1)を浸漬
して、接着用樹脂(7)を溶解し、半導体チップ積層体(8)
を形成する工程とを含んでもよい。
In the embodiment of the present invention, a magnet (10) is brought close to a semiconductor chip or a semiconductor chip laminate (8) to form a semiconductor chip or a semiconductor chip laminate having a magnetic material layer (4). 8) can be selected by adsorbing it to the magnet (10), or a semiconductor chip or semiconductor chip laminate (8) having a magnetic material layer (4) and having a poor shape can be selected by a magnetic sensing element. Further, in the semiconductor wafer assembly cutting method according to the present invention, the bonding resin (7) is applied to the cut portion (6) of the semiconductor wafer laminate (1) cut along a diametric surface or a surface parallel to the diametric surface. Filled, plate-shaped semiconductor wafer laminate (1)
A step of fixing the gap with an adhesive resin (7), a step of further cutting the semiconductor wafer laminate (1) along a plane perpendicular to the plane, and the step of cutting the semiconductor wafer laminate (1) in an etching solution. Immerse to dissolve the adhesive resin (7), and to laminate the semiconductor chip laminate (8)
And forming a.

【0010】[0010]

【発明の実施の形態】本発明による半導体ウエハ及びそ
の切断法並びに半導体ウエハ組立体及びその切断法の実
施の形態を図1〜図7について以下説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a semiconductor wafer and a method of cutting the same, and a semiconductor wafer assembly and a method of cutting the same according to the present invention will be described below with reference to FIGS.

【0011】図1に示すように、複数枚の円盤状の半導
体ウエハ(2)を半田層(3)を介して固着し積層した半導体
ウエハ積層体(1)を用意する。各半導体ウエハ積層体(1)
の一方の主面(1a)と他方の主面(1b)には、図示しないリ
ード部材を固着するための接着剤層(1c)が形成される。
各半導体ウエハ(2)は半導体チップ(1)を多数個取りでき
る大きさである。薄板状の各半導体ウエハ(2)の主面に
は種々の電子素子及び配線パターンが形成されている。
As shown in FIG. 1, a semiconductor wafer laminate (1) is prepared by laminating and laminating a plurality of disc-shaped semiconductor wafers (2) via a solder layer (3). Each semiconductor wafer laminate (1)
On one main surface (1a) and the other main surface (1b), an adhesive layer (1c) for fixing a lead member (not shown) is formed.
Each semiconductor wafer (2) is large enough to take a large number of semiconductor chips (1). Various electronic elements and wiring patterns are formed on the main surface of each thin semiconductor wafer (2).

【0012】次に、図2に示すように、磁性粉体と、磁
性粉体を連結する結合剤から成る磁性物質層(4)を半導
体ウエハ積層体(1)の側面に塗布する。磁性粉体は例え
ば鉄粉であり、結合剤はアクリル系接着剤等の熱可塑性
接着剤、エポキシ樹脂等の熱硬化性接着剤、エチレン酢
酸ビニルコポリマー、ポリアミド、ポリエステル等のホ
ットメルト接着剤を使用することができる。各半導体ウ
エハ(2)と半田層(3)の外周面全体を被覆する磁性物質層
(4)は、半導体ウエハ積層体(1)の両主面(1a)(1b)には塗
布されない。磁性物質層(4)は、切断された半導体ウエ
ハ積層体(1)が、近接する磁石(10)に吸着できる程度の
磁界を生じる磁束密度を生ずる。
Next, as shown in FIG. 2, a magnetic material layer (4) made of a magnetic powder and a binder for connecting the magnetic powder is applied to the side surface of the semiconductor wafer laminate (1). The magnetic powder is, for example, iron powder, and the binder is a thermoplastic adhesive such as an acrylic adhesive, a thermosetting adhesive such as an epoxy resin, or a hot melt adhesive such as an ethylene vinyl acetate copolymer, polyamide, or polyester. can do. Magnetic material layer covering the entire outer peripheral surface of each semiconductor wafer (2) and solder layer (3)
(4) is not applied to both main surfaces (1a) and (1b) of the semiconductor wafer laminate (1). The magnetic material layer (4) generates a magnetic flux density that generates a magnetic field to such an extent that the cut semiconductor wafer laminate (1) can be attracted to the adjacent magnet (10).

【0013】図2に示すように、磁性物質層(4)の形成
された半導体ウエハ積層体(1)は、金属製の支持板(5)に
接着剤層(1c)を介して固着される。半導体ウエハ積層体
(1)を支持板(5)上に固着する工程は、半導体ウエハ積層
体(1)に磁性物質層(4)を形成した後でも、磁性物質層
(4)を形成する前でも良い。
As shown in FIG. 2, the semiconductor wafer laminate (1) on which the magnetic material layer (4) is formed is fixed to a metal support plate (5) via an adhesive layer (1c). . Semiconductor wafer laminate
The step of fixing (1) on the support plate (5) is performed after forming the magnetic material layer (4) on the semiconductor wafer laminate (1).
It may be before forming (4).

【0014】次に、周知のワイヤソーを用意して、半導
体ウエハ積層体(1)の主面(1a)(1b)、即ち半導体ウエハ
積層体(1)の最も上側に配置された半導体ウエハ(2)に対
して直径方向面又は直径方向面と平行な面に沿って(X
方向)にワイヤを往復操作して、図3に示すように、各
半導体ウエハ(2)及び半田層(3)から成る半導体ウエハ積
層体(1)を板状に切断分離する。接着剤層(1c)及び半田
層(3)を介して支持板(5)に固着される板状の半導体ウエ
ハ積層体(1)は、相互に分離しない。半導体ウエハ積層
体(1)の最も上側に配置された半導体ウエハ(2)の主面に
接着剤層(1c)を形成した状態でワイヤソーを行う場合
は、ワイヤを接着剤層(1c)に当接させて切断を行う。
Next, a known wire saw is prepared, and the main surfaces (1a) and (1b) of the semiconductor wafer stack (1), that is, the semiconductor wafer (2) disposed on the uppermost side of the semiconductor wafer stack (1) are prepared. ) Along a diametric plane or a plane parallel to the diametric plane (X
3), the semiconductor wafer laminate (1) composed of each semiconductor wafer (2) and the solder layer (3) is cut and separated into a plate shape as shown in FIG. The plate-shaped semiconductor wafer laminate (1) fixed to the support plate (5) via the adhesive layer (1c) and the solder layer (3) does not separate from each other. When performing a wire saw with the adhesive layer (1c) formed on the main surface of the semiconductor wafer (2) disposed on the uppermost side of the semiconductor wafer laminate (1), apply the wire to the adhesive layer (1c). Make contact and cut.

【0015】その後、板状の半導体ウエハ積層体(1)間
の切断部(6)に接着用樹脂(7)を充填して、板状の半導体
ウエハ積層体(1)間を接着用樹脂(7)で固着する。これに
より、図4に示すように、複数の板状の半導体ウエハ積
層体(1)が接着用樹脂(7)を介して一体化され、元の平面
円形状の半導体ウエハ積層体(1)に復元される。
Thereafter, the cutting portion (6) between the plate-like semiconductor wafer laminates (1) is filled with an adhesive resin (7), and the space between the plate-like semiconductor wafer laminates (1) is filled with the adhesive resin (7). Secure with 7). Thereby, as shown in FIG. 4, the plurality of plate-shaped semiconductor wafer laminates (1) are integrated via the bonding resin (7), and are returned to the original planar circular semiconductor wafer laminate (1). Will be restored.

【0016】続いて、半導体ウエハ積層体(1)の主面(1
a)、即ち半導体ウエハ積層体(1)の最上部に配置された
半導体ウエハ(2)に対して第一の方向(X方向)と直交
する第二の方向(Y方向)にワイヤを往復動作させて、
図5に示すように、半導体ウエハ積層体(1)の各半導体
ウエハ(2)及び半田層(3)並びに板状の半導体ウエハ積層
体(1)の相互間を固着する接着用樹脂(7)を第二の方向に
切断する。この結果、半導体ウエハ積層体(1)は、棒状
の半導体ウエハ積層体(1)に分離される。このとき、一
部の棒状の半導体ウエハ積層体(1)は、支持板(5)から外
れることがある。
Subsequently, the main surface (1) of the semiconductor wafer laminate (1)
a) That is, the wire is reciprocated in the second direction (Y direction) orthogonal to the first direction (X direction) with respect to the semiconductor wafer (2) disposed on the uppermost part of the semiconductor wafer stack (1). Let me
As shown in FIG. 5, an adhesive resin (7) for fixing the semiconductor wafer (2) and the solder layer (3) of the semiconductor wafer laminate (1) and the plate-like semiconductor wafer laminate (1) to each other. In the second direction. As a result, the semiconductor wafer stack (1) is separated into the rod-shaped semiconductor wafer stack (1). At this time, some rod-shaped semiconductor wafer laminates (1) may come off from the support plate (5).

【0017】更に、半導体ウエハ積層体(1)をエッチン
グ液中に浸漬して、半導体ウエハ積層体(1)(チップ積
層体)を支持板(5)に固着する接着剤層(1c)と、半導体
ウエハ積層体(1)の相互間を固着する接着用樹脂(7)とを
エッチング液により溶解させて除去する。半導体ウエハ
積層体(1)(チップ積層体)の側面に形成された磁性物
質層(4)は前記エッチング液により除去されない。この
結果、図6に示すように、各半導体ウエハ積層体(1)は
支持板(5)から分離されると共に、相互に分離され、個
別の棒状の各半導体チップ積層体(8)が得られる。図6
に示すように、半導体チップ積層体(8)の内側に配置さ
れ且つ矩形断面を有する正規の形状の半導体チップ積層
体(8)は、平坦な側面に磁性物質層(4)が固着されていな
いが、半導体チップ積層体(8)のうち、外周側に配置さ
れた半導体チップ積層体(8)は、図7に示すように、円
弧状の側面に磁性物質層(4)が固着されている。
Further, an adhesive layer (1c) for dipping the semiconductor wafer laminate (1) in an etching solution to fix the semiconductor wafer laminate (1) (chip laminate) to the support plate (5); The adhesive resin (7) for fixing the semiconductor wafer laminates (1) to each other is dissolved and removed with an etchant. The magnetic material layer (4) formed on the side surface of the semiconductor wafer stack (1) (chip stack) is not removed by the etching solution. As a result, as shown in FIG. 6, each semiconductor wafer stack (1) is separated from the support plate (5) and separated from each other, and individual rod-shaped semiconductor chip stacks (8) are obtained. . FIG.
As shown in the figure, in the semiconductor chip laminate (8) having a regular shape disposed inside the semiconductor chip laminate (8) and having a rectangular cross section, the magnetic material layer (4) is not fixed to the flat side surface. However, among the semiconductor chip laminates (8), the semiconductor chip laminate (8) arranged on the outer peripheral side has a magnetic material layer (4) fixed to an arc-shaped side surface as shown in FIG. .

【0018】最後に、図7に示すように、相互に分離さ
れた半導体チップ積層体(8)に磁石(10)を近づけると、
側面に磁性物質層(4)を設けた半導体チップ積層体(8)
は、磁石(10)に吸着される。一方、側面に磁性物質層
(4)が形成されない図6の半導体チップ積層体(8)は磁石
(10)に吸着されない。この結果、半導体ウエハ積層体
(1)の外周側に配置され且つ製品の製造に供することが
できない円弧状側面を有する形状不良の半導体チップ積
層体(8)を容易に且つ確実に判別・除去することができ
る。このように、本実施の形態では、半導体ウエハ(2)
の側面に磁性物質層(4)が設けられるので、半導体ウエ
ハ(2)を個々の半導体チップ又は半導体チップ積層体(8)
に切断したとき、半導体チップ又は半導体チップ積層体
(8)の側面に形成された磁性物質層(4)の有無により製品
形状の良否を自動的に識別することができる。
Finally, as shown in FIG. 7, when the magnet (10) is brought close to the semiconductor chip laminate (8) separated from each other,
Semiconductor chip laminate (8) with magnetic material layer (4) on the side
Is attracted to the magnet (10). Meanwhile, a magnetic material layer on the side
The semiconductor chip laminate (8) of FIG. 6 where (4) is not formed is a magnet
Not adsorbed to (10). As a result, the semiconductor wafer laminate
The semiconductor chip laminate (8) having an arc-shaped side surface which is arranged on the outer peripheral side of (1) and has an arc-shaped side face that cannot be used for manufacturing a product can be easily and reliably identified and removed. Thus, in the present embodiment, the semiconductor wafer (2)
Since the magnetic material layer (4) is provided on the side surface of the semiconductor wafer (2), the individual semiconductor chips or the semiconductor chip laminate (8)
When cut into semiconductor chips or semiconductor chip laminates
Based on the presence or absence of the magnetic material layer (4) formed on the side surface of (8), the quality of the product shape can be automatically identified.

【0019】本発明の前記実施の形態は種々の変更が可
能である。例えば、前記実施の形態では、複数の半導体
ウエハ(2)を半田層(3)を介して固着された半導体ウエハ
積層体(1)を切断する場合について説明したが、単数の
半導体ウエハの切断分離する場合にも適用できる。板状
の半導体ウエハ積層体(1)の相互間を固着する接着用樹
脂(7)は設けなくても良いが、特に半導体ウエハ積層体
(1)の場合は、ワイヤソーでY方向に容易に切断できる
ように、接着用樹脂(7)を設けることが望ましい。ワイ
ヤソーを使用して切断する代わりに、周知のダイシング
ブレード(高速回転する円形刃)を使用して切断分離し
てもよい。本発明の実施の形態では、半導体チップ積層
体(8)に磁石(10)を近接させて、製品の形状良否を決定
する代わりに、ホール素子等の磁気感応素子により製品
の形状良否を選別してもよい。
Various modifications can be made to the above embodiment of the present invention. For example, in the above-described embodiment, the case where a plurality of semiconductor wafers (2) are cut through a semiconductor wafer laminate (1) fixed via a solder layer (3) has been described. It can be applied to the case. The adhesive resin (7) for fixing the plate-like semiconductor wafer laminates (1) to each other may not be provided.
In the case of (1), it is desirable to provide an adhesive resin (7) so that it can be easily cut in the Y direction with a wire saw. Instead of cutting using a wire saw, cutting and separating may be performed using a well-known dicing blade (a high-speed rotating circular blade). In the embodiment of the present invention, instead of determining the shape of the product by bringing the magnet (10) close to the semiconductor chip laminate (8), the shape of the product is selected by a magnetically sensitive element such as a Hall element. You may.

【0020】[0020]

【発明の効果】前記のように、本発明によれば、半導体
チップの形状良否を自動的に且つ確実に選別できるの
で、半導体チップの生産性を向上することができる。
As described above, according to the present invention, the quality of a semiconductor chip can be automatically and reliably selected, so that the productivity of the semiconductor chip can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明による半導体ウエハ積層体の製造に使
用する半導体ウエハ積層体の斜視図
FIG. 1 is a perspective view of a semiconductor wafer laminate used for manufacturing a semiconductor wafer laminate according to the present invention.

【図2】 側面に磁性物質層を形成し且つ支持板上に固
着した半導体ウエハ積層体の斜視図
FIG. 2 is a perspective view of a semiconductor wafer laminated body having a magnetic material layer formed on a side surface and fixed on a support plate.

【図3】 第一の方向に切断した半導体ウエハ積層体の
斜視図
FIG. 3 is a perspective view of the semiconductor wafer laminate cut in a first direction.

【図4】 切断部に接着用樹脂を充填した半導体ウエハ
積層体の斜視図
FIG. 4 is a perspective view of a semiconductor wafer laminate in which a cut portion is filled with an adhesive resin.

【図5】 第二の方向に切断した半導体ウエハ積層体の
斜視図
FIG. 5 is a perspective view of the semiconductor wafer laminate cut in a second direction.

【図6】 正規の形状を有する半導体チップ積層体の斜
視図
FIG. 6 is a perspective view of a semiconductor chip laminate having a regular shape;

【図7】 不合格の半導体チップ積層体の斜視図FIG. 7 is a perspective view of a failed semiconductor chip laminate.

【符号の説明】[Explanation of symbols]

(1)・・半導体ウエハ積層体、 (1a)・・主面、 (1b)
・・主面、 (1c)・・接着剤層、 (2)・・半導体ウエ
ハ、 (3)・・半田層、 (4)・・磁性物質層、(5)・・
支持板、 (6)・・切断部、 (7)・・接着用樹脂、
(8)・・半導体チップ積層体、
(1) ・ ・ Laminated semiconductor wafer, (1a) ・ ・ Main surface, (1b)
・ ・ Main surface, (1c) ・ ・ Adhesive layer, (2) ・ ・ Semiconductor wafer, (3) ・ ・ Solder layer, (4) ・ ・ Magnetic material layer, (5) ・ ・
Support plate, (6) ... cut section, (7) ... adhesive resin,
(8) ・ ・ Semiconductor chip laminate,

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 電子素子又はパターンが物理化学的に形
成された少なくとも1つの主面を有する半導体ウエハに
おいて、 前記半導体ウエハの側面に磁性物質層を設けたことを特
徴とする半導体ウエハ。
1. A semiconductor wafer having at least one main surface on which electronic elements or patterns are formed physicochemically, wherein a magnetic material layer is provided on a side surface of the semiconductor wafer.
【請求項2】 前記磁性物質層は、磁性粉体と、磁性粉
体を連結する結合剤である請求項1に記載の半導体ウエ
ハ。
2. The semiconductor wafer according to claim 1, wherein the magnetic material layer is a magnetic powder and a binder for connecting the magnetic powder.
【請求項3】 前記半導体ウエハは、複数の半導体ウエ
ハを積層した半導体ウエハ積層体を構成し、隣合う複数
の前記半導体ウエハは半田層により相互に固着された請
求項1又は2に記載の半導体ウエハから成る半導体ウエ
ハ組立体。
3. The semiconductor according to claim 1, wherein said semiconductor wafer forms a semiconductor wafer laminate in which a plurality of semiconductor wafers are stacked, and said plurality of adjacent semiconductor wafers are fixed to each other by a solder layer. A semiconductor wafer assembly comprising a wafer.
【請求項4】 前記磁性物質層は、磁性粉体と、磁性粉
体を連結する結合剤である請求項3に記載の半導体ウエ
ハ組立体。
4. The semiconductor wafer assembly according to claim 3, wherein the magnetic material layer is a magnetic powder and a binder for connecting the magnetic powder.
【請求項5】 半導体ウエハの側面に磁性物質層を形成
する工程と、 直径方向面又は直径方向面と平行な面に沿って前記半導
体ウエハを切断して個々の半導体チップを形成する工程
と、 前記磁性物質層を検出して、前記磁性物質層を有する形
状不良の半導体チップを選別する工程とを含むことを特
徴とする半導体ウエハ切断法。
5. A step of forming a magnetic material layer on a side surface of a semiconductor wafer; a step of cutting the semiconductor wafer along a diametric surface or a surface parallel to the diametric surface to form individual semiconductor chips; Detecting the magnetic material layer and selecting a semiconductor chip having a defective shape having the magnetic material layer.
【請求項6】 前記半導体チップに磁石を近接させて、
前記磁性物質層を有する形状不良の半導体チップを前記
磁石に吸着させて選別する請求項5に記載の半導体ウエ
ハ切断法。
6. A magnet is brought close to the semiconductor chip,
6. The method of cutting a semiconductor wafer according to claim 5, wherein the semiconductor chip having the magnetic material layer and having a poor shape is attracted to the magnet and selected.
【請求項7】 磁気感応素子により前記磁性物質層を有
する形状不良の半導体チップを選別する請求項6に記載
の半導体ウエハ切断法。
7. The method for cutting a semiconductor wafer according to claim 6, wherein a semiconductor chip having a defective shape having said magnetic material layer is selected by a magnetically sensitive element.
【請求項8】 積層した複数の半導体ウエハの側面に磁
性物質層を形成した半導体ウエハ積層体を用意する工程
と、 直径方向面又は直径方向面と平行な面に沿って前記半導
体ウエハ積層体を切断して半導体チップ積層体を形成す
る工程と、 前記磁性物質層を検出して、前記磁性物質層を有する形
状不良の前記半導体チップ積層体を選別する工程とを含
むことを特徴とする半導体ウエハ組立体切断法。
8. A step of preparing a semiconductor wafer laminate in which a magnetic material layer is formed on side surfaces of a plurality of laminated semiconductor wafers, and forming the semiconductor wafer laminate along a diametric surface or a plane parallel to the diametric surface. A semiconductor wafer comprising: a step of cutting to form a semiconductor chip laminate; and a step of detecting the magnetic material layer and selecting the defective semiconductor chip laminate having the magnetic material layer. Assembly cutting method.
【請求項9】 前記半導体チップ積層体に磁石を近接さ
せて、前記磁性物質層を有する形状不良の半導体チップ
積層体を前記磁石に吸着させて選別する請求項8に記載
の半導体ウエハ組立体切断法。
9. The cutting of the semiconductor wafer assembly according to claim 8, wherein a magnet is brought close to the semiconductor chip laminate, and the semiconductor chip laminate having the magnetic material layer having a poor shape is attracted to the magnet and selected. Law.
【請求項10】 磁気感応素子により前記磁性物質層を
有する形状不良の半導体チップ積層体を選別する請求項
8に記載の半導体ウエハ組立体切断法。
10. The method for cutting a semiconductor wafer assembly according to claim 8, wherein a semiconductor chip laminate having a shape defect having the magnetic material layer is selected by a magnetically sensitive element.
【請求項11】 直径方向面又は直径方向面と平行な面
に沿って切断した前記半導体ウエハ積層体の切断部に接
着用樹脂を充填して、板状の前記半導体ウエハ積層体間
を前記接着用樹脂で固着する工程と、前記の面と直角な
面に沿って更に前記半導体ウエハ積層体を切断する工程
と、エッチング液中に前記半導体ウエハ積層体を浸漬し
て、前記接着用樹脂を溶解し、半導体チップ積層体を形
成する工程とを含む請求項8に記載の半導体ウエハ組立
体切断法。
11. A cutting portion of the semiconductor wafer laminated body cut along a diametrical surface or a plane parallel to the diametrical surface is filled with an adhesive resin to bond the plate-shaped semiconductor wafer laminated bodies to each other. Fixing with a resin for application, further cutting the semiconductor wafer laminate along a plane perpendicular to the plane, and immersing the semiconductor wafer laminate in an etchant to dissolve the adhesive resin. 9. A method for cutting a semiconductor wafer assembly according to claim 8, further comprising: forming a semiconductor chip laminate.
JP3942099A 1999-02-18 1999-02-18 Semiconductor wafer, and cutting method thereof, and semiconductor wafer assembly and cutting method thereof Pending JP2000243797A (en)

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Application Number Priority Date Filing Date Title
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Publication Number Publication Date
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