JP2000224757A - Motor protective circuit, motor driving circuit, and printer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent erroneous operation at retention operation, and abnormal heating or damage of a motor or a motor driving element caused by abnormal operation at driving operation. SOLUTION: Protective circuits 11 and 12 are judged as driving operation from excitation current set values IS1 and IS2 held at carriage current setting registers 9 and 10 or detected currents IA and IB for indicating excitation currents at motors 15 and 18. Under these conditions, the protective circuits 11 and 12 are judged as abnormal operation when a phase change of phase signals PSA and PSB are not detected for a given time or above, and the phase signals PSA and PSB are stopped. In this case, the phase change can be detected by detecting directly an edge change of the phase signals PSA and PSB fed to a driving circuit. When the protective circuits 11 and 12 are judged as retention operation, the power is fed to driving circuits 14 and 17 directly without breaking the phase signals PSA and PSB.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor protection circuit, a motor drive circuit, and a printer for preventing abnormal heat generation and breakage of a motor such as a stepping motor and a motor drive element.

[0002]

2. Description of the Related Art Conventionally, in a printer or the like, a stepping motor (hereinafter, referred to as a motor) has been used to drive a print head and a paper feed mechanism. The motor outputs a phase signal (for example, 4
Phase), a motor drive circuit including a motor drive element (switching element) that performs on / off operation according to
It is driven by sequentially switching the drive current to each phase (or two-phase unit). Normally, a relatively large excitation current flows when the motor is driven, and a smaller excitation current flows when the motor is stopped at a predetermined position than when the motor is driven.

[0003] In the motor drive circuit described above, abnormal heat generation and damage of the motor and the motor drive element, which are caused by a large exciting current continuing to flow through the coil of the motor due to runaway of the software for driving the motor or erroneous setting of the parameter, occur. To prevent this, a motor protection circuit is provided. For example, Japanese Patent Application Laid-Open No. 56-162999 discloses that if a phase switching signal supplied from an external control device or the like is used as a trigger, a timer is started, and if the phase switching signal is not supplied again until the time is up, the motor is stopped. There is disclosed a motor protection circuit that determines that the exciting current is fixedly continuing to flow in any one of the coils of the motor, cuts off the common signal or the phase input signal, and cuts off the exciting current to the motor.

[0004]

As described above, the motor protection circuit according to the prior art controls the count operation by the timer in accordance with the phase switching signal supplied from the outside, so that the drive current to the motor at the time of abnormality is controlled. Was shut off. However, in a device adopting a so-called one-chip configuration in which a motor control system is configured by one integrated circuit, a phase switching signal serving as a trigger of a timer cannot be taken out. Therefore, a motor protection circuit can be applied. There is a problem that can not be.

Further, in the motor protection circuit according to the prior art, when the motor is stopped at a predetermined position and the holding operation is performed, phase switching is not performed, so complicated control for retriggering the timer is required. If this control is not performed, the phase signal is cut off even in the abnormal state, and the holding state is released. Also,
If the switching signal is generated by the phase rewrite signal, if the rewriting is continued in the same phase state, the protection function does not work despite the high current flowing to the motor and the motor drive element, causing abnormal heating or damage There is a problem that you do. These motor protection circuits are in a standby state with the main power supply turned on, and are not suitable as motor protection circuits for printers in which the motor holding state continues for a long time.

The present invention has been made in view of the above circumstances, and can prevent erroneous control during a motor holding operation, as well as a motor and a motor driving element due to software runaway or incorrect parameter setting during a motor driving operation. It is an object of the present invention to provide a motor protection circuit, a motor driving circuit, and a printer that can prevent abnormal heat generation and damage of the motor.

[0007]

In order to solve the above-mentioned problems, according to the first aspect of the present invention, an exciting current is supplied to an exciting phase of a motor in accordance with a pulse-like phase signal, and a preset current is set. An operation determining means for determining an operation state of the motor in a motor protection circuit for preventing abnormal heating or damage caused by an excessive current to the motor in the motor drive circuit for controlling the value of the exciting current based on the target current value; Detecting means for detecting a change in the phase signal supplied to the circuit; and, when the operation determining means determines that the motor is in a driving operation, if the change in the phase signal is not detected by the detecting means within a predetermined time, the motor drive is started. Limiting means for interrupting the phase signal supplied to the circuit.

According to a second aspect of the present invention, in the motor protection circuit according to the first aspect, the operation determining means determines an operation state of the motor based on a preset target current value. It is characterized by.

According to a third aspect of the present invention, in the motor protection circuit according to the first aspect, the operation determining means determines an operating state of the motor based on an exciting current value flowing in an exciting phase of the motor. It is characterized by doing.

[0010] In order to solve the above-mentioned problems,
According to the fourth aspect of the present invention, a drive element that supplies an exciting current to an exciting phase of a motor in accordance with a pulse-like phase signal, and a target current corresponding to an operating state of the motor with respect to the exciting current flowing in the exciting phase of the motor Holding means for holding a value, constant current control means for controlling an exciting current value flowing in an exciting phase of the motor based on a target current value held by the holding means, and operation determining means for determining an operation state of the motor. Detecting means for detecting a change in a phase signal supplied to the drive element, and operation determining means, when the motor is determined to be a driving operation, and when the change in the phase signal is not detected by the detecting means within a predetermined time, Limiting means for interrupting the phase signal supplied to the motor drive element.

In order to solve the above-mentioned problems,
According to a fifth aspect of the present invention, a motor for driving a movable portion associated with a printing operation, an exciting current is supplied to an exciting phase of the motor in accordance with a pulse-like phase signal, and the exciting is performed based on a preset target current value. In a printer including a motor drive circuit that controls the value of a current, an operation determination unit that determines an operation state of the motor, a detection unit that detects a change in a phase signal supplied to the motor drive unit, and an operation determination unit. And limiting means for cutting off the phase signal supplied to the motor driving means when it is determined that the motor is in a driving operation and no change in the phase signal is detected by the detecting means within a predetermined time. .

According to the present invention, the operation determining means determines whether the operation state of the motor is a driving operation or a holding operation. The detecting means detects a change in a phase signal supplied to the motor drive circuit. The limiting means determines that the motor is in a driving operation by the operation determining means, and determines that the motor is in an abnormal operation if the detection means does not detect a change in the phase signal within a predetermined time. Block the phase signal supplied to. As a result, it is possible to prevent abnormal heat generation and damage of the motor and the motor driving element caused by software runaway or erroneous parameter setting during the driving operation of the motor. Further, when the operation determining means determines that the motor is in the holding operation, the phase signal supplied to the motor driving circuit is not interrupted and is supplied to the motor driving circuit as it is. Erroneous control can be prevented. Further, by applying this motor drive circuit to a printer, even when the protection operation of the motor is continuously performed for a long time during standby, overcurrent to the motor due to erroneous control can be reliably prevented.

[0013]

Embodiments of the present invention will now be described with reference to the drawings. A. Basic Configuration of Printer FIG. 1 is a block diagram showing a configuration of a printer using a motor drive circuit to which a motor protection circuit according to one embodiment of the present invention is applied. In the figure, a CPU 1 controls the operation of the entire printer by executing a predetermined program. The ROM 2 stores the above programs and the like. The RAM 3 is used as a working area when the CPU 1 executes a program. The interface 5, the print head 6, and various sensors 7 are connected to the I / O driver 4. The pattern generator 8 stores a plurality of phase signals for driving a carriage motor 15 and a paper feed motor 18, which will be described later, in a plurality of patterns. The CPU 1 converts the phase signals PSA and PSB of a predetermined pattern into the protection circuit 11, 12.

The carriage current setting register 9 stores the above C
The excitation current setting value IS1 flowing through each phase of the carriage motor 15, which is written in advance in the control sequence by the PU1, is held, and the protection circuit 11 and the constant current limiting circuit 1
Supply 3 The excitation current set value IS1 is an operation current value indicating an excitation current at the time of driving operation when driving the carriage motor 15, or a holding current indicating an excitation current at the time of holding operation in which the carriage motor 15 is stopped at a predetermined position. One of the current values is written.

The paper feed current setting register 10 stores the CP
Pre-written in the control sequence by U1,
The exciting current set value IS2 flowing through each phase of the paper feed motor 18 is held and supplied to the protection circuit 12 and the constant current limiting circuit 16. As the exciting current set value IS2, the paper feed motor 1
Either an operating current for driving the motor 8 or a holding current value for holding the paper feed motor 18 at a predetermined position is written. Note that the operating current and the holding current have a relationship of operating current> holding current, and are appropriately set by the CPU 1 according to the control sequence.

Next, in a first embodiment to be described later, the protection circuit 11 determines whether the driving operation or the holding operation is performed based on the exciting current setting value IS1 held in the carriage current setting register 9. , Carriage motor 15
Of the carriage motor 15 based on the phase signal PSA supplied to the drive circuit
, An abnormal operation at the time of driving is detected, and if the operation is abnormal, the phase signal PSA is cut off and an error detection signal ER is supplied to the CPU 1. In a second embodiment described later, the protection circuit 11 is provided with a carriage motor 15.
It is determined whether the operation is a driving operation or a holding operation based on a detection current IA indicating an exciting current flowing through the motor, and a phase signal PSA supplied to a driving circuit 14 of the carriage motor 15 which will be described later.
Based on the result of the operation determination, an abnormal operation when the carriage motor 15 is driven is detected. If the operation is abnormal, the phase signal PSA is cut off and an error detection signal ER is supplied to the CPU 1.

Similarly, in a first embodiment to be described later, the protection circuit 12 determines whether the driving operation or the holding operation is performed based on the excitation current setting value IS2 held in the paper feed current setting register 10. And a driving circuit 17 described later.
An abnormal operation during driving of the paper feed motor 18 is detected based on the phase signal PSB supplied to the CPU 1 and the operation determination result. If the operation is abnormal, the phase signal PSB is cut off and the error detection signal ER is output to the CPU 1. To supply. In a second embodiment to be described later, the protection circuit 12 determines whether the operation is a driving operation or a holding operation based on a detection current IB indicating an exciting current flowing to the paper feed motor 18. An abnormal operation at the time of driving the paper feed motor 18 is detected based on the phase signal PSB supplied to and the operation determination result.
In addition to blocking the phase signal PSB, the error detection signal ER
Is supplied to the CPU 1.

The constant current control circuit 13 feeds back the excitation current set value IS1 held in the carriage current setting register 9 and a drive circuit 14 described later.
The phase signal PSA is pulse-width-modulated based on the detected current IA indicating the actual excitation current flowing through the carriage motor 15 and supplied to the drive circuit 14. The drive circuit 14 controls on / off of the excitation current to the carriage motor 15 according to the pulse width modulated phase signal PSA. The carriage motor 15 is a motor for moving the print head 6,
For example, it comprises a four-phase stepping motor. The carriage motor 15 is driven by an excitation current that is turned on / off by the drive circuit 14.

The constant current control circuit 16 detects the exciting current set value IS2 held in the paper feed current setting register 10 and the actual exciting current flowing through the paper feed motor 18 which is fed back from a drive circuit 17 described later. Based on the current IB, the phase signal PSB is pulse width modulated and supplied to the drive circuit 17. The drive circuit 17 controls on / off of the excitation current to the paper feed motor 18 in accordance with the pulse width modulated phase signal PSB. The paper feed motor 18 is a motor for transporting the paper, and is, for example, a four-phase stepping motor. The paper feed motor 18 is driven by an exciting current that is turned on / off by the drive circuit 17.

B. First embodiment B-1. Detailed block diagram of the motor drive circuit 2 is a circuit diagram showing a part of a detailed configuration of a motor control system that includes a motor protection circuit according to the first embodiment of the present invention. Note that the same reference numerals are given to portions corresponding to FIG. In the following, the carriage current setting register 9 and the paper feed current setting register 10 shown in FIG. 1 will be described as current setting registers as common names, and the carriage motor 15 and the paper feed motor 18 will be described as motors as common names.

In FIG. 1, the protection circuit 11 (12) comprises a current judging section 20, a phase switching detecting section 21, a watchdog timer 22, a logic circuit 23, and a holding register 24. The current determining unit 20 compares the exciting current set value (digital data) IS set in the current setting register 9 (10) with a predetermined threshold value, and determines whether the holding current or the operating current is set. When the operating current is set, that is, when the motor 15 (1
8) When the driving operation is performed, the timer enable TE to the watchdog timer 22 is made active (for example, “High”). The phase switching detection unit 21
5 (18) Phase signals PS1 to PS for flowing current to each phase
4 is detected (rising edge or falling edge), the clear signal CLR is output to the watchdog timer 2
Supply to 2.

When the timer enable TE from the current judging unit 20 becomes active, the watchdog timer 22 starts the timer count operation and waits until a predetermined time (for example, 30 ms) elapses, that is, until the time is up. If the clear signal CLR is not supplied, the limit signal LS (“Low”) is supplied to the logic circuit 23 and the holding register 24 when the time is up. In addition, the watchdog timer 22 resets the count value when the clear signal CLR is supplied from the phase switching detecting unit 21 by detecting the phase switching, and when the timer enable TE is active, Restart the counting operation.

The logic circuit 23 includes phase signals PS1 to PS
4 is provided with a plurality of AND circuits corresponding to each of the AND circuits. A phase signal is supplied to one input terminal of each AND circuit. The signal LS is supplied. Each AND
The circuits each take the logical product of the phase signal supplied to the respective input and the limiting signal LS. The logic circuit 23
When the limit signal LS from the watchdog timer 22 is "Hi
gh ”, the phase signals PS1 to PS1
PS4 is supplied as it is to the logic circuit 35 of the constant current control circuit 13 (16), and the phase signals PS1 to P4 are output while the limit signal LS from the watchdog timer 22 is "Low".
S4 is not output.

That is, when driving the motor 15 (18), if the phase switching of the phase signals PS1 to PS4 is not performed for a predetermined time or more, it is determined that the operation is abnormal.
The watchdog timer 22 controls the phase signals PS1 to PS4.
, The excitation current to the motor 15 (18) is cut off, and abnormal heat generation and damage of the motor and the motor drive element due to software runaway or incorrect parameter setting during motor operation are prevented. I have.

When the holding signal 24 is supplied with the limit signal LS from the watchdog timer 22, the holding register 24 sets a flag and outputs the error signal ER to the CPU 1 shown in FIG.
To supply. Upon receiving the error occurrence signal ER, the CPU 1 executes a predetermined error process.

The constant current control circuit 13 (16) comprises a D / A converter 30, comparators 31 and 32, chopping timers 33 and 34, and a logic circuit 35. The D / A converter 30 is connected to the current setting register 9
The exciting current set value IS stored in (10) is converted into an analog signal and supplied to the comparators 31 and 32.
The comparators 31 and 32 respectively detect detection currents I1 and I2 (actually, voltage values V1 and
V2) is compared with the excitation current set value IS from the D / A converter 30, and when the detection currents I1 and I2 become large,
The output that becomes “High” is output to the chopping timers 33 and 3.
4 Each of the chopping timers 33 and 34 performs a predetermined time when the comparator output is “High”, that is, when the detection currents I1 and I2 are larger.
A “Low” chopping signal CS is supplied to the logic circuit 35.

The logic circuit 35 includes phase signals PS1 to PS
4 is composed of a plurality of AND circuits corresponding to each of the four. Phase signals PS1 to PS1 are input to one input terminal of each AND circuit.
PS4 is supplied, and the other input terminal is connected to the chopping signals CS from the chopping timers 33 and 34.
Is supplied. Each of the AND circuits 35a to 35d calculates the logical product of the phase signal supplied to its input terminal and the chopping signal CS. The logic circuit 35 includes a chopping signal C from the chopping timers 33 and 34.
While S is "High", the phase signals PS1 to PS4 are directly supplied to (the gate of) the FET array 40 of the drive circuit 14 (17), and the chopping signals CS from the chopping timers 33 and 34 are "Low". During a certain period, the phase signals PS1 to PS4 are not output. As a result, the phase signals PS1 to PS4 are pulse-width-modulated and supplied to the drive circuit 14 (17).
Limit the exciting current to (18).

The driving circuit 14 (17) is provided with the FET array 4
0 and current detection resistors R1 and R2. The FET array 40 includes a plurality of FETs for controlling on / off of an exciting current flowing through each phase of the motor 15 (18).
Are turned on when the phase signal supplied from the logic circuit 35 of the constant current limiting circuit 13 (16) is “High” and turned off when the phase signal is “Low”, so that the motor 15 (18) On / off control of the exciting current flowing through the coils L1 to L4. Current detection resistor R
1 and R2 are the coils L1 and L1, respectively, of the motor 15 (18).
An exciting current flowing through L2 and coils L3 and L4 is detected.

B-2. Next, the operation of the motor drive circuit to which the motor protection circuit according to the first embodiment of the present invention is applied will be described. First,
The CPU 1 sets an exciting current set value IS in the current setting register 9 (10) in advance. Pattern generator 8
When the phase signals PS1 to PS4 are transmitted from the
1 (12) is the current setting register 9
It is determined whether the exciting current set value IS set in (10) is the operating current value or the holding current value. If the operating current value is set, the timer enable TE is set to the watchdog timer 22. Supply. Thereby, the watchdog timer 22 starts time counting.

When the phase signals PS1 to PS4 change before the time of the watchdog timer 22 expires and the phase switching is detected by the phase switching detecting section 21, the clear signal CLR is supplied to the watchdog timer 22. You. Therefore, the limit signal LS is not output from the watchdog timer 22, and the phase signals PS1 to PS4 are supplied via the logic circuits 23 and 35 to the FE of the drive circuit 14 (17).
It is supplied to the T array 40. In the FET array 40, on / off control of the FET is performed according to the supplied phase signal, and an exciting current flows to the motor 15 (18).

As a result, a potential is generated in the current detection resistors R1 and R2, and the detected currents I1 and I2 (voltages V1 and V2)
Is compared by the comparators 31 and 32 with the exciting current set value IS converted into an analog value by the D / A converter 30. When either of the detection currents I1 and I2 exceeds the excitation current set value IS, the chopping timers 33 and 34 are activated, and the logic circuit 35 cuts off the phase signals PS1 to PS4 for a predetermined time. Chopping timer 3
When the time of 3, 34 is up, the logic circuit 3
At 5, the phase signals PS1 to PS4 are passed. By repeating this, the phase signals PS1 to PS4 are subjected to pulse width modulation, and the exciting current of the motor 15 (18) is set to the exciting current set value IS set in the current setting register 9 (10).
Is controlled without exceeding.

In the above control process, if the phase signals PS1 to PS4 do not change due to some trouble,
Since the watchdog timer 22 times out and the limit signal LS is supplied to the logic circuit 23, the phase signal PS
1 to PS4 are all shut off. The holding register 24
A flag indicating that an error has occurred is set, and an error occurrence signal ER is supplied to the CPU 1. The CPU 1 performs a predetermined error process. Therefore, even if software runaway or parameter setting error occurs during the driving operation, the phase signal PS1
To PS4 are cut off, so that a large current does not continuously flow through the coils L1 to L4 of the motor 15 (18). As a result, it is possible to prevent the motor 15 (18) and the motor drive element (FET array 40) from being abnormally heated or damaged.

When the current judging section 20 of the protection circuit 11 (12) determines that the exciting current set value IS set in the current setting register 9 (10) is the holding current value, the timer is activated. Since the enable TE does not become active, the watchdog timer 22 does not start timer counting. Therefore, in the logic circuit 23, the phase signals PS1 to PS4 are not cut off, so that erroneous control when the motor is held does not occur.

When the motor 15 (18) is to be held, an exciting current according to a relatively small holding current value set in the current setting register 9 (10) is applied to the motor 15 (18). Will flow. In this case, if a large excitation current set value IS is set in the current setting register 9 (10) for some reason such as a runaway of software, a large excitation current continuously flows through any one of the coils of the motor 15 (18). It is feared that abnormal heat generation or breakage may occur.

However, according to the first embodiment,
It is determined whether or not to activate the watchdog timer 22 based on the magnitude of the exciting current set value IS set in the current setting register 9 (10). In other words, it is determined whether the operation is the driving operation or the holding operation. Therefore, as described above, despite the holding operation,
Even if a large excitation current set value IS is set in the current setting register 9 (10) for some reason, the watchdog timer 22 is started and the phase signals PS1 to PS
4 can be cut off, and abnormal heat generation and breakage of the motor 15 (18) and the motor drive element (FET array 40) can be prevented.

C. Second embodiment C-1. Detailed Configuration of Motor Drive Circuit FIG. 3 is a circuit diagram showing a detailed configuration of a part of a motor control system to which a motor protection circuit according to a second embodiment of the present invention is applied. The same reference numerals are given to the portions corresponding to FIG. In the figure, a register 50 holds a detection current value DI for detecting that an exciting current flowing through each phase of the motor 15 (18) exceeds a holding current value,
It is supplied to the D / A converter 51. The above detection current value D
I is a value larger than the exciting current actually flowing through the motor 15 (18) when the motor 15 (18) is held, and smaller than the exciting current when the motor 15 (18) is driven. I do. The detection current value DI is previously written in the control sequence by the CPU 1 shown in FIG. The D / A converter 51 converts the detection current value DI into an analog value,
2 and 53.

The comparators 52 and 53 respectively provide detection currents I1 and I2 (actually a voltage value V proportional to the excitation current) indicating the excitation current detected by the current detection resistors R1 and R2.
1, V2) and the detection current value DI from the D / A converter 51. If the detection currents I1 and I2 are large, an output that becomes “High” is supplied to the OR circuit 54. When one of the comparator outputs becomes “High”, that is, the OR circuit 54 detects the detection currents I1 and I2.
Is larger, the output that becomes “High” is supplied to the watchdog timer 22 as the timer enable TE.

C-2. Operation of Second Embodiment Next, the operation of the motor drive circuit to which the motor protection circuit according to the second embodiment of the present invention is applied will be described. First,
The excitation current setting value IS is set in the current setting register 9 (10) in advance by the CPU 1, and
Is set in advance to the detection current value DI. Next, when the phase signals PS1 to PS4 are transmitted from the pattern generator 8, the phase signals PS1 to PS4 are output to the logic circuits 23 and 3 respectively.
5 is supplied to the FET array 40 of the drive circuit 14 (17). In the FET array 40, the corresponding FET is turned on / off according to the supplied phase signals PS1 to PS4.
The control is turned off, and the exciting current flows to the motor 15 (18).

As a result, a potential is generated in the current detection resistors R1 and R2, and the detected currents I1 and I2 (voltages V1 and V2)
Is compared by the comparators 31 and 32 with the exciting current set value IS converted into an analog value by the D / A converter 30. When the detection currents I1 and I2 exceed the excitation current set value IS, the chopping timers 33 and 34 are activated, and the logic circuit 35 outputs the phase signals PS1 to PS3 for a predetermined time.
PS4 is shut off. When the time of the chopping timers 33 and 34 expires, the logic circuit 35 passes the phase signals PS1 to PS4 again. By repeating this, the phase signals PS1 to PS4 are pulse width modulated, and the exciting current of the motor 15 (18) is controlled without exceeding the exciting current set value IS set in the current setting register 9 (10). You.

On the other hand, the detection current value DI held in the register 50 is converted into an analog value by the D / A converter 51 and supplied to one input terminal of the comparators 52 and 53. The comparators 52 and 53 compare the detection currents I1 and I2 indicating the excitation currents detected by the current detection resistors R1 and R2 with the detection current value DI from the D / A converter 51, respectively. When I2 is large, that is, when the driving operation is performed, "High"
Is supplied to the OR circuit 54. OR circuit 54
When the output of one of the comparators becomes “High”, that is, when the detection currents I1 and I2 become larger, the output that becomes “High” is output to the timer enable TE.
To the watchdog timer 22. Thereby, the watchdog timer 22 starts time counting.

In the normal operation, the phase signal P is set before the watchdog timer 22 times out.
Since S1 to PS4 change, the phase switching is detected by the phase switching detecting unit 21, and the clear signal CLR is supplied to the watchdog timer 22. Therefore, the limit signal LS is not output from the watchdog timer 22, and the phase signals PS1 to PS4 are output via the logic circuits 23 and 35.
It is supplied to the FET array 40 of the drive circuit 14 (17). In the FET array 40, the supplied phase signals PS1 to PS1
According to PS4, the corresponding FET is turned on / off, and an exciting current flows to the motor 15 (18).

In the above control process (normal operation),
When the phase signals PS1 to PS4 do not change due to some problem, the watchdog timer 22 times out and the limit signal LS is supplied to the logic circuit 23, so that all the phase signals PS1 to PS4 are cut off. Further, a flag indicating the occurrence of an error is set in the holding register 24, and the CP
An error occurrence signal ER is supplied to U1. CPU1
Perform predetermined error processing. Therefore, even if software runaway or erroneous parameter setting occurs during the driving operation, all of the phase signals PS1 to PS4 are cut off, so that a large current continuously flows through the coils L1 to L4 of the motor 15 (18). There is no. As a result, it is possible to prevent the motor 15 (18) and the motor drive element (FET array 40) from being abnormally heated or damaged.

In the comparators 52 and 53,
The detection currents I1 and I2 indicating the excitation current are the detection current values DI.
If it is smaller, that is, if it is a holding operation,
The output that becomes “Low” is supplied to the OR circuit 54. OR
In the circuit 54, since the comparator output is “Low”, the timer enable TE is not activated, and the watchdog timer 22 does not start the timer count. Therefore, in the logic circuit 23, the phase signal P
Since S1 to PS4 are not interrupted, no erroneous control occurs when the motor is held.

[0044]

As described above, according to the present invention, the operation determining means determines whether the operating state of the motor is a driving operation or a holding operation, and the detecting means determines
If a change in the phase signal supplied to the motor drive circuit is detected, the operation determining means determines that the motor is in a driving operation, and if the change in the phase signal is not detected by the detecting means within a predetermined time, an abnormality is detected. Since it is determined that the motor is operating, the control means cuts off the phase signal supplied to the motor drive circuit, so that the motor and motor drive element abnormalities caused by software runaway or incorrect parameter setting during motor drive operation This has the advantage that heat generation and breakage can be prevented. When the operation determining unit determines that the motor is in the holding operation, the phase signal supplied to the motor drive circuit is not interrupted,
Since it is supplied to the motor drive circuit as it is, it is possible to prevent erroneous control during the motor holding operation.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a printer using a motor drive circuit to which a motor protection circuit according to an embodiment of the present invention has been applied.

FIG. 2 is a circuit diagram showing a detailed configuration of a part of a motor control system to which the motor protection circuit according to the first embodiment is applied.

FIG. 3 is a circuit diagram showing a detailed configuration of a part of a motor control system to which a motor protection circuit according to a second embodiment is applied.

[Explanation of symbols]

 PSA, PSB phase signal 9 carriage current setting register (holding means) 10 paper feed current setting register (holding means) 11, 12 protection circuit 13, 16 constant current control circuit (constant current control means) 14, 17 ... Driving circuit 15 ... Carriage motor (motor) 18 ... Paper feed motor (motor) 20 ... Current judging unit (operation judging unit) 21 ... Phase switching detecting unit (detecting unit) 22 ... Watchdog timer (limiting unit, clocking unit) 23: Logic circuit (limiting means, cut-off means) 40: FET array (drive element) 50: register (excitation current detection means) 51: D / A converter (excitation current detection means) 52, 53 ... comparator (excitation current detection means) 54) OR circuit (excitation current detecting means)

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 2C061 HH01 HJ10 HV02 HV22 HV23 HV44 5G044 AA01 AB02 AC01 AD01 AE01 CA01 CA07 CA11 CB01 CE08 5H580 AA05 BB05 CA12 EE03 FA13 FA14 FA22 FB05 FD14 FD16 GG04 HH22

Claims (5)

[Claims] A motor drive circuit that supplies an exciting current to an exciting phase of a motor in accordance with a pulse-like phase signal and controls the value of the exciting current based on a preset target current value. A motor protection circuit for preventing abnormal heating or damage caused by current; an operation determination unit for determining an operation state of the motor; a detection unit for detecting a change in the phase signal supplied to the motor drive circuit; When the determination unit determines that the motor is in the driving operation, a restriction that cuts off the phase signal supplied to the motor drive circuit unless a change in the phase signal is detected by the detection unit within a predetermined time. Means for protecting the motor. 2. The motor protection circuit according to claim 1, wherein the operation determination unit determines an operation state of the motor based on the preset target current value. 3. The motor protection circuit according to claim 1, wherein the operation determining means determines an operation state of the motor based on an exciting current value flowing in an exciting phase of the motor. 4. A drive element for flowing an exciting current to an exciting phase of a motor in accordance with a pulse-like phase signal, and a target current value corresponding to an operating state of the motor is held for the exciting current flowing to the exciting phase of the motor. Holding means, a constant current control means for controlling an exciting current value flowing in an exciting phase of the motor based on a target current value held by the holding means, and an operation determining means for determining an operation state of the motor. Detecting means for detecting a change in the phase signal supplied to the driving element; and the operation determining means determines that the motor is in a driving operation, and the detecting means detects the phase signal within a predetermined time. Limiting means for cutting off the phase signal supplied to the motor drive element when no change is detected. 5. A motor for driving a movable portion associated with a printing operation, an exciting current flowing to an exciting phase of the motor in accordance with a pulse-like phase signal, and the exciting current of the exciting current based on a preset target current value. A printer having a motor drive circuit for controlling a value; an operation determination unit for determining an operation state of the motor; a detection unit for detecting a change in the phase signal supplied to the motor drive unit; and the operation determination unit A limiting means for interrupting the phase signal supplied to the motor driving means when it is determined that the motor is in a driving operation and the detection means does not detect a change in the phase signal within a predetermined time. A printer comprising: