JP2000223519A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JP2000223519A
JP2000223519A JP11025971A JP2597199A JP2000223519A JP 2000223519 A JP2000223519 A JP 2000223519A JP 11025971 A JP11025971 A JP 11025971A JP 2597199 A JP2597199 A JP 2597199A JP 2000223519 A JP2000223519 A JP 2000223519A
Authority
JP
Japan
Prior art keywords
columnar
semiconductor device
sealing film
resin sealing
columnar electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11025971A
Other languages
Japanese (ja)
Other versions
JP3430289B2 (en
Inventor
Ichiro Mihara
一郎 三原
Osamu Kuwabara
治 桑原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP02597199A priority Critical patent/JP3430289B2/en
Priority to US09/487,165 priority patent/US6319851B1/en
Priority to TW089101623A priority patent/TW479303B/en
Priority to KR1020000005201A priority patent/KR100333060B1/en
Priority to CNB001007548A priority patent/CN1160769C/en
Publication of JP2000223519A publication Critical patent/JP2000223519A/en
Application granted granted Critical
Publication of JP3430289B2 publication Critical patent/JP3430289B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable columnar electrodes of a semiconductor device to absorb stresses. SOLUTION: A resin seal film 17 is formed, using a printing mask 14 and a squeegee 15. The mask 14 has a thickness adequately less than the height of columnar electrodes 12, and hence the top faces of the electrodes 12 are covered with the resin seal film 17 but the thickness of the seal film 17 between the columnar electrodes 12 is adequately less than the height of the columnar electrodes 12. Since the thickness of the seal film 17 between the columnar electrodes 12 is adequately less than the height of the columnar electrodes 12, the columnar electrodes 12 can absorb stresses, due to the thermal expansion coefficient difference between the Si substrate 11 and a circuit board in a temp. cycle test after mounting on the circuit board.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、柱状電極を有す
る半導体装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a columnar electrode.

【0002】[0002]

【従来の技術】半導体チップ単体やCSP(Chip Size P
ackage)等の半導体装置では、半導体基板あるいは中間
基板(インターポーザ)上に、他の回路基板等と接続さ
れる柱状電極が設けられている。従来のこのような半導
体装置の製造方法では、一例として、まず図8(A)に
示すように、ウエハ状態のシリコン基板(半導体基板)
1上に複数の柱状電極2が形成されたものを印刷用ステ
ージ3の上面に位置決めして載置する。次に、シリコン
基板1の上面に印刷用マスク4を位置合わせして載置す
る。印刷用マスク4は、図8(A)及び図9に示すよう
に、厚さが柱状電極2の高さよりもやや厚いマスク本体
4aにシリコン基板1の平面サイズよりもやや小さい円
形状の開口部4bが形成されたものからなっている。
2. Description of the Related Art A semiconductor chip alone or a CSP (Chip Size P)
In a semiconductor device such as an ackage, a columnar electrode connected to another circuit board or the like is provided on a semiconductor substrate or an intermediate substrate (interposer). In a conventional method of manufacturing such a semiconductor device, as an example, first, as shown in FIG. 8A, a silicon substrate (semiconductor substrate) in a wafer state is formed.
One having a plurality of columnar electrodes 2 formed thereon is positioned and mounted on the upper surface of a printing stage 3. Next, the printing mask 4 is positioned and placed on the upper surface of the silicon substrate 1. As shown in FIGS. 8A and 9, the printing mask 4 has a circular opening slightly smaller than the plane size of the silicon substrate 1 in a mask body 4 a having a thickness slightly larger than the height of the columnar electrode 2. 4b is formed.

【0003】次に、図8(B)に示すように、スキージ
5で液状樹脂からなる封止材6を印刷用マスク4の開口
部4b内に印刷し、硬化工程を経ることにより、樹脂封
止膜7を形成する。この状態では、柱状電極2の上面は
樹脂封止膜7によって覆われている。次に、樹脂封止膜
7の表面を適宜に研磨あるいはエッチングすることによ
り、図8(C)に示すように、柱状電極2の上面を露出
させる。次に、図8(D)に示すように、柱状電極2の
上面に半田ボール8を形成する。次に、ダイシング工程
を経ると、個々の半導体チップ(半導体装置)が得られ
る。
[0003] Next, as shown in FIG. 8 (B), a sealing material 6 made of a liquid resin is printed in the opening 4 b of the printing mask 4 with a squeegee 5, and a curing process is performed. The stop film 7 is formed. In this state, the upper surface of the columnar electrode 2 is covered with the resin sealing film 7. Next, by appropriately polishing or etching the surface of the resin sealing film 7, the upper surface of the columnar electrode 2 is exposed as shown in FIG. 8C. Next, as shown in FIG. 8D, a solder ball 8 is formed on the upper surface of the columnar electrode 2. Next, after a dicing step, individual semiconductor chips (semiconductor devices) are obtained.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、このよ
うにして得られた半導体装置では、例えば図8(C)に
示すように、樹脂封止膜7の厚さが柱状電極2の高さと
同じとなるので、柱状電極2が揺れ動きにくく、この結
果、図示しない回路基板上に搭載した後における温度サ
イクルテストにおいて、シリコン基板1と回路基板との
間の熱膨張係数差に起因して発生する応力を柱状電極2
で吸収することができず、不良が発生してしまうことが
あるという問題があった。この発明の課題は、柱状電極
で応力を吸収することができるようにすることである。
However, in the semiconductor device thus obtained, the thickness of the resin sealing film 7 is equal to the height of the columnar electrode 2 as shown in FIG. 8C, for example. Therefore, the columnar electrode 2 hardly swings, and as a result, in a temperature cycle test after mounting on a circuit board (not shown), stress generated due to a difference in thermal expansion coefficient between the silicon substrate 1 and the circuit board is reduced. Columnar electrode 2
There is a problem that it is not possible to absorb it and defects may occur. An object of the present invention is to enable a columnar electrode to absorb stress.

【0005】[0005]

【課題を解決するための手段】この発明は、基板上に形
成された複数の柱状電極間の前記基板上にスクリーン印
刷法により樹脂封止膜を厚さが前記柱状電極の高さより
も薄くなるように形成するようにしたものである。この
発明によれば、樹脂封止膜の厚さを柱状電極の高さより
も薄くしているので、柱状電極を揺れ動き易くすること
ができ、ひいては柱状電極で応力を吸収することができ
る。
According to the present invention, the thickness of a resin sealing film between a plurality of columnar electrodes formed on a substrate is reduced by a screen printing method on the substrate so as to be smaller than the height of the columnar electrodes. It is formed in such a manner. According to the present invention, since the thickness of the resin sealing film is made smaller than the height of the columnar electrode, the columnar electrode can be easily swung and the stress can be absorbed by the columnar electrode.

【0006】[0006]

【発明の実施の形態】(第1実施形態)図1(A)〜
(D)はそれぞれこの発明の第1実施形態における半導
体装置の各製造工程を示したものである。そこで、これ
らの図を順に参照して、この実施形態における半導体装
置の製造方法について説明する。まず、図1(A)に示
すように、ウエハ状態のシリコン基板11上に複数の柱
状電極12が形成されたものを印刷用ステージ13の上
面に位置決めして載置する。次に、シリコン基板11の
上面に印刷用マスク14を位置合わせして載置する。印
刷用マスク14は、図1(A)及び図2に示すように、
厚さが柱状電極12の高さよりも適宜に薄い(例えば柱
状電極12の高さの半分以下)マスク本体14aにシリ
コン基板11の平面サイズよりもやや小さい円形状の開
口部14bが形成されたものからなっている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIGS.
(D) shows each manufacturing process of the semiconductor device in the first embodiment of the present invention. Therefore, a method of manufacturing the semiconductor device according to this embodiment will be described with reference to these drawings in order. First, as shown in FIG. 1 (A), a silicon substrate 11 in a wafer state on which a plurality of columnar electrodes 12 are formed is positioned and placed on the upper surface of a printing stage 13. Next, the printing mask 14 is positioned and placed on the upper surface of the silicon substrate 11. The printing mask 14 is, as shown in FIGS.
A mask body 14a whose thickness is appropriately smaller than the height of the columnar electrode 12 (for example, half or less of the height of the columnar electrode 12) and in which a circular opening 14b slightly smaller than the plane size of the silicon substrate 11 is formed. Consists of

【0007】次に、図1(B)に示すように、ナイロン
等からなるスキージ15で液状樹脂からなる封止材16
を印刷用マスク14の開口部14b内に印刷し、硬化工
程を経ることにより、樹脂封止膜17を形成する。この
状態では、柱状電極12の上面は樹脂封止膜17によっ
て覆われているが、柱状電極12間における樹脂封止膜
17の厚さは柱状電極12の高さよりも適宜に薄くなっ
ている。なお、スキージ15をほぼ垂直にしてまたは若
干傾斜させて往復動させるようにしてもよい。次に、柱
状電極12上及びその近傍の樹脂封止膜17を適宜に研
磨あるいはエッチングすることにより、図1(C)に示
すように、柱状電極12の上面を露出させる。次に、図
1(D)に示すように、柱状電極12の上面に半田ボー
ル18を形成する。次に、ダイシング工程を経ると、個
々の半導体チップ(半導体装置)が得られる。
Next, as shown in FIG. 1B, a sealing material 16 made of a liquid resin is formed with a squeegee 15 made of nylon or the like.
Is printed in the opening 14b of the printing mask 14, and a curing process is performed to form the resin sealing film 17. In this state, the upper surface of the columnar electrode 12 is covered with the resin sealing film 17, but the thickness of the resin sealing film 17 between the columnar electrodes 12 is appropriately smaller than the height of the columnar electrode 12. Note that the squeegee 15 may be reciprocated substantially vertically or slightly inclined. Next, the upper surface of the columnar electrode 12 is exposed as shown in FIG. 1C by appropriately polishing or etching the resin sealing film 17 on and near the columnar electrode 12. Next, as shown in FIG. 1D, a solder ball 18 is formed on the upper surface of the columnar electrode 12. Next, after a dicing step, individual semiconductor chips (semiconductor devices) are obtained.

【0008】次に、このようにして得られた半導体装
置、すなわち図1(D)に示すような半導体装置を回路
基板上に搭載した場合について、図3を参照して説明す
る。半導体装置10は、半田ボール18が回路基板21
の上面の所定の箇所に設けられた接続パッド22に接合
されていることにより、回路基板21上に搭載されてい
る。
Next, the case where the semiconductor device thus obtained, that is, the semiconductor device as shown in FIG. 1D is mounted on a circuit board will be described with reference to FIG. In the semiconductor device 10, the solder balls 18 are
It is mounted on the circuit board 21 by being joined to the connection pad 22 provided at a predetermined position on the upper surface of the substrate.

【0009】ところで、半導体装置10の柱状電極12
間における樹脂封止膜17の厚さは柱状電極12の高さ
よりも適宜に薄くなっているので、柱状電極12を揺れ
動き易くすることができる。この結果、半導体装置10
を回路基板21上に搭載した後における温度サイクルテ
ストにおいて、シリコン基板11と回路基板21との間
の熱膨張係数差に起因して発生する応力を柱状電極12
で吸収することができ、ひいては不良が発生しにくいよ
うにすることができる。
The columnar electrode 12 of the semiconductor device 10
Since the thickness of the resin sealing film 17 between them is appropriately smaller than the height of the columnar electrode 12, the columnar electrode 12 can be easily shaken. As a result, the semiconductor device 10
In the temperature cycle test after mounting on the circuit board 21, the stress generated due to the difference in thermal expansion coefficient between the silicon substrate 11 and the circuit board 21
Can be absorbed, and as a result, defects can be prevented from occurring.

【0010】(第2実施形態)図4はこの発明の第2実
施形態における半導体装置の製造方法を説明するために
示したものである。この実施形態では、印刷用マスク1
4の厚さは、柱状電極12の高さと同じであってもよ
く、また柱状電極12の高さよりも薄くても厚くてもよ
い。その代わりに、印刷用ステージ13とスキージ15
とのうちいずれか一方を柱状電極12の配置に応じて上
下動させる。この場合、図5に示すように、印刷用マス
ク14は、マスク本体14aにシリコン基板11の平面
サイズよりもやや小さい円形状の開口部14bが形成さ
れ、この開口部14bの所定の両側におけるマスク本体
14aの上面に複数の溝14cが柱状電極12の配置に
応じて(すなわち柱状電極12間に対応する位置に)形
成されたものからなっている。溝14cの全体としての
長さLはスキージ18の長さよりも長くなっている。溝
14cの部分におけるマスク本体14aの厚さは、一例
として、柱状電極12の高さが100〜150μm程度
である場合には、30μm程度とする。
(Second Embodiment) FIG. 4 shows a method for manufacturing a semiconductor device according to a second embodiment of the present invention. In this embodiment, the printing mask 1
The thickness of 4 may be the same as the height of the columnar electrode 12, and may be smaller or larger than the height of the columnar electrode 12. Instead, the printing stage 13 and the squeegee 15
Is moved up and down according to the arrangement of the columnar electrodes 12. In this case, as shown in FIG. 5, in the printing mask 14, a circular opening 14b slightly smaller than the plane size of the silicon substrate 11 is formed in the mask body 14a, and masks on predetermined sides of the opening 14b are formed. A plurality of grooves 14c are formed on the upper surface of the main body 14a in accordance with the arrangement of the columnar electrodes 12 (that is, at positions corresponding to between the columnar electrodes 12). The overall length L of the groove 14c is longer than the length of the squeegee 18. As an example, the thickness of the mask body 14a in the groove 14c is about 30 μm when the height of the columnar electrode 12 is about 100 to 150 μm.

【0011】そして、例えば印刷用ステージ13を柱状
電極12の配置に応じて上下動させながら、スキージ1
5を図4において左側から右側に移動させると、図4に
おいて一点鎖線で示すように、スキージ15が印刷用マ
スク14の溝14cの部分において相対的に下降する。
かくして、スキージ15で液状樹脂からなる封止材16
を印刷用マスク14の開口部14e内に印刷し、硬化工
程を経ることにより、樹脂封止膜17を形成する。した
がって、この場合も、柱状電極12の上面は樹脂封止膜
17によって覆われるが、柱状電極12間における樹脂
封止膜17の厚さは柱状電極12の高さよりも適宜に薄
くなる。次に、柱状電極12上及びその近傍の樹脂封止
膜17を適宜に研磨あるいはエッチングすることによ
り、柱状電極12の上面を露出させる。次に、図示して
いないが、柱状電極12の上面に半田ボールを形成す
る。次に、ダイシング工程を経ると、個々の半導体チッ
プ(半導体装置)が得られる。
The squeegee 1 is moved up and down, for example, according to the arrangement of the columnar electrodes 12.
4 is moved from the left side to the right side in FIG. 4, the squeegee 15 relatively lowers at the groove 14c of the printing mask 14, as indicated by the dashed line in FIG.
Thus, the sealing material 16 made of a liquid resin is
Is printed in the opening 14e of the printing mask 14, and the resin sealing film 17 is formed through a curing process. Therefore, also in this case, the upper surface of the columnar electrode 12 is covered with the resin sealing film 17, but the thickness of the resin sealing film 17 between the columnar electrodes 12 is appropriately smaller than the height of the columnar electrode 12. Next, the upper surface of the columnar electrode 12 is exposed by appropriately polishing or etching the resin sealing film 17 on and near the columnar electrode 12. Next, although not shown, a solder ball is formed on the upper surface of the columnar electrode 12. Next, after a dicing step, individual semiconductor chips (semiconductor devices) are obtained.

【0012】(第3実施形態)図6(A)〜(D)はそ
れぞれこの発明の第3実施形態における半導体装置の各
製造工程を示したものである。この実施形態における印
刷用マスク14は、図6(A)及び図7に示すように、
厚さが柱状電極12の高さよりも適宜に厚いマスク本体
14aの下面にシリコン基板11の平面サイズよりもや
や小さい円形状の凹部14dが形成され、この凹部14
dの部分におけるマスク本体14aに複数のスリット状
の開口部14eが柱状電極12の配置に応じて(すなわ
ち柱状電極12間に対応する位置に)形成されたものか
らなっている。この場合、凹部14dの深さは柱状電極
12の高さと同じとなっている。開口部14eの幅dは
柱状電極12間の間隔Dよりも適宜に小さくなってい
る。
(Third Embodiment) FIGS. 6A to 6D show respective manufacturing steps of a semiconductor device according to a third embodiment of the present invention. As shown in FIGS. 6A and 7, the printing mask 14 in this embodiment
On the lower surface of the mask body 14a whose thickness is appropriately larger than the height of the columnar electrode 12, a circular concave portion 14d slightly smaller than the plane size of the silicon substrate 11 is formed.
A plurality of slit-shaped openings 14e are formed in the mask main body 14a at the portion d in accordance with the arrangement of the columnar electrodes 12 (that is, at positions corresponding to between the columnar electrodes 12). In this case, the depth of the recess 14 d is the same as the height of the columnar electrode 12. The width d of the opening 14e is appropriately smaller than the interval D between the columnar electrodes 12.

【0013】そして、まず図6(A)に示すように、シ
リコン基板11を印刷用ステージ13の上面に位置決め
して載置し、次いでシリコン基板11の上面に印刷用マ
スク14を位置合わせして載置する。この状態では、柱
状電極12の上面は、印刷用マスク14のうち開口部1
4e間におけるマスク本体14aによって覆われてい
る。
Then, as shown in FIG. 6A, the silicon substrate 11 is positioned and placed on the upper surface of the printing stage 13, and then the printing mask 14 is positioned on the upper surface of the silicon substrate 11. Place. In this state, the upper surface of the columnar electrode 12 is
It is covered by the mask body 14a between 4e.

【0014】次に、図6(B)に示すように、スキージ
15で液状樹脂からなる封止材16を印刷用マスク14
の開口部14e内に印刷し、硬化工程を経ることによ
り、樹脂封止膜17を形成する。この場合、印刷用マス
ク14の開口部14eの幅dが柱状電極12間の間隔D
よりも適宜に小さくなっているので、開口部14eを介
して柱状電極12間におけるシリコン基板11上に印刷
される封止材16の量が適宜に少なく、且つ、この印刷
された封止材16が表面張力により流動して柱状電極1
2の側面を覆うようになる。したがって、この場合に
は、図6(C)に示すように、柱状電極12の上面は樹
脂封止膜17によって覆われず、且つ、柱状電極12間
における樹脂封止膜17の厚さは柱状電極12の高さよ
りも適宜に薄くなる。したがって、この場合には、樹脂
封止膜17の表面を研磨またはエッチングする必要は無
い。次に、図6(D)に示すように、柱状電極12の上
面に半田ボール18を形成する。次に、ダイシング工程
を経ると、個々の半導体チップ(半導体装置)が得られ
る。
Next, as shown in FIG. 6B, a sealing material 16 made of a liquid resin is
The resin sealing film 17 is formed by performing printing in the opening 14e of the above and through a curing process. In this case, the width d of the opening 14 e of the printing mask 14 is equal to the distance D between the columnar electrodes 12.
The amount of the sealing material 16 printed on the silicon substrate 11 between the columnar electrodes 12 via the opening 14e is appropriately reduced, and the printed sealing material 16 Flows due to surface tension and the columnar electrode 1
2 will be covered. Therefore, in this case, as shown in FIG. 6C, the upper surface of the columnar electrode 12 is not covered with the resin sealing film 17, and the thickness of the resin sealing film 17 between the columnar electrodes 12 is columnar. The thickness is appropriately smaller than the height of the electrode 12. Therefore, in this case, it is not necessary to polish or etch the surface of the resin sealing film 17. Next, as shown in FIG. 6D, a solder ball 18 is formed on the upper surface of the columnar electrode 12. Next, after a dicing step, individual semiconductor chips (semiconductor devices) are obtained.

【0015】なお、図6(B)に示す印刷工程におい
て、図4に示す場合と同様に、印刷用ステージ13とス
キージ15とのうちいずれか一方を印刷用マスク14の
開口部14eの配置に応じて上下動させるようにしても
よい。この場合、印刷用マスク14の開口部14eの幅
dを柱状電極12間の間隔Dと同じとしてもよい。
In the printing step shown in FIG. 6B, one of the printing stage 13 and the squeegee 15 is moved to the position of the opening 14e of the printing mask 14 similarly to the case shown in FIG. You may make it move up and down according to it. In this case, the width d of the opening 14 e of the printing mask 14 may be the same as the distance D between the columnar electrodes 12.

【0016】また、上記各実施形態において、樹脂封止
膜を真空スクリーン印刷法により形成するようにしても
よい。このようにした場合には、樹脂封止膜中に空気
(気泡)が混入しないようにすることができる上、柱状
電極の根元の部分を樹脂封止膜でその間に空気(気泡)
を介在させることなく覆うことができる。また、樹脂封
止膜をディスペンサ方式により形成するようにしてもよ
い。
In each of the above embodiments, the resin sealing film may be formed by a vacuum screen printing method. In this case, air (bubbles) can be prevented from being mixed into the resin sealing film, and the root portion of the columnar electrode can be sealed with the resin sealing film between the air (bubbles).
Can be covered without intervening. Further, the resin sealing film may be formed by a dispenser method.

【0017】さらに、上記各実施形態では、半導体装置
の柱状電極の上面(露出面)に半田ボールを形成した場
合について説明したが、半田ボールを形成せずに、半導
体装置の柱状電極の露出面側を回路基板上に異方性導電
接着剤を介して搭載するようにしてもよい。
Further, in each of the above embodiments, the case where the solder ball is formed on the upper surface (exposed surface) of the columnar electrode of the semiconductor device has been described. However, the exposed surface of the columnar electrode of the semiconductor device is formed without forming the solder ball. The side may be mounted on a circuit board via an anisotropic conductive adhesive.

【0018】[0018]

【発明の効果】以上説明したように、この発明によれ
ば、樹脂封止膜の厚さを柱状電極の高さよりも薄くして
いるので、柱状電極を揺れ動き易くすることができ、ひ
いては柱状電極で応力を吸収することができ、不良が発
生しにくいようにすることができる。
As described above, according to the present invention, the thickness of the resin sealing film is smaller than the height of the columnar electrode, so that the columnar electrode can be easily swung and moved. Can absorb the stress, and can prevent defects from occurring.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(A)〜(D)はそれぞれこの発明の第1実施
形態における半導体装置の各製造工程の断面図。
FIGS. 1A to 1D are cross-sectional views of respective manufacturing steps of a semiconductor device according to a first embodiment of the present invention.

【図2】図1(A)に示す印刷用マスクの平面図。FIG. 2 is a plan view of the printing mask shown in FIG.

【図3】図1(D)に示すような半導体装置を回路基板
上に搭載した状態の断面図。
FIG. 3 is a cross-sectional view illustrating a state where the semiconductor device as illustrated in FIG. 1D is mounted on a circuit board.

【図4】この発明の第2実施形態における半導体装置の
製造方法を説明するために示す断面図。
FIG. 4 is a cross-sectional view for explaining a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

【図5】図4に示す印刷用マスクの平面図。FIG. 5 is a plan view of the printing mask shown in FIG. 4;

【図6】(A)〜(D)はそれぞれこの発明の第3実施
形態における半導体装置の各製造工程の断面図。
FIGS. 6A to 6D are cross-sectional views of respective manufacturing steps of a semiconductor device according to a third embodiment of the present invention.

【図7】図6(A)に示す印刷用マスクの平面図。FIG. 7 is a plan view of the printing mask shown in FIG.

【図8】(A)〜(D)はそれぞれ従来の半導体装置の
一例の各製造工程の断面図。
8A to 8D are cross-sectional views of respective manufacturing steps of an example of a conventional semiconductor device.

【図9】図8(A)に示す印刷用マスクの平面図。FIG. 9 is a plan view of the printing mask shown in FIG.

【符号の説明】[Explanation of symbols]

11 シリコン基板 12 柱状電極 13 印刷用ステージ 14 印刷用マスク 15 スキージ 17 樹脂封止膜 18 半田ボール Reference Signs List 11 silicon substrate 12 columnar electrode 13 printing stage 14 printing mask 15 squeegee 17 resin sealing film 18 solder ball

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 基板上に形成された複数の柱状電極間の
前記基板上にスクリーン印刷法により樹脂封止膜を厚さ
が前記柱状電極の高さよりも薄くなるように形成するこ
とを特徴とする半導体装置の製造方法。
1. A method according to claim 1, wherein a resin sealing film is formed on the substrate between the plurality of columnar electrodes formed on the substrate by screen printing so that the thickness is smaller than the height of the columnar electrodes. Semiconductor device manufacturing method.
【請求項2】 請求項1記載の発明において、前記樹脂
封止膜の形成は、厚さが前記柱状電極の高さよりも薄い
印刷用マスクを用いて行うことを特徴とする半導体装置
の製造方法。
2. The method according to claim 1, wherein the formation of the resin sealing film is performed using a printing mask having a thickness smaller than the height of the columnar electrode. .
【請求項3】 請求項1記載の発明において、前記樹脂
封止膜の形成は、スキージと前記基板とのうちいずれか
一方を前記柱状電極の配置に応じて上下動させて行うこ
とを特徴とする半導体装置の製造方法。
3. The invention according to claim 1, wherein the formation of the resin sealing film is performed by vertically moving one of a squeegee and the substrate in accordance with the arrangement of the columnar electrodes. Semiconductor device manufacturing method.
【請求項4】 請求項2または3記載の発明において、
前記樹脂封止膜をスクリーン印刷法により形成した後、
少なくとも前記柱状電極の上面に形成された樹脂封止膜
を除去することを特徴とする半導体装置の製造方法。
4. The invention according to claim 2 or 3,
After forming the resin sealing film by a screen printing method,
A method of manufacturing a semiconductor device, comprising removing at least a resin sealing film formed on an upper surface of the columnar electrode.
【請求項5】 請求項1記載の発明において、前記樹脂
封止膜の形成は、前記柱状電極の上面を覆う印刷用マス
クを用いて行うことを特徴とする半導体装置の製造方
法。
5. The method according to claim 1, wherein the resin sealing film is formed using a printing mask that covers an upper surface of the columnar electrode.
【請求項6】 請求項5記載の発明において、前記印刷
用マスクには複数のスリット状の開口部が前記柱状電極
の配置に応じて形成され、且つ、該開口部の幅が前記柱
状電極間の間隔よりも小さくなっていることを特徴とす
る半導体装置の製造方法。
6. The printing mask according to claim 5, wherein a plurality of slit-shaped openings are formed in the printing mask in accordance with the arrangement of the columnar electrodes, and the width of the openings is between the columnar electrodes. A method for manufacturing a semiconductor device, wherein the distance is smaller than the distance between the semiconductor devices.
JP02597199A 1999-02-03 1999-02-03 Method for manufacturing semiconductor device Expired - Fee Related JP3430289B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP02597199A JP3430289B2 (en) 1999-02-03 1999-02-03 Method for manufacturing semiconductor device
US09/487,165 US6319851B1 (en) 1999-02-03 2000-01-19 Method for packaging semiconductor device having bump electrodes
TW089101623A TW479303B (en) 1999-02-03 2000-01-31 Methods for packaging semiconductor device having bump electrodes
KR1020000005201A KR100333060B1 (en) 1999-02-03 2000-02-02 Method for packging semiconductor device having bump electrodes
CNB001007548A CN1160769C (en) 1999-02-03 2000-02-03 Method for packaging semiconductor device with convex electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02597199A JP3430289B2 (en) 1999-02-03 1999-02-03 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JP2000223519A true JP2000223519A (en) 2000-08-11
JP3430289B2 JP3430289B2 (en) 2003-07-28

Family

ID=12180626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP02597199A Expired - Fee Related JP3430289B2 (en) 1999-02-03 1999-02-03 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP3430289B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6467674B1 (en) * 1999-12-09 2002-10-22 Casio Computer Co., Ltd. Method of manufacturing semiconductor device having sealing film on its surface
WO2003003798A1 (en) * 2001-06-29 2003-01-09 Toray Engineering Co., Ltd. Joining method using anisotropic conductive adhesive
CN116825752A (en) * 2023-08-29 2023-09-29 江西兆驰半导体有限公司 Wafer and printing method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6467674B1 (en) * 1999-12-09 2002-10-22 Casio Computer Co., Ltd. Method of manufacturing semiconductor device having sealing film on its surface
WO2003003798A1 (en) * 2001-06-29 2003-01-09 Toray Engineering Co., Ltd. Joining method using anisotropic conductive adhesive
CN116825752A (en) * 2023-08-29 2023-09-29 江西兆驰半导体有限公司 Wafer and printing method thereof
CN116825752B (en) * 2023-08-29 2024-02-09 江西兆驰半导体有限公司 Wafer and printing method thereof

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