JP2000215620A - Data recording apparatus and its method for determining rewrite - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a rewrite ratio without increasing the danger of data being not correctly reproduced. SOLUTION: In the data recording apparatus for recording record data to which C1 and C2 codes constituting a product code are added, data of one track is constituted of 96 fragments and the C2 (32, 26) code is generated with an interleave of every 3 fragments. A calculating circuit 82 calculates syndromes S0-S5 in relation to two C1 sequence data of each fragment. A detecting circuit 83 outputs a detected signal Sdet1 for each fragment based on the syndromes when both of the two C1 sequence data have 0 error. Counters 84a-84c count the number of detected signals Sdet1 for every 96 fragments constituting one track in each interleave (32 fragments) related to an error correcting code C2 sequence. A system controller 1 determines rewrite on the basis of count values CE1-CE3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a data recording apparatus suitable for use in a recording system such as a data recorder using a (digital audio tape recorder) and a rewrite determination method thereof. Specifically, after recording the recording data to which the first and second error correction codes constituting the product code are added on a recording medium, the recording data is reproduced, and the first error correction code is used for the reproduced data. The quality of the data is determined for each generated block, and the number of blocks determined to be good is counted for each interleave related to the second error correction code sequence, and based on the count result. By determining whether or not to re-record the recording data on a recording medium, a data recording apparatus and a method for determining rewriting that greatly improve the rewrite ratio without increasing the possibility that the data cannot be correctly reproduced. It is related to.

[0002]

2. Description of the Related Art In a computer, in order to protect data written on a hard disk or the like, for example, 1
Once a day, these data are transferred to a data recorder called a data streamer and recorded.

Conventionally, a general analog audio tape recorder has been widely used as a data recorder. However, in this analog audio tape recorder, the consumption of the magnetic tape is extremely large, and the data rate at the time of recording is low, so that it takes time to record and transfer data. Further, the analog audio tape recorder has a disadvantage that it takes a long time to find desired data because a high-speed search operation cannot be performed.

Therefore, a helical scan type digital audio tape recorder (DA) using a rotary head
T) is used as a data recorder. For example, in the DDS3 format, as shown in FIG. 8, a pair of rotating magnetic heads scans two inclined tracks TA and TB on the magnetic tape 42 for each rotation of the rotating drum to record and reproduce signals. It is supposed to do.

In this case, one track is divided into a main data area and margin areas at both ends of the main data area, and 133 symbols are divided into 96 fragments as one fragment (block). Further, one fragment includes a first section of one symbol for recording a synchronization signal,
A second section of one symbol for recording a fragment address, a third section of five symbols for recording a subcode, a fourth section of two symbols for recording a header parity, and a second section of 124 symbols for recording data. 5 and the subcode and the fragment address are recorded together with the data in each fragment of the main data area.

As shown in FIG. 9, error correction codes C2 and C1 constituting a product code are added to the main data recorded in the fifth section of each fragment. Here, in the data section of 124 symbols of each fragment, two C symbols subjected to interleaving in units of two symbols are used.
1 (62, 56) code (see FIG. 10) is arranged. Further, a C2 (32, 26) code interleaved in units of four fragments (four blocks) is formed in the track direction, and the error correction code C2 is arranged at the center of the main data area.

FIG. 11 shows a data structure of a C1 sequence subjected to interleaving in units of two symbols. One C1 (62, 5) is formed by 62 symbols shown in the same figure.
6) The code is configured. FIG. 12 shows a data structure of a C2 sequence subjected to interleaving in units of three fragments, and one C2 (32, 26) code is formed by 32 symbols shown in the same figure.

In the third section of each fragment,
As subcodes, a separator count, which is delimiter information indicating a break of main data, a record count, which indicates the number of records, an area ID, which indicates each area defined on a tape format, a frame number, which indicates an absolute position of a recording unit, a recording unit A group count indicating the number and a checksum are recorded.

FIG. 13 shows a tape format in the above-described data recorder. As shown in the figure, a physical tape start position (PBOT: Physical Beginning of TB) is provided at the head area following the leader tape as an area for loading and unloading the magnetic tape.
ape) to the logical tape start position (LBOT: Logical Begin
ning of Tape).
Next to the device area, a reference area and a system area are provided. The reference area is used as a physical reference when recording a system log (history information) in the system area. A data area for recording data is provided next to the system area, and an EOD (End of Data) area is provided next to this data area.

Further, as shown in FIG. 14, a reference area, a system area, a data area, and an EO
A two-partition tape having two partitions P1 and P2 composed of the D area is defined.

By the way, in the above data recorder,
In order to enable data to be correctly reproduced from the magnetic tape 42 during reproduction, after recording data is recorded on the magnetic tape 42, the recorded data is reproduced (read-after-write), and the data cannot be correctly obtained during reproduction. If there is a danger, the above recorded data is
It has a rewrite function to record again.

FIG. 15 shows a portion related to recording of a conventional data recorder, that is, a system controller 100 including a microcomputer, and a recording signal processing section for performing signal processing on recording data and converting the recording data into a signal of a predetermined format. 110 and a signal supplied from the recording system signal processing unit 110 are recorded on an inclined track on the magnetic tape 42 by a pair of recording rotary magnetic heads, and a signal recorded on the inclined track is reproduced by a pair of reproducing tracks. A recording / reproducing unit 120 that reproduces data using the rotating magnetic head for use, and whether or not to perform rewriting by using data reproduced by the recording / reproducing unit 120 is determined. 3 shows a rewriting function unit 130 to be controlled.

The recording / reproducing unit 120 has a pair of rotating magnetic heads WA, WB disposed at an angle of 180 °, and a pair of rotating magnetic heads RA, RB having 180 degrees.
A rotating drum 41 disposed at an angle of ゜ is provided. A magnetic tape 42 is wound around the rotating drum 41 over a range of about 90 ° so that the magnetic tape 42 runs at a predetermined traveling speed. Has become. Each time the rotary drum 41 rotates, the magnetic heads WA and WB and the magnetic heads RA and RB
Thus, recording and reproduction of signals are performed by scanning the inclined tracks TA and TB (see FIG. 8) on the magnetic tape 42. Here, the magnetic heads WA and RA are magnetic heads related to + azimuth, and the magnetic heads WB and RB are magnetic heads related to −azimuth.

The recording-system signal processing unit 110 includes a buffer RAM 111 for temporarily storing recording data, an interleaver 112 to which recording data read from the buffer RAM 111 is supplied, and an interleaver 112 for performing interleaving processing. C2 encoder 113 to which the corrected data is supplied, and C1 to which data to which the error correction code C2 is added by the C2 encoder 113 are supplied.
An encoder 114 and data to which the error correction code C1 is added by the C1 encoder 114 are supplied.
The modulation circuit 115 and the 8/10 modulation circuit 115
And a recording amplifier 116 to which a recording signal obtained by converting the bit data is supplied. The 8/10 modulation circuit 115 converts the data supplied from the C1 encoder 114 from 8 bits to 10 bits in byte units so as to keep the DC level of the recording signal at almost zero.

The operation of the recording system signal processing unit 110 will be described. The recording data is supplied to the buffer RAM 111 and accumulated. Then, the recording data sequentially read from the buffer RAM 111 is subjected to an interleaving process by an interleaver 112, and thereafter, the C2 encoder 11
3, the error correction code C of the data string corresponding to the track direction
2 is generated and added, and the C1 encoder 114
In, an error correction code C1 for each fragment (block) is generated and added.

The recording data to which the error correction codes C2 and C1 output from the C1 encoder 114 are added is 8/1
The 0-modulation circuit 115 converts the 8-bit data into 10-bit data to obtain a signal of a predetermined format as a recording signal. The recording signal is transmitted to the recording amplifier 11
6 is supplied to the recording / reproducing unit 120 via the magnetic tape 4.
2 is recorded on the inclined track.

The rewriting function section 130 includes a 10/8 demodulation circuit 132 to which a reproduction signal reproduced from the inclined track of the magnetic tape 42 by the recording / reproduction section 120 is supplied via a reproduction amplifier 131, and a 10/8 demodulation circuit 132. Demodulation circuit 13
The 0 error detection / counting unit 133 to which the reproduction data RD converted into the 8-bit data by 2 is supplied, and the 0 error detection / counting unit 133 constitutes one track 9
0 error count value CT obtained every 6 fragments
The system controller 100 determines whether or not to perform rewriting based on 0 and controls the operation of the recording-system signal processing unit 110 according to the determination.

FIG. 16 shows a zero error detecting / counting unit 13.
3 shows the configuration of FIG. The 0 error detection / counting unit 133 outputs the reproduced data R from the 10/8 demodulation circuit 132.
D is supplied, for the data of the two C1 sequence of each fragment, and the syndrome calculation circuit 133a for calculating the syndromes S ₀ to S ₅ respectively, based on the syndrome S ₀ to S ₅ calculated by the syndrome calculation circuit 133a For each fragment, it is detected whether or not both data of the two C1 sequences have a 0 error. When both of the data have a 0 error, it is determined that the data is good and, for example, a detection signal Sdet of “1” level is output. A 0 error detection circuit 133b for outputting, and a counter 133c for counting the number of detection signals Sdet output from the 0 error detection circuit 133b for every 96 fragments constituting one track to obtain a count value CT0 of 0 errors. It is composed of The counter 133c is provided by the system controller 100.
Is reset at the beginning of each of the 96 fragments constituting one track.

Since the correction capability of the error correction code C2 is 6 symbols, when the count value CT0 is 89 or less, the system controller 100 may not be able to correctly obtain data during reproduction from the corresponding inclined track. Assuming that there is, a decision is made to rewrite the recording data recorded on the inclined track again. The system controller 100 controls the reading of the buffer RAM 111 when determining the rewrite in this manner,
Recording is performed again from the recording data.

The operation of the rewrite function unit 130 will be described. A reproduction signal reproduced from the inclined track on the magnetic tape 42 by the recording / reproduction unit 120 is supplied to a reproduction amplifier 131.
Is supplied to the 10/8 demodulation circuit 132 via In this case, as shown in FIG. 17, a corresponding reproduction signal is reproduced with a delay of a predetermined time t with respect to the recording signal supplied to the recording / reproduction unit 120 and recorded. In the recording signal, "+" and "-" indicate recording signals for one track recorded by the rotary magnetic heads WA and WB, respectively, and the number attached is a frame number.
Similarly, in the reproduction signal, "+" and "-" portions are reproduced by the rotating magnetic heads RA and RB, respectively.
It shows a reproduction signal for a track, and the number attached is a frame number.

The reproduced data RD converted into 8-bit data by the 10/8 demodulation circuit 131 is supplied to a zero error detection / counting unit 133. Error detection / counting unit 133
In, for data of the two C1 sequence of each fragment are respectively calculated syndromes S ₀ to S _5, based on the syndromes S ₀ to S _5, for each fragment 2
It is detected whether or not both of the two C1 series data have 0 error, and the number of both of which has 0 error is counted.
A count value CT0 of 0 error is obtained for every 96 fragments constituting one track.

The count value CT0 is supplied to the system controller 100, and it is determined based on the count value CT0 whether or not to perform rewriting. That is, when the count value CT0 is equal to or less than 89, the system controller 100 re-records the recording data recorded on the inclined track, assuming that data may not be obtained correctly from the corresponding inclined track during reproduction. Make a rewrite decision. When deciding on rewriting, the system controller 100
11 is controlled so that recording is performed again from the recording data.

For example, when a 0 error is detected from the reproduced data of frame number = 6 and a decision is made as to whether or not to perform rewriting based on the count value CT0, the track pattern on the magnetic tape 42 must be FIG. 18A
18B. On the other hand, when rewriting is performed, the frame becomes as shown in FIG. 18B. Frames with frame numbers 7 to 9 subsequent to the first frame number 6 are extra frames.

[0024]

In the above-described data recorder, when the number of fragments in which both data of two C1 sequences out of 96 fragments constituting one track are 0 error is 89 or less, rewriting is performed. It is supposed to. Therefore, there is a problem that the number of rewritten frames is relatively large, which leads to a reduction in recording capacity.

Further, due to clogging of the recording rotary magnetic heads WA and WB, a new recording signal is not recorded on the inclined track on the magnetic tape 42, and the previous recording signal remains without being erased. When a state (referred to as “drop-in”) occurs, although data cannot be correctly reproduced during reproduction from the inclined track, both data of two C1 sequences out of 96 fragments constituting one track have 0 error. There is a problem that the rewrite is not performed unless the number of fragments becomes 89 or less.

An object of the present invention is to significantly improve the rewrite ratio without increasing the possibility that data cannot be correctly reproduced. Another object of the present invention is to reliably execute rewriting when there is a possibility that data cannot be correctly reproduced due to occurrence of drop-in.

[0027]

A data recording apparatus according to the present invention generates a first error correction code constituting a product code for each block and performs interleaving on a predetermined block basis with respect to recording data. What is claimed is: 1. A data recording device for generating a second error correction code constituting said product code and recording the recording data to which said first and second error correction codes are added on a recording medium, wherein Data reproducing means for reproducing the recorded data, and data reproduced by the data reproducing means, for each block,
Data determining means for determining the quality of the data; and counting the number of blocks determined to be good or bad by the data determining means for each interleave of the second error correction code sequence. A first counting unit; and a rewriting determining unit that determines whether to re-record the recording data on a recording medium based on a count result of the first counting unit.

According to the present invention, a first error correction code C1 which forms a product code for each block of recording data is generated. Further, the recording data is interleaved in a predetermined block unit to form the second product code.
Is generated. Then, the recording data to which the first and second error correction codes have been added is recorded on a recording medium, for example, an inclined track of a magnetic tape.

After the recording data is recorded on the recording medium, the recording data is reproduced. With respect to the reproduction data, the quality of the data is determined for each block. For example, it is determined whether there is an error in the data of the block, and when there is no error, it is determined that the data is good. In addition, for example, it is determined whether or not there is an error in the data of the block, and if there is an error, whether or not the data can be corrected is determined. Is determined.

Then, the number of blocks determined as having good or bad data is counted in the interleave relating to the second error correction code sequence. For example, when data for one track is composed of 96 blocks (96 fragments) and interleaved in units of 3 blocks to generate a C2 (32, 26) code, a sequence of a second error correction code C2 Is counted for each of the 32 blocks.

Then, based on the count result, it is determined whether or not to re-record the recording data on the recording medium.
For example, data for one track is composed of 96 blocks, and interleaving is performed in units of 3 blocks to perform C2 (3
2,26) code is generated, the error correction code C
Since the correction capability of No. 2 is 6 symbols, rewriting is determined only when any of the count values of the number of good blocks for each of the 32 blocks related to the sequence of the second error correction code C2 is 25 or less. Done.

As described above, the number of blocks determined as having good or bad data is counted in the interleave relating to the second error correction code sequence, and a rewrite decision is made based on the count result. By doing so, it is possible to greatly improve the rewrite ratio and suppress a decrease in the recording capacity without increasing the possibility that the data cannot be correctly reproduced at the time of reproduction. For example, when data for one track is composed of 96 blocks, and a C2 (32, 26) code is generated by performing interleaving in units of 3 blocks, the number of blocks with bad data is 7 or more in the conventional example. Then, the rewrite is determined, but in the present invention, even if the number of blocks with bad data becomes 7 or less, the rewrite is not determined unless they are in the same interleave. Also, when determining the quality of the data, as described above, it is also determined that the data of the first error-correcting code sequence has an error that can be corrected by the first error-correcting code. The above-mentioned rewrite rate is further improved.

In the data recording apparatus according to the present invention, with respect to the data reproduced by the data reproducing means, a part or all of the data is compared with the recorded data to determine whether or not it is drop-in. Drop-in determining means for determining, and a second count for counting the number of blocks determined to be drop-in or non-drop-in by the drop-in determining means in an interleave relating to a second error correction code sequence Means for determining whether to re-record the recording data on the recording medium based on the count result of the second counting means together with the count result of the first counting means. You may do so.

When drop-in has occurred, although the data cannot be correctly reproduced in practice, the number of blocks determined to be good is not reduced and the data may not be rewritten. In the case of drop-in, since the reproduction data is different from the recording data, the drop-in is determined by comparing part or all of the reproduction data with the recording data. In this case, even for a slight difference in the original data portion, the first error correction code added to the data portion greatly changes.
By comparing the data of the first error correction code portion, it is possible to efficiently determine whether or not a drop-in has occurred.

The number of blocks determined to be drop-in or not drop-in is counted in the interleave relating to the second error correction code sequence. Then, based on the count result of the number of blocks determined to be good or bad and the count result of the number of blocks determined to be drop-in or non-drop-in, the recording data is calculated. It is determined whether or not to re-record on the recording medium. In this case, when the correction becomes impossible by the second error correction code C2, a rewrite decision is made. For example, when the data for one track is composed of 96 blocks and the C2 (32, 26) code is generated by performing interleaving in units of three blocks, each of the 32 bits related to the second error correction code C2 is generated. If (the number of blocks that are drop-in) × 2 + (the number of blocks with bad data)> 6 in any of the blocks, rewriting is determined.

[0036]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a configuration of a data recorder 10 using a DAT as an embodiment. This data recorder 10 uses the above-described DDS3 format (FIGS.
14 (see FIG. 14).

The data recorder 10 includes a system controller 11 having a microcomputer, an interface controller 20 for transmitting and receiving data to and from the outside, and a signal processor for performing data processing on data input through the interface controller 20. And a recording signal processing unit 30 for converting the signal into a signal of a predetermined format, and a recording signal supplied from the recording system signal processing unit 30 is recorded on an inclined track on the magnetic tape 42 and recorded on the inclined track. A recording / reproducing unit 40 for reproducing the reproduced signal;
A reproduction signal processing unit 5 that performs signal processing on the reproduction signal reproduced by the recording / reproduction unit 40 to reproduce the original data
0, a tracking control unit 60 for controlling the tape running system of the recording / reproducing unit 40, and determining whether or not to perform rewriting by using the data reproduced by the recording / reproducing unit 40. A rewrite function unit 80 for controlling the operation of the processing unit 30 is provided.

The recording / reproducing unit 40 includes a pair of rotating magnetic heads WA for recording, similar to the recording / reproducing unit 120 shown in FIG.
WB is disposed at an angle of 180 °, and a pair of rotary magnetic heads for reproduction RA and RB are provided with a rotating drum 41 disposed at an angle of 180 °.
Is wound around the rotary drum 41 over a range of about 90 ° at a predetermined traveling speed. Then, for each rotation of the rotating drum 41,
The magnetic heads WA and WB and the magnetic heads RA and RB scan the inclined tracks TA and TB (see FIG. 8) on the magnetic tape 42 to record and reproduce signals.

The interface controller 20 exchanges data with an external host computer (not shown) via the bus 21 and supplies data sent from the host computer to the recording signal processing unit 30. The data reproduced by the unit 50 is sent to the host computer.

The recording system signal processing section 30 supplies an interleaver / deinterleaver 71 to which data input through the interface controller 20 is supplied, and data interleaved by the interleaver / deinterleaver 71. C2 encoder / decoder 72, a C1 encoder / decoder 73 to which the data to which the error correction code C2 is added by the C2 encoder / decoder 72 are supplied, An SDRAM (Synchronous DRAM) 74 as a buffer memory, and a memory controller 75 interposed between the modules 71 to 73 and the SDRAM 74 are provided.

Here, the C2 encoder / decoder 72
Is the error correction code C of the data string corresponding to the track direction.
2, and the error correction code C2 is assigned to the central portion of the main data area of each track. The C1 encoder / decoder 73 generates the above-described error correction code C1 for each fragment (block).

The recording-system signal processing section 30 includes a sub-code adding circuit 31 to which data to which the error correction code C1 is added by the C1 encoder / decoder 73 is supplied, and a sub-code and fragment A header parity adding circuit 32 to which main data to which an address (block address) is added is supplied; an 8/10 modulation circuit 33 to which main data to which header parity is added by the header parity adding circuit 32 is supplied;
A synchronization signal adding circuit 3 to which main data converted into 10-bit data by the 8/10 modulation circuit 33 is supplied.
4, a margin adding circuit 35 to which main data to which a synchronizing signal is added for each fragment by the synchronizing signal adding circuit 34 is supplied, and a recording amplifier to which main data to which a margin is added by the margin adding circuit 35 is supplied. 36.

The subcode and the fragment address added by the subcode adding circuit 31 are supplied from the subcode generator 37. The subcode generator 37 includes first and second subcode generators 37a and 37b and a system log generator 37c. The subcode generation circuit 37a generates a separator count, which is delimiter information indicating a delimiter of main data, a record count, which indicates the number of records, and the like, based on data input via the interface controller 20. The subcode generation circuit 37b automatically generates an area ID indicating each area defined on the tape format, a frame number, a group count indicating the number of recording units, a checksum, etc. together with a fragment address. Further, the system log generation circuit 37c generates a system log (history information) for each of the partitions P1 and P2 defined as the above-described tape format.

The header parity adding circuit 32 generates a two-symbol parity for error detection for the subcode and the fragment address added to the main data by the subcode adding circuit 31, and adds the parity to the main data. . The 8/10 modulation circuit 33 converts the main data, to which the header parity has been added by the header parity addition circuit 32, from 8 bits to 10 bits in 1-byte units so as to keep the DC level of the recording signal at substantially 0. I do.

The synchronizing signal adding circuit 34 adds a synchronizing signal to the main data converted into 10-bit data by the 8/10 modulation circuit 33 for each fragment (one block). Further, the margin adding circuit 35 adds a margin to the main data to which the synchronization signal is added for each track. The main data to which the margin is added for each track by the margin adding circuit 35 is supplied to the recording / reproducing unit 40 via the recording amplifier 36.

The operation of the recording system signal processing unit 30 described above
A brief description will be given. Data input via the interface controller 20 is subjected to an interleaving process by an interleaver / deinterleaver 71. After that, the C2 encoder / decoder 72 generates and adds the error correction code C2 of the data string corresponding to the track direction to the input data, and further adds the C1 encoder / decoder.
The decoder 73 generates and adds an error correction code C1 for each fragment. As described above, each fragment is interleaved in units of two symbols.
A sequence C1 (62, 56) code is arranged.

The subcode and fragment address are added by the subcode adding circuit 31 to the main data to which the error correction codes C2 and C1 added from the C1 encoder / decoder 73 are added. Is also added.
The main data output from the header parity adding circuit 32 is converted from 8-bit data to 10-bit data by the 8/10 modulation circuit 33.

To the main data converted into the 10-bit data, a synchronizing signal is added to the beginning of each fragment by a synchronizing signal adding circuit 34, and a margin adding circuit 35 adds a margin to both sides of the main data area for each track. Is added to obtain a signal of a predetermined format as a recording signal. The recording signal is transmitted to the recording amplifier 3
The recording medium is supplied to the recording / reproducing unit 40 via the recording medium 6, and is recorded on the inclined track of the magnetic tape 42 by the rotating magnetic heads WA and WB.

The reproduction system signal processing unit 50 includes a clock reproduction circuit 52 to which a reproduction signal reproduced from the inclined track of the magnetic tape 42 by the recording / reproduction unit 40 is supplied via a reproduction amplifier 51, and a clock reproduction circuit 52. A synchronization signal detection circuit 53 to which reproduction data is supplied from 52, a 10/8 demodulation circuit 54 to which the reproduction data and the detected synchronization signal are supplied from the synchronization signal detection circuit 53, and a 10/8 demodulation A header parity check circuit 55 to which the reproduced data converted into 8-bit data by the circuit 54 is supplied.
And a subcode separation circuit 56 to which the reproduced data subjected to the parity check by the header parity check circuit 55 is supplied.

The clock recovery circuit 52 has a PLL (phase-
The recording / reproducing unit 4 is configured using a locked loop) circuit.
A channel bit clock signal is reproduced from a reproduction signal supplied from 0 through a reproduction amplifier 51, and reproduction data synchronized with the reproduction clock signal is generated. The synchronization signal detection circuit 53 detects the synchronization signal arranged at the head of each fragment from the reproduction data from the clock reproduction circuit 52 using the reproduction clock signal described above. The 10/8 demodulation circuit 54 finds a 10-bit break using the synchronization signal detected by the synchronization signal detection circuit 53 as a timing reference, and converts reproduced data from 10-bit data to 8-bit data.

In the header parity check circuit 55, the parity check of the subcode and the fragment address added to the main data is performed using the above-mentioned two-symbol header parity. Then, the subcode separation circuit 56 separates the correct subcode and the fragment address subjected to the parity check by the header parity check circuit 55 from the reproduction data, and supplies them to the system controller 11 and the like.

The reproduction system signal processing unit 50 includes a C1 encoder / decoder 73 to which reproduction data from which subcodes and fragment addresses are separated by the subcode separation circuit 56 are supplied, and a C1 encoder / decoder 73
And a C2 encoder / decoder 72 to which main data corrected by the error correction code C1 is supplied, and a main data corrected by the error correction code C2 by the C2 encoder / decoder 72 to perform deinterleave processing. Interleaver / deinterleaver 71 for supplying the data to the interface controller 20, an SDRAM 74 as a buffer memory necessary for executing the processing in each of the modules 71 to 73, and an intervening unit between each of the modules 71 to 73 and the SDRAM 74. And a memory controller 75 to be operated.

Here, the C1 encoder / decoder 73
Performs an error correction process on the main data of each fragment using the error correction code C1 added to each fragment. Also, the C2 encoder / decoder 7
2 is for the main data of each fragment, which has been subjected to the error correction processing by the C1 encoder / decoder 73 as described above, in the track direction using the error correction code C2 added to the central portion of the main data area. An error correction process is performed on the corresponding data sequence.

The operation of the reproduction system signal processing unit 50 described above
A brief description will be given. The recording / reproducing unit 40 controls the magnetic tape 42
The reproduction signal reproduced from the inclined track of
1 and supplied to the clock recovery circuit 52, and a clock signal (channel bit clock signal)
Is reproduced, and reproduced data synchronized with the reproduced clock signal is generated. Then, a synchronization signal added to the beginning of each fragment is detected by the synchronization signal detection circuit 53 with respect to the reproduced data, and the 10/8 demodulation circuit 54 converts the detected synchronization signal into 8-bit data based on the timing. Conversion is performed.

The reproduced data converted into the 8-bit data is supplied to a header parity check circuit 55, and a parity check is performed on the subcode and the fragment address added to the main data for each fragment. Then, the correct subcode and fragment address are separated by the subcode separation circuit 56,
It is supplied to the system controller 11 and the like.

For the reproduced data from which the subcode and the fragment address have been separated by the subcode separation circuit 56, the C1 encoder / decoder 73 uses the above-described error correction code C1 added for each fragment to generate an error for each fragment. The correction process is performed, and the C2 encoder / decoder 72 performs an error correction process on the data string in the track direction using the error correction code C2 added to the central portion of the main data area. And
The error-corrected reproduced data output from the C2 encoder / decoder 72 is deinterleaved by the interleaver / deinterleaver 71, and then sent to the host computer via the interface controller 20.

The tracking control section 60 is supplied with a fragment address detection circuit 61 to which a fragment address is supplied from the reproduction system signal processing section 50 via the header parity check circuit 55, and a PG pulse from the recording / reproduction section 40. A PG pulse detection circuit 62, a time detection circuit 63 to which each detection output of the fragment address detection circuit 61 and the PG pulse detection circuit 62 is supplied, a tracking servo circuit 64 to which a detection output of the time detection circuit 63 is supplied, It comprises a capstan drive circuit 65 to which the output of the tracking servo circuit 64 is supplied.

In the tracking control section 60, the detection circuit 61 detects the correct fragment address subjected to the parity check by the header parity check circuit 55, and supplies a detection output indicating the detection timing to the time detection circuit 63. The PG pulse detection circuit 62
Detects a PG pulse indicating the rotation phase of the rotary drum 41 supplied from the recording / reproducing unit 40, and supplies a detection output indicating the detection timing to the time detection circuit 63. The time detection circuit 63 detects a time between the timing when the detection circuit 61 detects a predetermined fragment address and the timing when the detection circuit 62 detects a PG pulse.

Here, when the inclined track on the magnetic tape 42 is scanned by the rotating magnetic heads RA and RB having a predetermined rotation phase, as shown in FIG. 2, the scanning distance from the tape edge of the track to a predetermined block is as follows. L in the just tracking state, whereas if there is a tracking error, it changes by ± Δ according to the tracking error. Therefore, the time detected by the time detection circuit 63 changes from the time in the just tracking state according to the tracking error.

The tracking servo circuit 64 uses the time in the just tracking state as a reference time, detects a time difference between the reference time and the time detected by the time detection circuit 63, that is, detects a tracking error, and the tracking error becomes zero. Thus, a capstan drive circuit 65 for driving a capstan motor (not shown) of the tape running system of the recording / reproducing unit 40 is controlled. Thus, the tracking control can be performed without recording the ATF pattern for tracking control on the magnetic tape.

Next, the rewrite function section 80 will be described. The rewriting function unit 80 includes a reproduction signal processing unit 50
And a detection / counting unit 81 to which reproduced data RD in which a subcode and a fragment address are separated from the subcode separation circuit 56 are supplied.
Count values CE1 to CE3, CD1 to CD3 obtained by
And a system controller 11 for controlling the operation of the recording signal processing unit 30 in accordance with the determination.

FIG. 3 shows the configuration of the detection / counting unit 81. The detecting / counting unit 81, the reproduced data RD is supplied from the subcode separating circuit 56, with respect to the data of the two C1 sequence of each fragment, syndrome calculation circuit respectively calculate syndromes S ₀ to S ₅ 8
2, on the basis of the syndrome S ₀ to S ₅ calculated by the syndrome calculation circuit 133a, both the data of the two C1 sequence each fragment to detect whether a 0 error, both 0 Error , A 0 error detection circuit 83 that outputs a "1" level detection signal Sdet1,
It has three counters 84a to 84c for counting the number of detection signals Sdet1 in each interleave (32 fragments) related to the sequence of the error correction code C2 for every 96 fragments constituting one track.

The counters 84a to 84b are reset at the beginning of each of the 96 fragments constituting one track under the control of the system controller 11. Counter 8
4a, the detection signal S in 32 fragments of the sequence of the code C2 (the symbols are indicated by circles in FIG. 12)
The det1 is counted to obtain a count value CE1. The counter 84b counts the detection signal Sdet1 in 32 fragments of the sequence of the code C2 (symbols are shown in FIG. 12 by triangular figures), and obtains a count value CE2. Further, the counter 84c counts the detection signal Sdet1 in 32 fragments of the sequence of the code C2 (symbols are shown in FIG. 12 as square figures) and obtains a count value CE3.

FIG. 4 shows a configuration example of the syndrome calculation circuit 82 and the zero error detection circuit 83.

The syndrome calculation circuit 82 calculates the syndrome S for the C1 sequence from the reproduced data of the first C1 sequence among the two C1 sequences constituting each fragment.
₀ a calculation processing unit 82A for determining to S ₅ is calculated to the second C
Than one series of the reproduction data, and a calculation processing unit 82B for obtaining by calculating the syndromes S ₀ to S ₅ according to the C1 sequence. Then, the computing unit 82A is configured to the syndrome register 91a~91f which calculates and outputs the syndromes S ₀ to S ₅ respectively equipped in parallel. Although the detailed description is omitted, the calculation processing unit 82B also
The configuration is the same as that of the calculation processing unit 82A.

The 0 error detection circuit 83 is provided with a calculation processing unit 82
Syndrome S _{0 according} to the first C1 sequence determined by A
Based on to S _5, and the detection processing unit 83A for detecting whether or not data of the C1 series is zero error, the computing unit 8
Syndrome S according to the second C1 sequence determined by 2B
₀ to S based on _5, a detection processing section 83B for detecting whether or not data of the C1 series is zero error, these detection processing unit 83A, the detection signal output from 83B SD1, S
An AND circuit 83C for obtaining the above-described detection signal Sdet1 by taking the logical product of D2.

The detection processing unit 83A includes, for each of the 8-bit syndromes S _{0 to} S ₅ relating to the first C1 sequence, six AND circuits 92 a to 92 f which take a logical product after inverting each bit, It comprises an AND circuit 93 for calculating the logical product of the output data of the AND circuits 92a to 92f. In this case, when the data of the first C1 series has a 0 error, the AND circuit 93 and therefore the detection processing unit 83A
Thus, a detection signal SD1 of "1" level is obtained. Although detailed description is omitted, the detection processing unit 83B is configured similarly to the above-described detection processing unit 83A. When the data of the second C1 series is 0 error, the detection processing unit 8
A detection signal SD2 of "1" level is obtained from 3B. Therefore, for each fragment, when both the first and second C1 sequence data have 0 error, a "1" level detection signal Sdet1 is obtained from the AND circuit 83C.

Returning to FIG. 3, the detection / counting unit 8
1 is supplied with the reproduction data RD from the sub-code separation circuit 56, and the recording data WD corresponding to the reproduction data RD is supplied to the SDRA via the memory controller 75.
M74, read out from the M74 and supplied.
D and the recording data WD to detect the above-described drop-in, and the number of detection signals Sdet2 output from the comparison circuit 85 for each 96 fragments constituting one track is corrected by an error correction code. It has three counters 86a to 86c that count within each interleave (32 fragments) related to the C2 sequence.

When the reproduction data RD and the corresponding recording data WD do not match, the comparison circuit 85 determines that drop-in has occurred and outputs a "1" level detection signal Sdet2. In this case, all of the data of 124 symbols of one fragment (see FIG. 8) may be compared, or only a part of the data may be compared. As the partial data, for example, the data of the error correction code C1 is used. Even for a slight difference in the original data portion, the error correction code C1 added to the data portion greatly changes. Therefore, by comparing the data of the error correction code C1, the drop-in is performed. It is possible to efficiently determine whether or not.

The counters 86a to 86b are reset at the beginning of each of the 96 fragments constituting one track under the control of the system controller 11. Counter 8
6a, the detection signal S in 32 fragments related to the sequence of the code C2 (the symbols are indicated by circles in FIG. 12)
The det2 is counted to obtain a count value CD1. The counter 86b counts the detection signal Sdet2 in 32 fragments of the sequence of the code C2 (symbols are shown by triangular figures in FIG. 12) and obtains a count value CD2. Further, the counter 86c counts the detection signal Sdet2 in 32 fragments of the sequence of the code C2 (symbols are shown in FIG. 12 as square figures), and obtains a count value CD3.

Since the correction capability of the error correction code C2 is 6 symbols, the system controller 11 determines which of each of the 32 fragments relating to the sequence of the error correction code C2 based on the count values CE1 to CE3 and CD1 to CD3. Or (number of fragments that are drop-in) x 2+
If (the number of fragments whose data is not good)> 6, it is determined that there is a possibility that data cannot be obtained correctly from the corresponding inclined track at the time of reproduction, and the rewrite for recording the recorded data recorded on the inclined track again is determined. do. Here, the number of fragments having bad data is the number of fragments for which the detection signal Sdet1 of “1” level indicating that there is a 0 error cannot be obtained. When deciding on rewriting in this way, the system controller 11 controls reading from the SDRAM 74 by the interleaver / deinterleaver 71 so that recording is performed again from recording data for which retry has been decided as described above. To

The operation of the above-described rewrite function unit 80 will be described. In the recording / reproducing unit 40, signals recorded on the inclined tracks of the magnetic tape 42 by the rotary magnetic heads WA and WB are thereafter reproduced by the rotary magnetic heads RA and RB. In this case, as shown in FIG. 17, a corresponding reproduction signal is reproduced with a delay of a predetermined time t with respect to the recording signal supplied to the recording / reproduction unit 120 and recorded.

The reproduction data RD from the subcode separation circuit 56 is supplied to the detection / counting section 81. In the detection / counting unit 81, with respect to the data of the two C1 sequence of each fragment are respectively calculated syndromes S ₀ to S _5, based on the syndromes S ₀ to S _5, the data of the two C1 sequence for each fragment Are both 0 errors. Then, the number of both zero errors is counted in each interleave relating to the sequence of the error correction code C2, and for every 96 fragments constituting one track, the count values CE1 to CE3 of 0 errors in each interleave are calculated. can get.

The detection / counting section 81 compares the reproduction data RD with the corresponding recording data WD and detects drop-in for each fragment.
Then, the number of drop-ins is counted in each interleave relating to the sequence of the error correction code C2, and count values CD1 to CD3 of drop-ins in each interleave are obtained for every 96 fragments constituting one track.

Count values CE1 to CE3, CD1 to CD
3 is supplied to the system controller 11, and whether to rewrite is determined based on the count values CE1 to CE3 and CD1 to CD3. That is, the system controller 11 determines that each of the 32
If (the number of fragments that are drop-in) × 2 + (the number of fragments whose data is not good)> 6 for any of the fragments, it is determined that data may not be correctly obtained during reproduction from the corresponding inclined track. Then, a rewrite for re-recording the recording data recorded on the inclined track is determined. When deciding on rewriting, the system controller 11 sets the SDRAM 74 in the interleaver / deinterleaver 71
, So that the recording is performed again from the recording data for which the retry is determined as described above. For example, when a 0 error is detected from the reproduced data of frame number = 6 and a decision is made as to whether or not to rewrite based on the count value CT0, the track pattern on the magnetic tape 42 is shown in FIG. On the other hand, when rewriting is performed, the state becomes as shown in FIG. 18B, and the frames of frame numbers = 7 to 9 following the first frame number = 6 are extra frames.

As described above, in the present embodiment, the number of fragments determined to be good data is counted in the interleave relating to the sequence of the second error correction code C2. The rewrite is determined based on the rewrite ratio, and the rewrite ratio can be greatly improved and a decrease in the recording capacity can be suppressed without increasing the possibility that the data cannot be correctly reproduced.

That is, in the conventional example, when the number of fragments having bad data among the 96 fragments constituting one track becomes 7 or more, rewriting is determined. However, in the present embodiment, when the number of drop-ins is 0, rewriting is determined when the number of fragments with bad data is 7 or more in each interleave (32 fragments). You.

This is for burst (continuous) errors:
There are the following merits. That is, in the conventional example, rewriting is performed when there is a continuous error having a length of 7 fragments or more,
In the present embodiment, rewriting is not performed in the case of a burst error having a length of 18 fragments or less.

The following advantages are provided for random errors. The rewrite ratio Pa in the conventional example is (1)
It is expressed by an equation. Here, Pf is a fragment error rate.

[0080]

(Equation 1)

On the other hand, in the present embodiment, the rewrite rate P
b is represented by equation (2).

[0082]

(Equation 2)

FIG. 5 shows the relationship between the fragment error rate Pf and the rewrite rates Pa and Pb. In the present embodiment, it can be seen that the rewrite rate when the fragment error rate is 1 × 10 ⁻² is improved by 5 digits or more, as compared with the conventional example.

In an actual system, since a burst error and a random error are mixed, in the present embodiment, both of the above advantages can be obtained.

In this embodiment, the number of fragments determined to be drop-in is counted for each interleave of the second error correction code sequence, and it is determined that the data is good. Rewriting is determined based on the result of counting the number of fragments and the result of counting the number of fragments determined to be drop-in. Therefore, when there is a possibility that the data cannot be correctly reproduced due to the occurrence of the drop-in, the rewrite can be surely executed.

In the above embodiment, when there is no error in the fragment data, it is determined that the fragment data is good. That is, the 0 error detection circuit 83 (see FIG. 4) is used for the detection / counting unit 81 (see FIG. 3). However, even if there is an error in the fragment data, if the error can be corrected by the first error correction code C1, the data of the fragment may be determined to be good.

For example, when the data of the two C1 sequences of the fragment are 0 error or 1 error respectively,
When the configuration is such that the data of the fragment is determined to be good, a 0 error / 1 error detection circuit 87 shown in FIG. 6 may be used instead of the 0 error detection circuit 83 of the detection / counting section 81 shown in FIG. I just need. This detection circuit 87
Is based on the syndrome S ₀ to S ₅ according to the first C1 sequence obtained by the calculation processing section 82A, and a detection processing section 87A for detecting whether or not data of the C1 series is 0 errors or 1 error, Second calculated by the calculation processing unit 82B
Based on the syndrome S ₀ to S ₅ of the C1 series, the detection processing section 87B for detecting whether or not data of the C1 series is 0 errors or 1 error, these detection processing section 8
AND circuit 87C for obtaining the detection signal Sdet1 by taking the logical product of the detection signals SD3 and SD4 output from 7A and 87B
It consists of

[0088] detection processing section 87A includes a four Galois field OR calculator 94a~94d of the operations using the syndromes S ₀ to S ₅ of the 8 bits of the first C1 sequence, these calculator 94a~ Four AND circuits 95a to 95d for inverting each bit and performing AND operation on the 8-bit operation result from 94d, and AND circuits 95
AND circuit 96 for ANDing output data of a to 95d
It consists of In this case, when the data of the first C1 series is 0 error or 1 error, the AND circuit 9
6, a detection signal SD3 of "1" level is obtained from the detection processing section 87A. Although detailed description is omitted, the detection processing unit 87B is configured similarly to the above-described detection processing unit 87A. When the data of the second C1 series is 0 error or 1 error, the detection processing unit 87B obtains a “1” level detection signal SD4. Therefore, for each fragment, when both the first and second C1 sequence data have a 0 error or a 1 error, a "1" level detection signal Sdet1 is obtained from the AND circuit 87C.

As mentioned above, the two Cs of the fragment
If the data of one series is 0 error or 1 error, respectively, and if the data of the fragment is determined to be good, the rewrite ratio Pc for the random error is expressed by equation (3). Is done. Here, Ps indicates a symbol error rate, and Pf1 indicates a fragment error rate of two or more errors.

[0090]

(Equation 3)

FIG. 7 shows the relationship between the fragment error rate Pf and the rewrite rates Pa and Pc, and it can be seen that the rewrite rate has been greatly improved.

The syndrome calculation circuit 8 shown in FIG.
In the 2 and 0 error / 1 error detection circuit 87,
The calculation processing unit 82A and the detection processing unit 87A are provided corresponding to the first C1 sequence, and the calculation processing unit 82B and the detection processing unit 87B are provided separately and independently corresponding to the second C1 sequence. As shown, the calculation processing unit and the detection processing unit are only one system, and the first C1 sequence and the second
May be used in a time-sharing manner with the C1 series.
Furthermore, the configuration may be such that one syndrome register in the calculation processing unit is used in a time-division manner, and one Galois volume sum calculator in the detection processing unit is used in a time-division manner. This makes it possible to significantly reduce the circuit scale. Such a reduction in circuit size can be similarly applied to the syndrome calculation circuit 82 and the zero error detection circuit 83 shown in FIG.

In the above embodiment, the first counting means (counters 84a to 84c) counts the number of fragments (blocks) having good data. It may be configured to count the number. Similarly, the second
The counting means (counters 86a to 86c) counts the number of fragments determined to be drop-in. Alternatively, the counting means (counters 86a to 86c) may count the number of fragments determined to be not drop-in.

Further, in the above-described embodiment, the present invention is applied to a data recorder using DAT, but the present invention provides a first and a second code constituting a product code.
The present invention can be similarly applied to other data recording devices that record the recording data to which the error correction code is added on a recording medium.

[0095]

According to the present invention, the recording data to which the first and second error correction codes constituting the product code are added is recorded on a recording medium and then the recorded data is reproduced. The quality of the data is determined for each block in which the first error correction code is generated, and the number of blocks for which the data is determined to be good or not is determined according to the sequence of the second error correction code. It counts within the interleave, and determines whether or not to re-record the recording data on the recording medium based on the counting result. Therefore, the rewrite ratio can be significantly improved without increasing the possibility that data cannot be correctly reproduced during reproduction.

According to the present invention, the number of blocks determined to be drop-in or non-drop-in is counted for each interleave of the second error correction code sequence, and data is good. Or the result of counting the number of blocks determined to be not good,
The rewrite is determined based on the result of counting the number of blocks determined to be drop-in or not drop-in. Therefore, when there is a possibility that the data cannot be correctly reproduced due to the occurrence of the drop-in, the rewrite can be surely executed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a data recorder using a DAT according to an embodiment.

FIG. 2 is a diagram for explaining a principle of detecting a tracking error.

FIG. 3 is a block diagram illustrating a configuration of a detection / counting unit included in the rewrite function unit.

FIG. 4 is a block diagram showing a configuration of a syndrome calculation circuit and a zero error detection circuit.

FIG. 5 is a diagram illustrating a relationship between a fragment error rate and a rewrite rate.

FIG. 6 is a block diagram showing a configuration of a syndrome calculation circuit and a 0 error / 1 error detection circuit.

FIG. 7 is a diagram illustrating a relationship between a fragment error rate and a rewrite rate.

FIG. 8 is a diagram showing an example of a track format of a magnetic tape.

FIG. 9 is a diagram showing a configuration of an error correction code of main data.

FIG. 10 is a diagram showing two C1 (62, 56) codes arranged in the data part of one fragment.

FIG. 11 is a diagram illustrating a data configuration of a C1 sequence.

FIG. 12 is a diagram illustrating a data configuration of a C2 sequence.

FIG. 13 is a diagram showing a tape format of a magnetic tape.

FIG. 14 is a diagram showing a tape format of a two-partition tape.

FIG. 15 is a block diagram showing a configuration of a portion related to recording of a conventional data recorder.

FIG. 16 is a block diagram illustrating a configuration of a 0 error detection / counting unit.

FIG. 17 is a diagram for explaining a read-after-write mechanism.

FIG. 18 is a diagram showing an example of a track pattern at the time of non-rewrite and at the time of rewrite;

[Explanation of symbols]

10 Data recorder, 11 System controller, 20 Interface controller, 30
... Recording signal processing unit, 40 ... Recording / reproducing unit, 50
... Reproduction system signal processing unit, 60 ... Tracking control unit, 80 ... Rewrite function unit, 81 ... Detection / counting unit, 82 ... Syndrome calculation circuit, 83 ...
0 error detection circuit, 84a to 84c, 86a to 86c
..Counter, 85 ... Comparison circuit, 87 ... 0 error / 1 error detection circuit

Continued on the front page (72) Inventor Hiroyuki Abe 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Hitoshi Rikukawa 6-35-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Stock In company

Claims (7)

[Claims] 1. A first error correction code forming a product code for each block is generated for recording data, and a second error correction code forming the product code is formed by performing interleaving in a predetermined block unit. What is claimed is: 1. A data recording apparatus for recording, on a recording medium, recording data that has been generated and to which said first and second error correction codes have been added, comprising: data reproducing means for reproducing said recorded data from said recording medium; For the data reproduced by the data reproducing means, for each of the blocks, a data determining means for judging the quality of the data, and the number of blocks determined to be good or bad by the data judging means. A first counting means for counting in each interleave relating to the second error correction code sequence, and a counting result of the first counting means. Based on the data recording apparatus; and a rewrite determining means for determining whether to re-record the recording data on the recording medium. 2. The data determination unit according to claim 1, wherein the data determination unit determines whether there is an error in the data of the block and determines that the data of the block having no error is good. Data recording device. 3. The data determining means determines whether there is an error in the data of the block, and if there is an error, whether the data can be corrected.
2. The data recording apparatus according to claim 1, wherein the data of the block that can be corrected even if there is an error is determined to be good. 4. For each block of data reproduced by the data reproducing means, a part or all of the data is compared with the corresponding recording data to determine whether or not the data is a drop-in. Determining means; and second counting means for counting the number of the blocks determined to be drop-in or non-drop-in by the drop-in determining means for each interleave relating to the second error correction code sequence. The rewriting determination means determines whether or not to re-record the recording data on the recording medium based on the count result of the second counting means together with the count result of the first counting means. The data recording device according to claim 1, wherein the determination is made. 5. The data recording apparatus according to claim 4, wherein the part of the data is a part of the first error correction code. 6. A first error correction code forming a product code for each block with respect to recording data, and a second error correction code forming the product code is formed by performing interleaving in a predetermined block unit. A rewrite decision of the data recording device for generating and recording the recording data to which the first and second error correction codes are added, on the recording medium, and then determining whether to re-record the recording data on the recording medium. A first step of reproducing the recorded data recorded from the recording medium; a second step of determining whether the reproduced data is good or bad for each block with respect to the reproduced data; The number of the blocks determined to be good is
A third step of counting for each interleave of the second error correction code sequence, and determining whether or not to re-record the recording data on the recording medium based on the count result in the second step A rewriting determination method for a data recording device. 7. A fifth step of comparing a part or all of the reproduced data with the recorded data for each block to determine whether the data is a drop-in.
And a sixth step of counting the number of the blocks determined to be drop-in for each interleave according to the second error correction code sequence. In the fourth step, 7. The method according to claim 6, wherein whether to re-record the recording data on the recording medium is determined based on the count result in the sixth step together with the count result in the third step. A method for determining rewriting of a data recording device.