JP2000215100A - Power-saving memory management system - Google Patents

Power-saving memory management system

Info

Publication number
JP2000215100A
JP2000215100A JP11013570A JP1357099A JP2000215100A JP 2000215100 A JP2000215100 A JP 2000215100A JP 11013570 A JP11013570 A JP 11013570A JP 1357099 A JP1357099 A JP 1357099A JP 2000215100 A JP2000215100 A JP 2000215100A
Authority
JP
Japan
Prior art keywords
power
power supply
storage area
means
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11013570A
Other languages
Japanese (ja)
Inventor
Norio Ohashi
範夫 大橋
Original Assignee
Nec Corp
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp, 日本電気株式会社 filed Critical Nec Corp
Priority to JP11013570A priority Critical patent/JP2000215100A/en
Publication of JP2000215100A publication Critical patent/JP2000215100A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing
    • Y02D10/10Reducing energy consumption at the single machine level, e.g. processors, personal computers, peripherals or power supply
    • Y02D10/13Access, addressing or allocation within memory systems or architectures, e.g. to reduce power consumption or heat production or to increase battery life

Abstract

(57) [Summary] [PROBLEMS] To realize a power-saving memory management system capable of reducing wasteful power consumption. A power supply to a storage area that is used less frequently is cut off, and when a storage area to which power supply has been cut off is newly referred to, the power supply to the storage area is restarted. Since the contents of the storage area are reset, the system can be driven with an amount of power necessary for the function actually used in the application program, so that unnecessary power consumption can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power saving memory management system suitable for a portable information terminal such as a notebook personal computer.

[0002]

2. Description of the Related Art As is well known, an information processing apparatus such as a personal computer used in a stand-alone format is often equipped with a large amount of memory in order to process a large amount of data at a high speed. Therefore, it is effective when a large amount of power can be consumed. However, in an information processing system that operates on a battery such as a portable information terminal, it is required to suppress the power consumption. In order to respond to this demand, in recent years, for example, devices have been devised such as changing the frequency of the clock supplied to the CPU according to the load on the system, or stopping the power supply to unused peripheral devices.

[0003]

However, since the memory capacity mounted on the portable information terminal tends to increase and the power consumption of the memory device is relatively increasing, the power consumption of the CPU and peripheral devices is increased. There is a problem that power consumption cannot be sufficiently suppressed only by performing control. In addition, memory devices mounted on personal digital assistants often use a large-capacity memory temporarily to realize some of the functions of the application, and are usually rarely used. There is also a disadvantage that supplying power to unused memory devices is wasteful. The present invention has been made in view of the above circumstances, and has as its object to provide a power-saving memory management system capable of reducing wasteful power consumption.

[0004]

In order to achieve the above object, according to the present invention, in an information processing apparatus having a storage device formed of a plurality of storage areas, the information processing apparatus includes: A power supply shutoff means for detecting a storage area that is used less frequently and shutting off the power supply to the storage area; and It is characterized by comprising a power supply connecting means to be connected, and a resetting means for resetting the contents of the storage area as necessary for the storage area to which power supply has been resumed by the power connection means.

In a preferred embodiment of the present invention, the storage device includes a power switch for each of a plurality of storage areas, and turns off a corresponding power switch in accordance with an instruction from the power cutoff means. It is characterized by. Further, in the invention according to claim 3, the power cutoff means includes:
A state management table indicating the power on / off state is provided for each of the plurality of storage areas, and a flag indicating the power off state is set for the storage area to which power supply is cut off.

Further, in the invention described in claim 4, the power supply connection means determines whether or not there is a program access to a storage area where power is turned off, and if there is a program access, the storage area is connected. Deleting the reference detection means for notifying and the flag of the corresponding storage area in the state management table indicating the power on / off state for each of the plurality of storage areas in order to restart the power supply for the storage area notified from the reference detection means And connection control means for turning on a corresponding power switch.

In addition, the invention according to claim 5 is characterized in that the power cutoff means, the power connection means, and the resetting means are included in an operating system of the information processing device.

According to the present invention, the power supply to the storage area that is used less frequently is cut off, and when a storage area whose power supply has been cut off is newly referred to, the power supply to that storage area is restarted, and the necessary power supply is restarted. , The contents of the storage area are reset, so that the system can be driven with an amount of power necessary for the function actually used in the application program, thereby reducing unnecessary power consumption.

[0009]

An embodiment of the present invention will be described below with reference to the drawings. (1) First Embodiment FIG. 1 is a block diagram showing a functional configuration of a power-saving memory management system according to a first embodiment. In FIG. 1, reference numeral 1 denotes a power-off process including a reference frequency detection unit 1a and a storage area power-off processing unit 1b. In the power-off processing 1, when the reference frequency detection unit 1a detects a storage area with a low frequency of use, the storage area power-off processing unit 1b responds accordingly.
Turn off the power supply by turning off the power switch 4 of the storage device 3 corresponding to the storage region with low reference frequency, and manage the on / off state of the power switch 4 provided corresponding to each storage region of the storage device 3 The power-off area management table TBL registers the off-flag in the storage area where the power supply is turned off.

The power connection process 2 comprises a power-off area reference detection section 2a, a storage area power connection section 2b, and a resetting section 2c. The power-off area reference detection unit 2a determines whether or not there is a program access to a storage area that has been turned off, and notifies the storage area when there is a program access. The storage area power supply connection unit 2b deletes the off flag of the corresponding storage area in the power down area management table TBL and restarts the corresponding power switch in order to restart the power supply to the storage area notified from the power down area reference detection unit 2a. 4
Is turned on, and the resetting unit 2c is instructed to reset the contents of the storage area in which the power supply has been restarted. The resetting unit 2c resets the contents of the specified storage area.

As described above, according to the first embodiment,
When the power supply to the storage device 3 corresponding to the storage area that is used less frequently is cut off and the storage area whose power supply is cut off is newly referred to, the power supply to the storage device 3 corresponding to the storage area is restarted. Since the contents of the storage area are reset when necessary at the time of resumption, it is possible to reduce unnecessary power consumption.

(2) Second Embodiment Next, an information processing system according to a second embodiment will be described with reference to FIG. This information processing system
An address conversion table ATT for converting a virtual address space to a physical address space is provided. C not shown
The PU automatically converts a virtual address to a physical address with reference to the address conversion table ATT.
When the CPU refers to an invalid entry in the address translation table ATT, the CPU suspends the application program,
Start the exception handling program. The memory device 3 has a storage area divided for each page, and each page is provided with a switch for enabling and stopping power supply. Further, a memory power control device 5 for controlling on / off of these switches from a program.
Having.

In the second embodiment, an operating system (OS) includes functional elements 6 to 9 described below. Reference numeral 6 denotes a reference frequency detection unit that measures the reference frequency of the storage area and detects a memory area with a low reference frequency.
In order to cut off the power in that area, the power cutoff unit 7 is started. The method of measuring the reference frequency is a common technique well known to those skilled in the art as a part of the paging process of the virtual address method, and thus the detailed description thereof is omitted, but is different from the process performed by the normal virtual address method. The point is that after detecting memory areas with low reference frequency, the power-off processing unit 7 is applied to those memory areas.

The power-off processing section 7 invalidates the entry of the address translation table ATT corresponding to the low-frequency storage area determined by the reference frequency detecting section 6 and registers the area in the power-off area list 10. Further, in order to turn off the power of the memory device 3 corresponding to the low-frequency storage area, the power-off instruction and the address for turning off the power are sent to the memory power control device 5. Upon receiving the power-off instruction and the cut-off address, the memory power control device 5 turns off the power of the memory device 3 corresponding to the cut-off address.

The power-off area reference detecting section 8 makes the entry of the address conversion table ATT corresponding to the storage area whose power is turned off by the power-off processing section 7 invalid, so that the application program refers to the area. Then, the exception processing program is started. This exception program is the power-off area reference detection unit 8. The power-off area detection unit 8 checks whether or not the address where the exception has occurred is registered in the power-off area list. If the address is not registered, the power-off area detection unit 8 performs normal exception processing. The power connection processing unit 9 is started.

The power supply connection processing unit 9 transmits a power supply connection command and an address for connecting the power supply to the memory power supply control unit 5 in order to connect the power supply of the memory device 3 corresponding to the area detected by the power supply cutoff area reference detection unit 8. To send to. Upon receiving the power supply connection command and the connection address, the memory power supply control device 5 connects the power supply of the memory device corresponding to the connection address, and records the power-connected storage area in the power-off area list 1.
Delete from 0. Then, when it is necessary to reset the contents of the storage area to which the power is connected, a reset unit (not shown) is activated to reset the contents of the memory. After the power connection process is completed, the suspended application program is continued. The resetting section (not shown) reads the contents to be set in the storage area instructed to be reset from the secondary storage device or the like and resets them.

According to the above configuration, since the power supply of the memory device 3 is controlled based on the reference frequency of the memory device 3, it is not necessary for the application program to supply power to the less important memory area. Therefore, the system can be driven with the amount of power required for the function actually used in the application program, so that unnecessary power consumption can be reduced. Further, in the second embodiment, since the reference to the power-off area is detected by the address conversion table ATT, the detection of the reference to the power-off area can be handled as a part of the virtual memory management, and There is also an effect that power management can be performed in units of size.

The above-mentioned reference frequency detection unit 6 includes
Although the system used in the well-known virtual space management mechanism has been processed, in the case of a system in which the release of a memory area is explicitly specified, the power-off processing unit for that memory area may be activated at the time of release. Good. In the power connection processing unit 9 described above, the program sends a power connection request to the memory power control device to perform power connection. Instead, the program detects a reference to the power cutoff region by hardware. It is of course possible to automatically connect the power supply.

[0019]

According to the present invention, power supply to a storage area that is used less frequently is cut off, and when a storage area that has been cut off is newly referenced, power supply to that storage area is restarted. Since the contents of the storage area are reset as needed when the system is restarted, the system can be driven with the required amount of power for the functions actually used in the application program, resulting in reduced wasteful power consumption. can do.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a functional configuration according to a first embodiment.

FIG. 2 is a block diagram illustrating a functional configuration according to a second embodiment.

[Explanation of symbols]

 Reference Signs List 1 power cut-off processing (power cut-off means) 1a reference frequency detection unit 1b storage area power cut-off processing unit 2 power supply connection processing (power connection means) 2a power cut-off area reference detection unit (reference detection means) 2b storage area power supply connection unit (connection Control means) 2c resetting section (resetting means) 3 storage device 4 power switch TBL power cut area management table (state management table)

Claims (5)

    [Claims]
  1. An information processing apparatus including a storage device formed from a plurality of storage areas, wherein a storage area that is used less frequently is detected from among the plurality of storage areas, and power supply to the storage area is shut off. Power supply cutoff means; power supply connection means for connecting a power supply when a reference request is made to a storage area to which power supply has been cut off by the power supply cutoff means; And a resetting means for resetting the contents of the storage area as necessary.
  2. 2. The power saving apparatus according to claim 1, wherein the storage device includes a power switch for each of a plurality of storage areas, and sets a corresponding power switch to off in response to an instruction from the power cutoff unit. Memory management system.
  3. 3. The power supply shut-off means includes a state management table indicating an on / off state of a power supply for each of a plurality of storage areas, and sets a flag indicating a power-off state for the storage area for which power supply is cut off. 2. The power-saving memory management system according to claim 1, wherein:
  4. 4. The power supply connection means determines whether or not there is a program access to a storage area whose power is turned off, and, when there is a program access, a reference detection means for notifying the storage area; In order to restart the power supply to the storage area notified from the detection means, the flag of the corresponding storage area in the state management table indicating the power on / off state of each of the plurality of storage areas is deleted, and the corresponding power switch is turned on. 2. The power-saving memory management system according to claim 1, further comprising connection control means for setting.
  5. 5. The power-saving memory management system according to claim 1, wherein said power cut-off means, power connection means, and resetting means are included in an operating system of the information processing device.
JP11013570A 1999-01-21 1999-01-21 Power-saving memory management system Pending JP2000215100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11013570A JP2000215100A (en) 1999-01-21 1999-01-21 Power-saving memory management system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11013570A JP2000215100A (en) 1999-01-21 1999-01-21 Power-saving memory management system

Publications (1)

Publication Number Publication Date
JP2000215100A true JP2000215100A (en) 2000-08-04

Family

ID=11836838

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2000215100A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003045189A (en) * 2001-07-31 2003-02-14 Fujitsu Ltd Semiconductor memory
JP2007086909A (en) * 2005-09-20 2007-04-05 Nec Corp Computer, portable terminal device, power-controlling method, and power-controlling program
JP2009104247A (en) * 2007-10-19 2009-05-14 Ricoh Co Ltd Virtual storage control device, virtual storage control method, virtual storage control program, and recording medium
JP2009122733A (en) * 2007-11-12 2009-06-04 Hitachi Ltd Power control method, computer system, and program
JP2009151537A (en) * 2007-12-20 2009-07-09 Canon Inc Data processor and data processing method
JP2009211153A (en) * 2008-02-29 2009-09-17 Toshiba Corp Memory device, information processing apparatus, and electric power controlling method
JP2010146181A (en) * 2008-12-17 2010-07-01 Fujitsu Ltd Execution file creation device
WO2011010197A1 (en) 2009-07-21 2011-01-27 Toyota Jidosha Kabushiki Kaisha Power-saving system and control method for the same
JP2011039904A (en) * 2009-08-17 2011-02-24 Fujitsu Ltd Relay device, mac address search method
JP2011134288A (en) * 2009-01-19 2011-07-07 Fujitsu Ltd Code generation device and code generation method
JP2013030024A (en) * 2011-07-28 2013-02-07 Toshiba Corp Information processing device
JP2014006895A (en) * 2012-05-31 2014-01-16 Semiconductor Energy Lab Co Ltd Memory management system and program
US8745426B2 (en) 2010-07-22 2014-06-03 Hitachi, Ltd. Information processing apparatus and power saving memory management method with an upper limit of task area units that may be simultaneously powered
WO2016043272A1 (en) * 2014-09-19 2016-03-24 株式会社 東芝 Memory system and cache memory

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003045189A (en) * 2001-07-31 2003-02-14 Fujitsu Ltd Semiconductor memory
JP2007086909A (en) * 2005-09-20 2007-04-05 Nec Corp Computer, portable terminal device, power-controlling method, and power-controlling program
JP2009104247A (en) * 2007-10-19 2009-05-14 Ricoh Co Ltd Virtual storage control device, virtual storage control method, virtual storage control program, and recording medium
JP2009122733A (en) * 2007-11-12 2009-06-04 Hitachi Ltd Power control method, computer system, and program
JP2009151537A (en) * 2007-12-20 2009-07-09 Canon Inc Data processor and data processing method
JP2009211153A (en) * 2008-02-29 2009-09-17 Toshiba Corp Memory device, information processing apparatus, and electric power controlling method
JP2010146181A (en) * 2008-12-17 2010-07-01 Fujitsu Ltd Execution file creation device
JP2011134288A (en) * 2009-01-19 2011-07-07 Fujitsu Ltd Code generation device and code generation method
DE112010003036T5 (en) 2009-07-21 2013-04-18 Toyota Jidosha Kabushiki Kaisha Energy saving system and control method for this
WO2011010197A1 (en) 2009-07-21 2011-01-27 Toyota Jidosha Kabushiki Kaisha Power-saving system and control method for the same
DE112010003036B4 (en) * 2009-07-21 2015-02-05 Toyota Jidosha Kabushiki Kaisha Energy saving system and control method for this
US8423242B2 (en) 2009-07-21 2013-04-16 Toyota Jidosha Kabushiki Kaisha Power-saving system and control method for the same
US8719361B2 (en) 2009-08-17 2014-05-06 Fujitsu Limited Relay device, MAC address search method
JP2011039904A (en) * 2009-08-17 2011-02-24 Fujitsu Ltd Relay device, mac address search method
US8745426B2 (en) 2010-07-22 2014-06-03 Hitachi, Ltd. Information processing apparatus and power saving memory management method with an upper limit of task area units that may be simultaneously powered
JP2013030024A (en) * 2011-07-28 2013-02-07 Toshiba Corp Information processing device
JP2014006895A (en) * 2012-05-31 2014-01-16 Semiconductor Energy Lab Co Ltd Memory management system and program
JP2017220244A (en) * 2012-05-31 2017-12-14 株式会社半導体エネルギー研究所 Memory management system
WO2016043272A1 (en) * 2014-09-19 2016-03-24 株式会社 東芝 Memory system and cache memory
JP2016062503A (en) * 2014-09-19 2016-04-25 株式会社東芝 Memory system and cache memory
US9792972B2 (en) 2014-09-19 2017-10-17 Kabushiki Kaisha Toshiba Memory system and cache memory

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