JP2000208633A - Method and device for automatic wiring - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress lowering of wiring density for improved wiring efficiency and high-density wiring by searching a wiring route using a map which is optimal to a wiring pitch according to the pitch of wiring which is to be wired/ connected. SOLUTION: Virtual tracks V1-V10 which are deviated by specified pitch, for example a half of a unit wiring pitch, are generated among tracks T1-T11 provided in parallel with unit wiring pitch interval, on a map used for searching a wiring route, allowing occupation by 2-track amount relative o a wiring route of wiring pitch = 1.5. For a wiring L6, for example, a virtual track V8 is selected for route on a map and wired at searching a wiring route, with tracks T8 and T9 occupied on the map by the wiring L6. Thus, by the use of a wiring route searching map where a virtual track with a half pitch deviated is employed allowing, an additional wiring of wiring pitch = 1 can be laid with the same numbers of tracks.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic wiring method and apparatus, and more particularly, to an automatic wiring method and apparatus suitable for automatic design of a semiconductor integrated circuit.

[0002]

2. Description of the Related Art In recent years, with the development of fine processing technology for LSI (semiconductor integrated circuit), wiring line width and wiring space have been reduced, wiring resistance and capacitance between wirings have been increased, and delay in signal propagation, Signal noise due to crosstalk between wires has become a major problem. For this reason, a technique for avoiding the above problem has been used by obtaining a wiring path with a larger wiring width and a larger wiring interval than a specific wiring for a specific wiring. Under the condition that the wiring width and the wiring interval are mixed, it is required to obtain a wiring path at high speed.

First, an outline of an automatic wiring process in a design process of a semiconductor integrated circuit will be described with reference to FIG. After the circuit connection information and the element library have been input and the automatic placement step (step A1) has been performed, in the general wiring step (step A2), the connection between the terminal pairs (pin pairs) to be connected is roughly at the block level. The wiring route is selected, and the next detailed wiring process (step A3)
Then, wiring connection between the terminal pairs in the block is performed, and then the process proceeds to a mask pattern designing step (step A4).

Next, referring to FIG. 7, an outline of the general wiring and the detailed wiring will be described. As shown in FIG. 7, at the stage when the element arrangement is completed by the automatic arrangement step, the wiring region is divided into a grid-like schematic block, and in the schematic wiring step, the schematic block including the starting point of the terminal pair to be connected is connected. A process of searching for and selecting a wiring route to a schematic block including an end point of a terminal pair at a schematic block level, and a virtual terminal corresponding to a wiring pitch of a wiring on a boundary line of the selected schematic block; Is assigned.

More specifically, referring to FIG. 7, a case where the connection target terminal pairs among the schematic blocks B11 to B44 divided into a matrix are a terminal P1 in the schematic block B11 and a terminal P2 in the schematic block B44. In the route search of the schematic wiring, for example, the schematic blocks B11, B21, B22, B23, B24, B34, B
44 is selected, and a virtual terminal, which is an intersection between the boundary of each schematic block and the wiring, for example, X1 of B11 and X2 of B11 are assigned.

In the detailed wiring step subsequent to the schematic wiring step, wiring processing is performed in the schematic block. In this wiring step, a terminal pair to be connected is a virtual terminal at a boundary between the schematic blocks (for example, FIG. 7). Schematic block B2
1 to B24), or a wiring connection between a terminal of an element arranged in a schematic block and a virtual terminal at a boundary (for example, schematic blocks B11 and B44 in FIG. 7). Usually, in the detailed wiring step, the track position of the virtual terminal on the boundary determined in the schematic wiring step is taken over as it is in the detailed wiring step. For example, referring to FIG. 7, in the detailed wiring for the schematic block B11, wiring is performed between the terminal P1 and the virtual terminal X1, and in the detailed wiring for the schematic block B44, wiring is performed between the terminal P2 and the virtual terminal X2.

FIG. 8 illustrates some types of wiring pitch, wiring width, and wiring interval. The wiring pitch represents a necessary distance between the centers of the wiring, and is obtained from the wiring width and the wiring interval. The distance required between the wiring centers of the wiring connection request having the smallest wiring width and wiring interval is called "one wiring pitch" (unit wiring pitch). A straight line drawn at every wiring pitch interval for wiring to pass is called a "track".

The wiring connection request has the wiring pitch as attribute information, and the number of tracks required for each wiring pitch is defined in advance.

In the general wiring step, the simplest strategy for allocating virtual terminals on the boundary of the general block is that one side of the boundary, for example, 1
Assuming that there is a capacity of 0 tracks, for example, when wiring requiring two tracks is performed, "10-2"
In other words, the remaining capacity for eight tracks is obtained, and from the number of tracks required by the wiring to be connected and the current number of empty tracks or the number of continuous empty tracks, the wiring possibility of the wiring, that is, the virtual possibility on the boundary. Check whether terminal assignment is possible.

As a result of the check, if there are not enough empty tracks required by the wiring, the search is terminated, assuming that a route at the approximate block level cannot be found.

Here, as a premise for understanding the invention,
With respect to the wiring, the outline of the relationship between the wiring width, the wiring interval, and the wiring pitch will be described with reference to FIG. The minimum wiring width and minimum wiring interval are α and β, respectively.
The wiring pitch of the wiring having the wiring width A and the wiring interval B is
It is derived as (A + B) / (α + β).

FIG. 8A shows a wiring width A = α, a wiring interval B
8B, the wiring width A = 2α, the wiring interval B = β, the pitch = 1.5, and FIG. 8C shows the wiring width A =
α, wiring interval B = 2β, pitch = 1.5, FIG. 8D shows wiring width A = 1.5α, wiring interval B = 1.5β, pitch =
1.5, FIG. 8 (e) shows the wiring width A = 2.5α, the wiring interval B
= 2.5β and a wiring example of pitch = 2.5 (here, α = β). Each of the wiring examples shown in FIGS. 8B to 8E can be wired according to the present invention, as described later, with reference to the track shown in FIG.

FIG. 9 is a flowchart showing an example of a typical processing procedure of wiring connection processing in a conventional automatic wiring processing system. Referring to FIG. 9, in the wiring connection processing, a terminal pair information group to be connected is provided as a list, and first, a terminal pair group to be connected is input (step S20).
1) The wiring connection requests between the terminal pairs are sequentially taken out (step S202), and the wiring connection is searched for the wiring connection request using a wiring route search map composed of equally spaced grids. (Step S20
3).

As described above, in the conventional automatic wiring processing system, a wiring path in which a large wiring width and a wide wiring interval are mixed is obtained by a single wiring path search map.

By the way, as shown in FIG. 5B, a wiring path with a wiring pitch = 1.5 occupies three tracks in a wiring area, which leads to a reduction in the degree of integration of wiring. Become. That is, when determining the wiring route using the map having the wiring pitch of 1, in FIG. 5A, the wiring pitch is set to all five tracks T1 to T5.
Although one wiring (L1 to L5) to be connected is drawn, as shown in FIG. 5B, the wiring to be connected (wiring L2 on the track T3) having a wiring pitch = 1.5 as shown in FIG. On the other hand, the tracks T2 and T4 on both the left and right sides of the wiring L2 are within the wiring interval of the wiring, so that both tracks T2 and T3
Must be left empty and cannot be used. As a result, as shown in FIG. 5B, a connection request with a wiring pitch of 1.5 requires three tracks.

Also, in the general wiring step, when processing a plurality of wiring connection requests having different wiring pitches, in the assignment of virtual terminals on the boundary of the general block, as shown in FIG.
As shown in (b), for a wiring connection request with a wiring pitch of 1.5, three tracks are allocated as costs.
Will be.

[0017]

As described above, in the conventional automatic wiring method, even when searching for wiring paths with different wiring pitches, a single wiring path search map (map having tracks at unit wiring pitch intervals) is always used. Is used, even if there is a sufficient area required for wiring,
There is a problem that a situation in which a wiring route cannot be detected occurs.

That is, as described above, when obtaining the wiring route of the wiring having the wiring pitch of 1.5, FIG.
As shown in FIG. 2, three adjacent tracks are required. For this reason, for example, in the rough wiring step, when allocating virtual terminals on the boundary of the rough block, it is determined whether or not the wiring can be wired in the rough block in response to a wiring connection request having a wiring pitch of 1.5. That is, as a criterion for determining whether or not virtual terminals can be assigned, it is determined whether or not the number of remaining tracks obtained by subtracting three tracks from the current remaining number of tracks is 0 or more. Said that the wiring could not be pulled. Then, if it is determined that the wiring cannot be drawn, after changing the route of the other schematic wiring that has been processed or changing the arrangement of the element blocks, the entire schematic wiring is redone again. Processing will be performed.

However, in the case shown in FIG. 10 (b), between the wired wirings L5 and L6, actually,
Although there is room for the wiring with the wiring pitch = 1.5, the tracks T8 and T9 are located between the existing wirings L5 and L6.
(The other tracks are set in the wiring prohibition area at the time of searching for a wiring route because of the relationship with the wiring data already existing), and thus do not satisfy the above-described criteria for the remaining track number determination criterion. It is concluded that the wiring with the wiring pitch = 1.5 cannot be passed, and as described above, the general wiring must be redone. As a result, the wiring process takes a long time, and the chip area increases, that is, it is difficult to realize high-density wiring.

As described above, in the conventional automatic wiring system, even if there is a sufficient area, it becomes impossible to search for a route for a connection request at a predetermined wiring pitch, and a situation occurs in which wiring cannot be performed. In this case, it is practically impossible to manually correct the track spacing and the like manually from the terminal in the automatic wiring system in terms of the number of wirings, the circuit scale, and the like in both the schematic wiring and the detailed wiring process. .

The present inventor has found that such a situation occurs because only one type of map is used for searching for a wiring route.

Therefore, the present invention has been made based on the recognition and knowledge of the above-mentioned problems, and the object is to
Even when wirings with different wiring pitches are mixed, it is possible to avoid a situation in which wiring cannot be performed due to a shortage of tracks at the time of wiring search, suppress a decrease in wiring density, improve wiring efficiency, and improve wiring efficiency. An object of the present invention is to provide an automatic wiring device and a method that enable wiring.

It is another object of the present invention to provide an automatic wiring method and apparatus which suppresses and reduces an increase in computation time and memory capacity required for searching for a wiring route.

[0024]

According to the present invention, there is provided an automatic wiring method for searching for a wiring route according to a wiring pitch of a wiring to be connected, using an optimal map for the wiring pitch. It is like that.

The automatic wiring device according to the present invention is a map used for searching for a wiring route, wherein the map is switched in accordance with a plurality of maps whose track positions are shifted from each other and a wiring pitch of the wiring for which connection is requested. And searching for a wiring route on a map corresponding to the wiring pitch of the wiring to be connected.

Further, in the present invention, a configuration in which a virtual track deviated by a half pitch is introduced between tracks at a unit wiring pitch interval for searching a wiring path to search for a wiring path may be adopted. One can achieve.

[0027]

Embodiments of the present invention will be described. FIG. 1 is a diagram for describing an embodiment of the present invention. Referring to FIG. 1, in the first preferred embodiment of the present invention, tracks arranged side by side at unit wiring pitch intervals (also referred to as "reference tracks") on a map used for wiring path search. T in FIG. 1 (a)
0 to T11), a virtual track shifted by a predetermined pitch, for example, の of the unit wiring pitch (also simply referred to as “１ ／ pitch” or “half pitch”) (FIG. 1)
(A) V1 to V10) are generated, and only two tracks are required to occupy the wiring path with the wiring pitch = 1.5. That is, referring to FIG. 1B showing the wiring result on the wiring region, the wiring L6 having the wiring pitch = 1.5 is not shown in FIG.
A virtual track V8 is routed and wired on the map of (a), and two tracks T8 and T9 are occupied on the map by the wiring L6.

As described above, in the first embodiment of the present invention, as shown in FIG. 5C, by using the wiring route search map in which the virtual tracks shifted by half the pitch are introduced, as shown in FIG. In the case where the wiring L2 of 1.5 is wired, the wiring pitch is increased by one more for the same number of tracks (five in FIG. 5) as compared with the wiring result by the conventional method shown in FIG. Wiring can be drawn.

However, in the above-described first embodiment of the present invention, a virtual track is inserted between the original tracks, and the route search space is 16 times (4 × 4) the original map.
And the processing time and memory usage increase.

Next, a second embodiment of the present invention will be described. The second embodiment of the present invention is an improvement of the first embodiment in terms of both the amount of calculation and the memory capacity. FIG. 2 is a diagram for explaining a second embodiment of the present invention. Referring to FIG. 2, the present invention provides:
In the preferred second embodiment, a plurality of wiring route search maps (see FIGS. 2A and 2B) are used for each wiring to be connected, as a wiring pitch given as an attribute of the wiring request. In accordance with the wiring route search using a map suitable for the wiring pitch.
Compared with the first embodiment, the memory capacity and the operation time required for searching for a wiring route are reduced, and the same as the conventional wiring processing.

That is, although the processing time of the wiring route search is substantially proportional to the size of the wiring route search space, in the second embodiment of the present invention, the size of the wiring route search map, ie, the wiring route search The size of the search space is shown in FIG.
And so on, so that it is possible to obtain a high-density wiring path with a time and a memory capacity substantially equal to the calculation time of the conventional method.

Also, in the second embodiment of the present invention, as shown in FIG. 5D, when wiring having a wiring pitch of 1.5 is formed, the conventional method is used similarly to FIG. 5C. In comparison with the wiring result (see FIG. 5B), one more wiring can be provided for the same number of tracks (five in FIG. 5) with a wiring pitch of one. FIG.
Each of the wiring examples shown in (b) to (d) of FIG. 8 also has a wiring center between the track positions shown in FIG. 8 and shows a wiring result in which a route is searched by applying the present invention. .

[0033]

EXAMPLES Examples of the present invention will be described in order to explain the above-mentioned embodiment in more detail. In the first embodiment of the present invention, the present invention is applied to the detailed wiring process of the semiconductor integrated circuit described above.

FIG. 1 is a diagram for explaining a first embodiment of the present invention. FIG. 1A shows a map, and FIG. 1B shows a wiring result. Referring to FIG. 1, a first embodiment of the present invention is shown.
In the embodiment, tracks (also referred to as "reference tracks", for example, T1 to T
11), virtual tracks (for example, V0 to V10) shifted by a predetermined pitch, for example, 1/2 pitch (see FIG. 1A), and the wiring pitch = 1.
For five wirings, three tracks are required in the conventional method, but only two tracks are required.

That is, referring to FIG. 1B showing the wiring result on the wiring area, for example, the wirings L1 to L5, L6
When processing a connection request for a wiring L6 with a wiring pitch = 1.5 as a wiring connection target in a state of “already wired”, the wiring route search map 1/1 shown in FIG.
Information on the existing wirings L1 to L5 is set on the map at two pitch intervals. Specifically, tracks T1, T2, T
6, T7 and T10 are used in the existing wirings L1, L2, L5 and L6, so that virtual tracks V0, V1, V2, V5, V6, V7, V9, V10 next to these tracks are used.
Are prohibited and the wiring is prohibited. Since the virtual track V4 is used for the already-connected wiring L3, the virtual tracks V3, V4 and V5 are disabled and the wiring is prohibited. Then, in the map of FIG. 1A, the virtual track V8 remains as an unused wiring area, and unused tracks T8 and T9 exist on both sides of the virtual track V8. Therefore, it is determined that a wire with a wire pitch of 1.5 can be drawn, and the route is determined as a route for the wire L7 is found in the track V8 in the wire route search map.

As described above, in the first embodiment of the present invention, as shown in FIG. 5C, the wiring pitch is reduced by using the wiring route search map in which the virtual tracks shifted by half the pitch are introduced. When the wiring L2 of 1.5 is wired, the wiring pitch is increased by one more for the same number of tracks as compared with the conventional wiring result shown in FIG.
, And high-density wiring can be realized.

In the first embodiment, a virtual track is inserted between the original tracks, and the route search space is 16 times (4 × 4) the size of the original match. Usage is increasing. Therefore, in the second embodiment of the present invention, a wiring route search map is switched for each wiring connection request to search for a wiring route, and the wiring route searching map is shown in FIG. As shown in FIG. 2B, a normal wiring route search map (also referred to as a “reference map”) and a wiring route search map shifted from this by a half pitch are used. Referring to FIG. 2B, the wiring route search map shifted by ピ ッ チ pitch corresponds to each track of the reference map shown in FIG.
Tracks V0 to V10 are provided at positions shifted by 〜 of the unit wiring pitch with respect to T10. Note that FIG.
2C is a diagram in which the maps of FIGS. 2A and 2B are integrated, and FIG. 2D is a diagram illustrating an example of a wiring result.

FIG. 3 is a flowchart showing a processing procedure according to the second embodiment of the present invention. The operation of the second exemplary embodiment of the present invention will be described with reference to FIG. First, a group of terminal pairs to be connected is input (step S101).

Next, a wiring connection request R (as attribute information,
For example, a start point terminal, an end point terminal, and wiring pitch information are extracted (step S102). Here, the value of the wiring pitch is one or more rational numbers as described above.

Next, it is determined whether or not N ≦ wiring pitch <(N + ／) (step S103). If the wiring pitch does not satisfy the above condition, a normal wiring route search map (FIG. 2 ( a), the already-routed wiring result information is set (step S103), and a wiring route of the wiring to be connected is searched using this map (step S10).
4) The obtained wiring route is updated and stored as already-wiring information (step S108). Note that any search method such as a line segment search, a channel search, and a maze search can be used as the search for the wiring route.

On the other hand, if it is determined in step S103 that the condition of N ≦ wiring pitch <N + ／ is satisfied (for example, wiring pitch = 1.5), the wiring route search map shifted by ピ ッ チ pitch (FIG. b)), the already-routed wiring result information is set in step S106), and the wiring path of the connection target wiring is searched on the wiring path search map shifted by ピ ッ チ pitch (step S107), and the obtained wiring is obtained. The route is updated and held as the existing wiring information (step S10).
8) Subsequently, it is determined whether there is a wiring to be wired (step S109), and when all the wiring requests are processed, a wiring result is output (step S110).

FIG. 4 is a diagram showing, as functional blocks, a configuration for realizing the automatic wiring processing system according to the present invention on a data processing apparatus constituting a CAD system. Referring to FIG. 4, an automatic wiring system according to an embodiment of the present invention includes, for each wiring connection request, a determination unit 11 for determining a wiring pitch of the wiring; Map switching means 1 for switching a route search map
2, a map expanding means 13 for expanding the already-wired information on the switched map, and a wiring for searching for the wiring route of the wiring connection request using the map in which the already-wired information selected by the map switching means 12 is reflected. A route search unit 14; a wiring result expanding unit 15 that maps the wiring route determined by the wiring route search unit 14 as coordinates on the wiring region to coordinates on the wiring region; And control means 20 for controlling the start-up control and the like. Each of these means can realize its functions and processing by a program executed on the main memory of the data processing device, and executes the data processing by a known method from a readable recording medium on which the program is recorded. The present invention can be implemented by reading and executing with the device.

For example, as shown in FIG. 10, when there are mixed wiring connection requests having a wiring pitch of 1.0 and 1.5, in the conventional method, between two wirings L5 and L6 having a wiring pitch = 1.0. In the actual wiring area, although there is a sufficient area for the wiring with the wiring pitch = 1.5 to pass,
During that time, a wiring route with a wiring pitch of 1.5 could not be found.

In contrast, in the second embodiment of the present invention, 1 /
Since the wiring route search is performed using the two-pitch shifted map, for example, as shown in FIG. 2D, the wiring pitch = 1.5 between the two wirings L5 and L6 having the wiring pitch = 1.0.
Can be passed through the wiring L7.

More specifically, referring to FIG.
When processing a connection request for a wiring L7 having a wiring pitch of 1.5 as a wiring connection target in a state where L5 and L6 are "already wired", a wiring route search map shown in FIG. Pitch shifted map (Tracks V0 to V10
Are the tracks T0 to T10 and 1/2 of the tracks in FIG.
(Pitch is shifted) is set, and wiring information that has been wired up to that point is set on the selected map. That is, the map developing means 13 compares the information of the existing wirings L1 to L5 represented on the integrated map shown in FIG. 2C with respect to the map shifted by ピ ッ チ pitch (FIG. 2B). Set. Specifically, tracks T1, T2, T6, T7,
Since T10 is used in the existing wirings L1, L2, L5, L6, tracks V0, V1,.
Assuming that V2, V5, V6, V7, V9, and V10 cannot be used, the corresponding track on the map in FIG. 2B is prohibited from being routed, and V4 is used for the already-routed L3. Assuming that V4 and V5 cannot be used, the corresponding tracks on the map of FIG. Then, in the map of FIG. 2B, the track V8 remains as an unused wiring area. Referring to the integrated map of FIG. 2C, unused tracks T8 and T9 exist on both sides of V8, that is, since there are two tracks, wiring with a wiring pitch of 1.5 can be drawn. Based on this map, the wiring route searching means 14
The route is set assuming that the route of L7 is found in the track V8 of the wiring route search map of (b). When the wiring route is determined, the wiring result information on the map shifted by ず れ pitch of the wiring L7 is mapped to the coordinates on the wiring area, and stored in the storage device as the wiring result on the wiring area. You.

Next, as a third embodiment of the present invention, a case where the present invention is applied to a schematic wiring step will be described. This embodiment is different from the first embodiment in that, in the general wiring step, when the general wiring path is searched after the path search at the general block level, the first
As described in the embodiment, using a map (see FIG. 1A) in which a virtual track is introduced in the middle of the unit pitch,
Virtual terminals are assigned to the schematic wiring on the boundary of the schematic block in units of 1/2 pitch. In the cost calculation when allocating tracks for virtual terminals of schematic wiring,
For the wiring connection requirement of wiring pitch 1.5, the conventional method is 3
According to the present invention, while a truck was required,
Since it is sufficient to allocate two tracks, a condition for determining whether (the number of remaining tracks−2) is equal to or more than 0 is determined as a criterion for determining the possibility of wiring, and further, (the number of remaining tracks−
If 2) is 0 or more, 2
It is determined whether there is a track or not and whether or not wiring is possible is determined. As described above, in the conventional method, the number of remaining tracks is three.
If there are no more tracks, the general wiring is changed or the arrangement of the element blocks is changed back to the previous process. However, according to the present invention, if the number of remaining tracks is two or more, the wiring pitch is reduced. Since there is a possibility of searching for a wiring route of 1.5, high-density wiring is made possible as compared with the conventional method, and the processing efficiency of the automatic wiring process is improved.

That is, when wirings having different wiring pitches are mixed, a virtual track is introduced in the middle of the unit pitch, and 1
By allocating virtual terminals on the boundary of the schematic block in units of / 2 pitch, it is possible to allocate as shown in FIG. 5C even for a wiring request with a wiring pitch of 1.5. It enables high-density wiring.

In the above embodiments, for simplicity of explanation,
Although the searched wiring path is a straight line, the wiring path is not limited to a straight line, and the track has been described only in the column direction on the map.
The virtual track shown in FIG. 2A and the map shown in FIG. 2B also deviate from the reference track in the row direction.

In the above embodiment, as an example in which wirings having different wiring pitches coexist, wiring pitches 1 and 1.
5 is described, but the present invention is not limited only to such a wiring pitch.
It can be applied to any wiring pitch of 3.5,... Or other values. For example, if the wiring pitch of the wiring to be connected is 2.5, the conventional method requires five tracks, but by applying the present invention, FIG.
As shown in (e), the wiring can be drawn by four tracks. That is, when the minimum wiring width and the minimum wiring interval are α and β, respectively, for example, when the present invention is applied to a wiring having a wiring width of 2.5α and a wiring interval of 2.5β and a wiring pitch = 2.5 The wiring can be drawn by four tracks. In general, for a wiring having a wiring width of Xα and a wiring interval of Yβ, in the conventional method, X + Y
(However, when X + Y is an integer value, the number of tracks equal to the integer value, and when it is not an integer value, the number of tracks equal to the number of tracks is changed to (X + Y -1) (however, when X + Y-1 is an integer value, the wiring can be drawn by the number of tracks equal to the integer value, and when X + Y-1 is not an integer value, an integer value obtained by rounding up the integer value). Further, in the present invention, the virtual track or the alternative map shifted by ピ ッ チ pitch is not limited only to the shift of ピ ッ チ pitch, and the number of maps is not limited to two. Of course.

Further, the present invention is not limited to only the automatic wiring at the time of designing a semiconductor integrated circuit, but may be applied to the automatic wiring processing at the time of designing a substrate.

[0051]

As described above, according to the present invention,
With respect to a wiring connection in which different wiring pitches coexist, a wiring path that cannot be detected due to a shortage of tracks in the conventional method can be detected, and a high-density wiring path can be obtained.

Further, according to the present invention, since the search space of the wiring route search map can be the same as that of the conventional method, the same processing time as the conventional method and the mixed wiring of different wiring pitches with the same memory capacity can be used. There is an effect that a group route search can be executed.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams for explaining an embodiment of the present invention, in which FIG. 1A is a diagram schematically showing a map and FIG.

FIGS. 2A and 2B are diagrams for explaining another embodiment of the present invention, wherein FIG. 2A shows a normal map, and FIG. 2B shows a map obtained by shifting the map of FIG. (C) is a diagram schematically showing a state in which two maps are integrated, and (d) is a diagram schematically showing a wiring result.

FIG. 3 is a flowchart showing a processing procedure of an embodiment of an automatic wiring method according to the present invention.

FIG. 4 is a diagram showing a configuration of an embodiment of an automatic wiring system according to the present invention by functional blocks.

FIG. 5 is a diagram for explaining an embodiment of the present invention;
(C) and (d) are wiring results according to the embodiment of the present invention,
(A), (b) is a figure which illustrated the wiring result by conventional wiring processing as a comparative example.

FIG. 6 is a process chart for describing a design flow of the semiconductor integrated circuit.

FIG. 7 is a schematic diagram for explaining a schematic wiring step and detailed wiring.

FIG. 8 is an explanatory diagram for explaining a wiring pitch and a state of wiring.

FIG. 9 is a flowchart for explaining a conventional automatic wiring processing method.

FIG. 10 is a diagram for explaining a problem of a conventional automatic wiring processing method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Wiring pitch determination means 12 Map switching means 13 Map developing means 14 Wiring route searching means 15 Wiring developing means 20 Control means B11 to B44 Schematic blocks L1 to L7 Wiring P1, P2 terminals T0 to T11, V1 to V10 Tracks X1, X2 virtual Terminal

Claims (15)

[Claims] When automatically wiring a wiring group having a plurality of wiring pitches, based on wiring pitch information for each wiring to be connected, a plurality of wiring route search maps in which track positions are shifted from each other are provided. An automatic wiring method, wherein a route of the wiring to be connected is searched for using a wiring route search map optimal for the wiring pitch. 2. A method for automatically routing a wiring group having a plurality of wiring pitches, wherein a plurality of wiring route search maps in which track positions are shifted from each other are prepared, and wiring of wiring to be connected is performed. An automatic wiring method, wherein a wiring route search map is switched according to a pitch to search for a route of the wiring. 3. A plurality of wiring route search maps having the same track interval.
Or the automatic wiring method according to 2. 4. A method for automatically routing a group of wirings having a plurality of wiring pitches, wherein a map used for searching for a wiring path is a map in which virtual tracks are inserted between tracks at unit wiring pitch intervals. A search for a route of a wiring to be connected by using the method. 5. A map for use in searching for a wiring route, wherein a first map in which track intervals are unit wiring pitches,
A map group including at least the first map and a second map in which track positions are shifted by half of the unit wiring pitch is prepared, and wiring processing is performed for a wiring group including wirings having different wiring pitches. According to the wiring pitch of the wiring to be connected, an optimum map is selected from the map group for each wiring to be connected, and the wiring is selected on the map according to the wiring pitch of the wiring to be connected. An automatic routing method, wherein a search for a route is performed. 6. An automatic wiring method for a semiconductor integrated circuit, comprising: the automatic wiring method according to claim 1;
An automatic wiring method used in a detailed wiring step. 7. An automatic wiring method for a semiconductor integrated circuit, wherein in the general wiring step, when allocating virtual terminals to tracks on the approximate block boundaries, further virtual tracks are inserted between tracks at unit wiring pitch intervals. An automatic wiring method, wherein a virtual terminal corresponding to a wiring to be connected is assigned using a map that has been obtained. 8. In an automatic wiring method for a semiconductor integrated circuit, a track position is determined based on wiring pitch information for each wiring to be connected when searching for a wiring path of a wiring group having a plurality of wiring pitches in a schematic wiring step. Out of a plurality of wiring route search maps that are shifted from each other, a route of the wiring is searched using a wiring route searching map that is optimal for the wiring pitch. An automatic wiring method, wherein a virtual terminal is assigned by the method. 9. A search for a route of the wiring, by comparing and determining the remaining track amount on the schematic block boundary with a track capacity required according to a wiring pitch of the wiring to be connected. 9. The automatic wiring method according to claim 7, wherein a wiring possibility is determined. 10. A map used for searching for a wiring route,
A plurality of maps having track positions shifted from each other are provided, and a value of a wiring pitch of the wiring is determined for each wiring to be connected, and one of the plurality of maps is selected according to the determination result. Means for performing a search for a wiring path on one map selected according to the wiring pitch of the wiring, for each wiring to be connected. Wiring device. 11. A map used for searching for a wiring route,
Means for providing a map in which virtual tracks are inserted between reference tracks at unit wiring pitch intervals, and performing a route search for wiring using the map when performing wiring processing of a wiring group including wirings having different wiring pitches. An automatic wiring device, comprising: 12. The map according to claim 1, wherein the plurality of maps comprise first and second maps in which respective track positions are shifted from each other by の of a unit wiring pitch.
0 automatic wiring apparatus. 13. The automatic wiring apparatus according to claim 11, wherein said virtual track is shifted from an adjacent reference track by 1/2 of a unit wiring pitch. 14. A map used for searching for a wiring route,
A first map in which the interval between tracks is a unit wiring pitch, and a second map in which the first map and the track position are shifted by half the unit wiring pitch are prepared, and in the automatic wiring processing, A wiring pitch determining means for determining wiring pitch information of a wiring to be connected; and, if the wiring pitch is not less than N and less than N + 0.5 (where N is a positive integer), based on the unit wiring pitch. Means for selecting the first map, and otherwise, controlling the switching for each wire so as to select the second map and search for the route of the wire; Means for expanding already-routed wiring result information; wiring path searching means for searching for a wiring path of the wiring to be connected on the switched map; and wiring determined by the wiring path searching means. Means for developing the route result on the wiring result information, comprising: 15. A map used for searching for a wiring route,
An automatic wiring apparatus comprising: a first map in which an interval between tracks is a unit wiring pitch; and a second map in which the first map and a track position are shifted by half the unit wiring pitch, (A) In automatic wiring processing, processing for determining wiring pitch information of wiring to be connected, (b) the wiring pitch is N or more and less than N + 0.5 (where N is positive integer)
If the first map, otherwise the second map
(C) processing of switching control for each wiring so as to perform a wiring route search using the map of (c), processing of expanding already-wired wiring result information on the switched map, (d) switching Processing for searching for a wiring route of the wiring to be connected on the obtained map, and (e) a wiring result determined by the wiring route searching means.
A recording medium storing a program for causing a computer to execute the above-described processes (a) to (e) of the process of developing the process into wiring result information.