JP2000196222A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JP2000196222A
JP2000196222A JP10370073A JP37007398A JP2000196222A JP 2000196222 A JP2000196222 A JP 2000196222A JP 10370073 A JP10370073 A JP 10370073A JP 37007398 A JP37007398 A JP 37007398A JP 2000196222 A JP2000196222 A JP 2000196222A
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
solder resist
mounting
mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10370073A
Other languages
Japanese (ja)
Inventor
Kazumitsu Ishikawa
石川和充
Hiroyuki Kudo
工藤啓幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi AIC Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi AIC Inc filed Critical Hitachi AIC Inc
Priority to JP10370073A priority Critical patent/JP2000196222A/en
Publication of JP2000196222A publication Critical patent/JP2000196222A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To resolve surface mounting trouble caused by a shape of a print mark formed by a screen print method in a surface of a printed wiring board. SOLUTION: In the manufacturing method of a printed wiring board, after an outer layer circuit conductor 3 of a both-sided and multilayer printed wiring board is formed, a solid print part 8 for a print mark 5 is formed before formation of solder resist, and a solder resist film 4 is formed thereon. As a result, a print mark, etc., are formed by a pattern of solder resist, a wiring board surface can be finished smoothly and part mounting reliability is improved since a surface part can be mounted stably.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、面付部品実装用の
プリント配線板の製造方法に関する。
The present invention relates to a method for manufacturing a printed wiring board for mounting surface-mounted components.

【0002】[0002]

【従来の技術】従来のプリント配線板について、図2に
基づいて説明する。図2(a)に示すように、両面、及
び多層プリント配線板の基材1の表面にサブトラクティ
ブ法、あるいは、アディティブ法により部品実装用の面
付ランド2を含む回路導体3を形成する。次に、図2
(b)に示すように感光性ソルダーレジストをディップ
法、カーテンコーター法、静電塗装法、スプレー法、印
刷法等で外層表面の全面、又は所定の一部に形成し、仮
乾燥する。その後の露光工程に於いて、所定のマスクフ
ィルムを使用して該表面の部品実装用の面付ランド2の
位置にある感光性ソルダーレジストに対しては紫外線を
遮り、一方、その他の該表面の所望の箇所の感光性ソル
ダーレジストに対しては紫外線を照射して光重合させ
る。次に現像工程において紫外線遮光部の剥離除去を行
い、本乾燥工程を経て感光性ソルダーレジスト膜4の硬
化被膜を所定の形状で形成する。その後、図2(c)に
示すように、次工程でソルダーレジスト膜4の上面の所
定部分に部品実装用、あるいはサービスマークとしての
文字、シンボル記号、品番などの捺印マーク5をスクリ
ーン印刷法で形成する。以上の従来の方法では、スクリ
ーン印刷法によって形成され、特に、表面部品実装用面
付ランド2の間に設置される部品実装用の捺印マーク5
は、表面実装部品の半田付け不良を防止するための半田
ブリッジ防止被膜であり、通常は部品実装用の捺印マー
ク5の上部に面付部品を搭載する場合が多い。この場
合、表面部品実装用の面付ランド2の間に形成された従
来の凸形状の捺印マーク5の上に搭載される表面実装部
品は点接触状態で搭載されるため不安定な実装状態とな
り、そのため図2(d)の表面実装用面付部品6の実装
不良状態を示すような不安定なはんだ付け不良(片側の
はんだフィレット9に固定されるような、いわゆる「ツ
ームストーン現象」と称するはんだ付け不良)を招く一
因となってる。
2. Description of the Related Art A conventional printed wiring board will be described with reference to FIG. As shown in FIG. 2A, a circuit conductor 3 including a surface-mounted land 2 for component mounting is formed on both surfaces and on the surface of a substrate 1 of a multilayer printed wiring board by a subtractive method or an additive method. Next, FIG.
As shown in (b), a photosensitive solder resist is formed on the entire surface of the outer layer or a predetermined part by a dipping method, a curtain coater method, an electrostatic coating method, a spraying method, a printing method or the like, and is temporarily dried. In the subsequent exposure step, a predetermined mask film is used to block ultraviolet rays from the photosensitive solder resist at the position of the surface mounting land 2 for component mounting on the surface, while the other surface of the surface is protected. The photosensitive solder resist at a desired location is irradiated with ultraviolet rays to be photopolymerized. Next, in the developing step, the ultraviolet light shielding portion is removed and removed, and a cured film of the photosensitive solder resist film 4 is formed in a predetermined shape through the main drying step. Then, as shown in FIG. 2C, in the next step, a marking mark 5 such as a character, a symbol, or a product number for a component mounting or a service mark is formed on a predetermined portion of the upper surface of the solder resist film 4 by a screen printing method. Form. In the above-mentioned conventional method, the marking mark 5 for component mounting, which is formed by the screen printing method and is particularly provided between the surface-mounted land 2 for surface component mounting.
Is a solder bridge prevention coating for preventing poor soldering of surface mount components. Usually, an imposed component is mounted on the marking mark 5 for component mounting in many cases. In this case, the surface mounting components mounted on the conventional convex marking mark 5 formed between the surface-mounted lands 2 for mounting the surface components are mounted in a point contact state, resulting in an unstable mounting state. Therefore, an unstable soldering failure indicating a mounting failure state of the surface-mounted surface-mounted component 6 shown in FIG. Soldering failure).

【0003】[0003]

【発明が解決しようとする課題】前記に述べた従来例に
おいて、図2(c)に示すように、例えば、幅0.3mm
程度の捺印マーク5を面付ランド2の間に設置すると、
部品実装をするプリント配線板の表面に凸部が生じるた
め、表面実装部品が点接触状態で搭載され不安定とな
り、半田付けによる実装不良が発生する。本発明は、部
品実装表面の凸部を無くし、表面実装部品の面付ランド
間を平滑にし、正確な部品実装が出来るようにして、近
年、ますます小型化される傾向にある表面実装部品の実
装信頼性の向上を図るものである。
In the above-mentioned conventional example, as shown in FIG.
When the marking mark 5 is installed between the imposed lands 2,
Since a convex portion is formed on the surface of the printed wiring board on which the components are mounted, the surface-mounted components are mounted in a point contact state and become unstable, and mounting failure due to soldering occurs. The present invention eliminates protrusions on the component mounting surface, smoothes the gaps between the surface mounting lands of the surface mounting component, and enables accurate component mounting. This is to improve the mounting reliability.

【0004】[0004]

【課題を解決するための手段】上記課題を解決するため
に、 プリント配線板の外層表面に回路導体を形成し、
その後、文字、シンボルマーク、品番などの捺印マーク
用のベタ印刷をし、その上面にソルダーレジスト膜を形
成するプリント配線板の製造方法を提供するものであ
る。
In order to solve the above-mentioned problems, a circuit conductor is formed on a surface of an outer layer of a printed wiring board.
Thereafter, the present invention provides a method for manufacturing a printed wiring board in which solid printing for a marking mark such as a character, a symbol mark, and a product number is performed, and a solder resist film is formed on the upper surface thereof.

【0005】[0005]

【発明の実施の形態】本発明の実施形態を図1に基づい
て具体的に説明する。プリント配線板の製造方法は、ま
ず、両面銅張積層板あるいは内層形成された多層プリン
ト配線板の任意の箇所に穴明けを行う。その後、配線板
表面と穴の内壁に電解あるいは無電解銅めっきを施し、
両面間あるいは内層と外層間をスルーホール導体で接続
し、表面に感光性フィルムを密着し、フォトテンティン
グ法等により表面回路導体を形成する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be specifically described with reference to FIG. In a method of manufacturing a printed wiring board, first, a hole is formed in an arbitrary portion of a double-sided copper-clad laminate or a multilayer printed wiring board in which an inner layer is formed. After that, electrolytic or electroless copper plating is applied to the wiring board surface and the inner wall of the hole,
By connecting through-hole conductors between both surfaces or between the inner layer and the outer layer, a photosensitive film is adhered to the surface, and a surface circuit conductor is formed by a photo tenting method or the like.

【0006】上記の方法で形成したプリント配線板の斜
視図と断面図を図1(a)に示す。同図のように両面あ
るいは多層プリント配線板の基材1の表面上に部品実装
用の面付ランド2等を含む表面回路導体3を形成した
後、図1(b)に示すように、部品実装用の捺印マーク
用のベタ印刷部8をスクリーン法で印刷する。この場
合、該エリアには実際に使用する捺印マーク用のベタ印
刷部8は捺印マークが形成される大きさの範囲で四角
形、円形、三角形、あるいは異形の塗りつぶし模様で印
刷する。
FIG. 1A is a perspective view and a sectional view of a printed wiring board formed by the above method. After a surface circuit conductor 3 including a surface-mounted land 2 for component mounting and the like is formed on both surfaces or on the surface of a substrate 1 of a multilayer printed wiring board as shown in FIG. A solid printing unit 8 for a seal mark for mounting is printed by a screen method. In this case, in the area, the solid printing unit 8 for the marking mark actually used is printed with a square, circular, triangular, or irregular shaped filling pattern within a size range in which the marking mark is formed.

【0007】次に、図1(c)に示すようにプリント配
線板に感光性ソルダーレジストを、ディップ法、カーテ
ンコーター法、静電塗装法、スプレー法、及び印刷法等
で塗布し、しかる後80℃/15分の仮乾燥を行う。
Next, as shown in FIG. 1 (c), a photosensitive solder resist is applied to the printed wiring board by a dipping method, a curtain coater method, an electrostatic coating method, a spray method, a printing method, and the like. Preliminary drying is performed at 80 ° C. for 15 minutes.

【0008】その後、面付ランド2などの半田付け用ラ
ンドの所定形状及び捺印マーク5の所定表示形状の遮光
マスクフィルムを使用して真上から紫外線による露光を
行い、現像し、遮光部の感光性ソルダーレジスト部をを
剥離除去し、面付ランド2と捺印マーク5を露出させる
ようにプリント配線板表面にソルダーレジスト膜4を形
成する。最後に、ポストキュアを150℃/30分間行
うことにより、感光性ソルダーレジスト膜4の形成を完
了する。
Thereafter, using a light-shielding mask film having a predetermined shape of the land for soldering such as the surface-attached land 2 and a predetermined display shape of the seal mark 5, exposure with ultraviolet light is performed from directly above, development, and exposure of the light-shielding portion. The conductive solder resist portion is peeled off and a solder resist film 4 is formed on the surface of the printed wiring board so as to expose the imposed land 2 and the marking mark 5. Finally, the formation of the photosensitive solder resist film 4 is completed by performing post-curing at 150 ° C. for 30 minutes.

【0009】上記の工程を経て、プリント配線板の表面
には、図1(c)に示すように、面付ランド2及び捺印
マーク5などの所定形状の抜き模様で構成される感光性
ソルダーレジスト膜4が形成される。以上の表面形成に
よって、図2(c)に示す従来の捺印マーク5とは異な
り実装用の面付ランド2に載置される表面実装部品に対
する配線板表面は凸部の無い平滑な感光性ソルダーレジ
スト表面となり従来の印刷法で形成される捺印マークと
比較して、より微細な捺印マークが形成される。また、
面付部品は水平で整然と搭載されることになり部品実装
の信頼性が向上する。
Through the above steps, the surface of the printed wiring board is formed on the surface of the printed wiring board with a photosensitive solder resist having a predetermined pattern such as a land 2 and a marking mark 5 as shown in FIG. A film 4 is formed. Due to the above surface formation, unlike the conventional marking mark 5 shown in FIG. 2 (c), the surface of the wiring board for the surface mounting component mounted on the mounting surface land 2 is a smooth photosensitive solder having no convex portions. A finer marking mark is formed on the resist surface as compared with a marking mark formed by a conventional printing method. Also,
The imposed components are mounted horizontally and orderly, and the reliability of component mounting is improved.

【0010】[0010]

【発明の効果】以上説明したように、本発明はプリント
配線板の面付ランドの間の表面をソルダーレジストによ
って平滑に仕上げることにより、面付部品をソルダーレ
ジストによって複数点、あるいは、より広い平面で支持
することにより、従来技術における凸状の捺印マークの
上部に搭載される場合と比較して、より安定で信頼性が
高く、高精度、高密度部品実装を可能にする。また、そ
の後の工程である配線板の外形加工工程において、印刷
された表示インクが受ける直接的な衝撃を軽減出来るた
め、捺印マークの部分剥離、欠け等の問題も解消出来る
という付加的効果が得られる。
As described above, according to the present invention, the surface between the lands with the surface of the printed wiring board is smoothed by the solder resist, so that the surface-mounted parts are formed at a plurality of points by the solder resist or on a wider plane. In this case, as compared with the case of mounting on a convex marking mark in the related art, more stable, high reliability, high precision, and high density component mounting can be realized. In addition, in the subsequent process of forming the outer shape of the wiring board, the direct impact of the printed display ink can be reduced, so that the additional effect of eliminating the problem of partial peeling or chipping of the marking mark can be obtained. Can be

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の製造方法の手順を示す斜視図及び断面
図である。
FIG. 1 is a perspective view and a cross-sectional view showing a procedure of a manufacturing method of the present invention.

【図2】従来例の製造方法の手順を示す斜視図及び断面
図である。
2A and 2B are a perspective view and a cross-sectional view illustrating a procedure of a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

1:基材 2:面付ランド 3:回路導体 4:ソルダーレジスト膜 5:捺印マーク 6:面付部品 8:捺印マーク用のベタ印刷部 9:はんだフィレット 1: base material 2: land with surface 3: circuit conductor 4: solder resist film 5: marking mark 6: surface-mounted part 8: solid printed part for marking mark 9: solder fillet

フロントページの続き Fターム(参考) 5E314 AA27 BB02 BB11 CC03 CC04 CC06 DD07 DD09 FF01 GG17 GG18 5E319 AA03 AB05 AC02 BB01 CC22 GG01 GG03 5E338 AA02 AA16 DD18 DD22 DD32 EE41 EE51 Continued on the front page F term (reference) 5E314 AA27 BB02 BB11 CC03 CC04 CC06 DD07 DD09 FF01 GG17 GG18 5E319 AA03 AB05 AC02 BB01 CC22 GG01 GG03 5E338 AA02 AA16 DD18 DD22 DD32 EE41 EE51

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 プリント配線板の外層表面に回路導体を
形成し、文字、シンボルマーク、品番などを表示する為
の捺印マーク用のベタ印刷をし、その上面にソルダーレ
ジスト膜を形成することを特徴とするプリント配線板の
製造方法。
1. A method of forming a circuit conductor on an outer layer surface of a printed wiring board, performing solid printing for a marking mark for displaying characters, symbol marks, and product numbers, and forming a solder resist film on the upper surface thereof. A method for manufacturing a printed wiring board, which is a feature.
JP10370073A 1998-12-25 1998-12-25 Manufacture of printed wiring board Pending JP2000196222A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10370073A JP2000196222A (en) 1998-12-25 1998-12-25 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10370073A JP2000196222A (en) 1998-12-25 1998-12-25 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JP2000196222A true JP2000196222A (en) 2000-07-14

Family

ID=18496010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10370073A Pending JP2000196222A (en) 1998-12-25 1998-12-25 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JP2000196222A (en)

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