JP2000195945A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable formation of a field insulating film which prevents the deterioration of an element and also enable the flattening of a field oxide film, in the manufacture of a semiconductor device which includes the formation process of the field insulating film. SOLUTION: This manufacture has a process of forming a first oxide film 22 on a semiconductor substrate 21, a process of forming an opening 22a by removing the first oxide film 22 on an active region from among the semiconductor substrate 21, a process of forming a buffer oxide film 25 on the semiconductor substrate 21 through the opening 22a, a process of forming a silicon nitride film 26 on the buffer oxide film 25 and the first oxide film 22, a process of patterning the silicon nitride film 26 and leaving it selectively on, at least, the buffer layer 25, and a process of oxidizing the semiconductor substrate 21 in the region which is not covered with the silicon nitride film 26 and forming an field oxide film 28.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device including a step of forming a field insulating film.

[0002]

2. Description of the Related Art In a semiconductor device, the gate oxide film of a MOS transistor formed on the surface of a semiconductor substrate is becoming thinner with the miniaturization of the element. It is desired that there is no deterioration.

In a semiconductor device, a field oxide film is formed on the surface of a semiconductor substrate in order to prevent the semiconductor substrate from being inverted by a voltage applied to a wiring and causing a leak current. The field oxide film is an essential element in a semiconductor device. Further, in a semiconductor device, flattening of a substrate or a film is required to cope with miniaturization of elements.

Next, a conventional method for forming a field oxide film on a semiconductor substrate will be described.

As a field oxide film, LOCOS (locla oxidati) obtained by selectively oxidizing the surface of a silicon substrate is used.
on of silicon) is widely used. But LOC
When the OS is applied as a field oxide film, a so-called bird's beak occurs at the periphery of the field oxide film, and the bird's beak enters the active region, so that narrowing of the active region has been a problem.

In order to solve such a problem, the following method of forming a field oxide film and the structure of a field insulating film are known.

As a first method, there is a method of forming a field oxide film as shown in FIG.

First, as shown in FIG. 1A, a buffer oxide film 2 and a silicon nitride film 3 are sequentially formed on a silicon substrate 1 and are patterned and left only in an active region. A sidewall 4 made of silicon nitride is formed on the side surfaces of the film 2 and the silicon nitride film 3.
Subsequently, as shown in FIG. 1B, the surface of the silicon substrate 1 is thermally oxidized using the silicon nitride film 3 and the sidewalls 4 as an oxidation-resistant mask to form LOCOS 5.
Further, after removing the buffer oxide film 2, the silicon nitride film 3 and the sidewalls 4, a gate oxide film 6 is formed on the surface of the silicon substrate 1 in the active region as shown in FIG.

As a second method, there is a method of forming a field oxide film called shallow trench isolation (STI) as shown in FIG.

First, as shown in FIG. 2A, a buffer oxide film 12 and a silicon nitride film 13 are sequentially formed on a silicon substrate 11, and then these are patterned to form a region where a field oxide film is to be formed. An opening 13a is formed in the substrate. Subsequently, a groove 14 is formed in the silicon substrate 11 by etching the silicon substrate 11 through the opening 13a. Subsequently, as shown in FIG. 2B, after the silicon oxide film 15 is buried in the groove 14, the silicon oxide film 15 on the silicon nitride film 13 is subjected to chemical mechanical polishing (CM).
P) to remove. Such STI technology is known as Pierre
C. Fazan et al, IEDM 93. PP.57-60.

[0011]

However, according to the first method, a bird's beak 5a generated around the periphery of LOCOS is used.
Is shorter and the area that erodes the active region is smaller,
When the gate oxide film 6 is formed in the active region, a white ribbon (silicon nitride) 7 as shown in FIG. 1C is generated in the gate oxide film 6, and the withstand voltage of the gate oxide film 6 is easily deteriorated.

According to the second method, the silicon oxide film 15 buried in the groove 14 of the silicon substrate 11 is thinned by the subsequent hydrofluoric acid treatment, and as shown in FIG. The corners of the silicon substrate 11 are exposed around. As a result, when the gate oxide film 16 is formed on the surface of the silicon substrate 11 and then the gate electrode 17 is formed across the groove 14, the gate oxide film 16 becomes thinner on the corner, and the electric field from the gate electrode 17 is reduced. Are concentrated at the corners of the groove 11, so that a phenomenon in which the source / drain current of the MOS transistor increases, that is, a phenomenon called "hump" easily occurs.

The STI is used to bury the silicon oxide film 15 in the trench 14 with the silicon nitride film 13 formed on the silicon substrate 11.
Is removed, the silicon oxide film 15 in the groove 14 protrudes from the main surface of the silicon substrate 11.

An object of the present invention is to provide a method of manufacturing a semiconductor device which enables formation of a field insulating film for preventing element deterioration and enables flattening of a field oxide film.

[0015]

Means for Solving the Problems (1) The above-mentioned problems are:
As shown in FIGS. 3 to 6 or 7 to 9, a step of forming a first oxide film 22 on a semiconductor substrate 21 and a step of forming the first oxide film 22 on an active region of the semiconductor substrate 21. Membrane 2
Forming an opening 22a by removing the opening 2a;
A buffer oxide film 25 on the semiconductor substrate 21 in FIG.
Forming silicon nitride films 26, 31 on the buffer oxide film 25 and on the first oxide film 22; and patterning the silicon nitride films 26, 31 to form at least the buffer A step of selectively leaving the layer on the layer 25 and a step of oxidizing the semiconductor substrate 21 in a region not covered by the silicon nitride films 26 and 31 to form field oxide films 28 and 33. The problem is solved by a method of manufacturing a semiconductor device.

In the method of manufacturing a semiconductor device described above,
As illustrated in FIG. 4A, the silicon nitride film 26,
The silicon nitride film 26 is selectively left inside and around the opening 22a by patterning the pattern 31.

In the method for manufacturing a semiconductor device described above,
As illustrated in FIG. 7B, the silicon nitride film 26 is characterized in that the silicon nitride film is selectively left smaller than the opening 22a by patterning the silicon nitride film 26. In this case, the opening 22a is formed wider than the active region.

In the above method for manufacturing a semiconductor device,
After the formation of the field oxide film, the field oxide film is etched to reduce a step formed at the edges of the field oxide films 28 and 33. (2) The above-mentioned problems are shown in FIGS.
As shown in FIG. 2, a step of etching a region other than the active region in the semiconductor substrate 36 (61) to form the groove 40 (65), and oxidizing the semiconductor substrate 36 through at least the groove 40, thereby Oxide film 4 in groove 40
1 (66). A method of manufacturing a semiconductor device, comprising:

In the above method for manufacturing a semiconductor device,
A portion of the oxide film 41 protruding from the semiconductor substrate 36 is thinned by etching or polishing.

In the method of manufacturing a semiconductor device described above,
The oxide film 41 covers the semiconductor substrate 36 in the active region.
In the case where the planarizing films 42 and 50 are formed on the oxide film 41, and the planarizing films 42 and 50 and the oxide film 41 are continuously etched, Flattening the oxide film 41 in the active region. in this case,
The flattening films 42 and 50 are, for example, a silicon-based coating film or a resist.

In the above method for manufacturing a semiconductor device,
The oxide film 41 formed on the active region of the semiconductor substrate 36 when the semiconductor substrate 36 is oxidized is removed by etching.

In the method for manufacturing a semiconductor device described above,
An edge of the oxide film 41 remaining around the active region is rounded by etching.

In the above method for manufacturing a semiconductor device,
As illustrated in FIG. 21, after the oxide film 41 is formed, a step of forming a polishing stopper film 53 on the oxide film 41, and forming an opening 53 a on at least the active region of the polishing stopper film 53. And a step of polishing and flattening the oxide film 41 protruding from the opening 53a. in this case,
Using the polishing stopper film 53 as a mask, etching and removing the oxide film 41 in the active region exposed from the opening 53a.

In the above method for manufacturing a semiconductor device,
As illustrated in FIG. 25, when forming the oxide film 66, the active region of the semiconductor substrate 61 is covered with a silicon nitride film 63 via a base oxide film 62. In this case, the silicon nitride film 63 may be a film used as an etching mask when forming the groove 65 in the semiconductor substrate 61.

It should be noted that the above-mentioned figure numbers and reference numerals are cited in order to facilitate understanding of the invention, and the invention is not limited thereto.

Next, the operation of the present invention will be described.

According to the present invention described in the above (1), the first oxide film is formed on the surface of the semiconductor substrate in advance, and then the active region is covered with the silicon nitride film to oxidize the semiconductor substrate to perform field oxidation. A film was formed. Therefore, since the first oxide film is previously formed in the region where the field oxide film is formed, the field oxidation time is shortened by that amount, and the amount of bird's beak eroding the active region is reduced.

When the pattern of the silicon nitride film for preventing oxidation is made wider than the active region, the amount of supply of oxygen to the active region of the semiconductor substrate is reduced to reduce the amount of bird's beak entering the active region. Less.

According to the invention described in the above (2), the semiconductor substrate other than the active region is etched in advance to form a groove (trench), and then the entire surface of the substrate is oxidized.
The oxide film at the corner of the active region surrounded by the groove is sufficiently thick to eliminate the corner. As a result, when the gate is oxidized, the corner of the active region is rounded, so that the gate oxide film is not particularly thin at the corner, and a uniform gate oxide film is formed. As a result, a hump is less likely to occur in the MOS transistor formed in the active region, and the source / drain characteristics are improved.

Further, when the active region is oxidized from all directions by the whole surface oxidation, a flat surface can be obtained and a field oxide film most suitable for miniaturization can be formed.

Further, when the width of the groove formed in the semiconductor substrate is reduced and a field oxide film is formed in the groove by oxidizing the semiconductor substrate, it is not necessary to embed the groove by the CVD method. The process is shortened. Further, the area of the active region can be effectively used by making the groove narrow.

[0032]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention. (First Embodiment) FIG. 3 is a sectional view showing a manufacturing process of a semiconductor device according to a first embodiment of the present invention.

First, as shown in FIG. 1A, a first silicon oxide film 22 is formed to a thickness of about 1500 ° by thermally oxidizing the main surface of a silicon substrate 21 at a temperature of 1050 ° C. Note that the formation of the first silicon oxide film 22 is not limited to the thermal oxidation method, and may be formed by a CVD method.

Subsequently, after a first silicon nitride film 23 is formed on the first silicon oxide film 22 to a thickness of 300 ° by the CVD method, a resist 24 is applied on the first silicon nitride film 23. Then, this is exposed and developed to form a window 24a in the active region. Then, as shown in FIG. 3 (b), the first opening 23a is formed in the first silicon nitride film 23 by etching the first silicon nitride film 23 through the window 24a of the first resist film 24. Subsequently, the first opening 22a is formed by etching the first silicon oxide film 22 in the active region.

When etching the first silicon oxide film 22, the first resist film 24 may be used as a mask, or the first silicon nitride film may be removed by removing the first resist film 24. 23 may be used for the mask. However, when the first silicon nitride film 23 is used as a mask,
The conditions are such that a sufficient etching selectivity of the first silicon oxide film 22 with respect to the first silicon nitride film 23 can be obtained.

A mixed gas of CF ₄ , CHF ₃ and Ar is used as an etching gas for the silicon nitride film, and CF ₄ is used as an etching gas for the silicon oxide film.

Next, with the first resist 24 removed, as shown in FIG. 3C, the surface of the active region of the first silicon substrate 21 is passed through the first opening 23a and the second opening 22a. Is thermally oxidized to form a buffer oxide film 25 having a thickness of 30 °. In this case, the first silicon oxide film 22
Is covered by the first silicon nitride film 23, so that the silicon substrate 2 under the first silicon oxide film 22
1 is prevented from being oxidized, and as a result, the thickness of the first silicon oxide film 22 does not substantially increase.

Thereafter, as shown in FIG. 3D, the upper surface of the first silicon nitride film 23 and the first and second openings 22a and 22a are formed.
A second silicon nitride film 26 is formed along the inner surface of 23a and the upper surface of the buffer oxide film 25 by the CVD method.
It is formed to a thickness of 0 °.

Then, a second resist 38 is applied on the second silicon nitride film 26, and is exposed and developed to form a resist covering the active region and its periphery (range of about 0.3 μm). Form a pattern.

Subsequently, portions of the first and second silicon nitride films 23 and 26 which are not covered with the second resist 38 are removed. Thereafter, when the second resist 38 is removed, FIG.
The state is as shown in FIG.

Next, the silicon substrate 21 is thermally oxidized at a substrate temperature of 1100 ° C. through the first silicon oxide film 22 in a region not covered by the second silicon nitride film
COS 27 is formed to a thickness of 1200 °. In this case, the periphery of the active region of the silicon substrate 21 is also oxidized, so that the LOCOS 27 is also formed around the active region. Then, the first and second silicon nitride films 23, 26
Is removed by etching with phosphoric acid.
The state is as shown in (b).

The LOCOS 27 and the first silicon oxide film 22 are integrated, and the first silicon oxide film 2
The thickness of LOCOS 27 is added to the thickness of 2
These are applied as the field oxide film 28.

The first and second silicon nitride films 2
At the same time when removing the buffer oxide film 25,
Is also removed.

Next, as shown in FIG. 4C, a sacrificial oxide film 2 having a thickness of 200 .ANG. Is formed on the surface of the silicon substrate 21 in the active region.
9 is formed by a thermal oxidation method.

Further, the sacrificial oxide film 29 is removed with hydrofluoric acid. As shown in FIG. 4D, the hydrofluoric acid etches the field oxide film 28 to make it slightly thinner and also rounds the upper edge of the field oxide film 28.

Next, as shown in FIG. 5, the surface of the silicon substrate 21 in the active region is thermally oxidized to form
It is formed to a thickness of 0 °. FIG. 6 shows a cross section taken along the line II shown in FIG.

Thereafter, the process moves to a step of forming a MOS transistor (not shown) in the active region.

As described above, in this embodiment, L
When the OCOS 27 was formed, the periphery of the active region was covered with the silicon nitride film 26 via the thick first silicon oxide film 22. This prevents the silicon nitride film from directly contacting the silicon substrate 21 and prevents a white ribbon from being generated in the gate oxide film 30 formed in the active region thereafter.

In this embodiment, the silicon substrate 21
After the openings 22a and 23a are formed in the active region by patterning the silicon oxide film 22 formed thereon, at least the insides of the openings 22a and 23a are covered with the silicon nitride film 26. After that, the silicon substrate 21 is oxidized by thermal oxidation so that the LOCOS
27, the silicon oxide film 22 and LOCOS2
7 is applied as the field oxide film 28.

Therefore, when the silicon substrate 21 is thermally oxidized to form the LOCOS 27, the silicon oxide film 22
Can be shortened by the amount of thermal oxidation for forming the LOCOS 27 by the amount formed in advance. Therefore, the penetration of oxygen into the active region is smaller than before, and the region where bird's beak is generated becomes shorter. As a result, the bird's beak hardly erodes the active area.

Further, since the silicon nitride film 26 extends to the periphery of the active region, the entry of oxygen into the active region is further suppressed, and bird's beak hardly occurs.

Further, when a sacrificial oxide film 29 is formed in the active region and subsequently removed with hydrofluoric acid, the edge of the field oxide film 27 becomes round and gentle, so that the gate is formed from the field oxide film 27 to the active region. Even if the electrodes are formed, disconnection due to the step of the field oxide film 27 is prevented from occurring. (Second Embodiment) In the first embodiment, FIG.
As shown in (2), the second silicon nitride film 26 is left in the active region (opening 22a) and its periphery, but may be left only in the active region. The details will be described below.

First, in the state shown in FIG. 3C, the first silicon nitride film 23 is removed.

Next, as shown in FIG. 7A, the second silicon nitride film 3 is formed along the upper surface of the first silicon oxide film 22, the upper surface of the buffer oxide film 25, and the inner surface of the second opening 22a.
1 is formed to a thickness of 300 ° by the CVD method.

Subsequently, as shown in FIG. 7B, the second silicon nitride film 31 is patterned by photolithography, and is left only on the buffer oxide film 25.

Thereafter, by thermal oxidation at 1050 ° C.,
The LOCOS 32 is formed by oxidizing the surface of the silicon substrate 21 through the first silicon oxide film 22. in this case,
The LOCOS 32 is integrated with the first silicon oxide film 22, and these are used as a field oxide film 33.

Thereafter, as shown in FIG. 7C, the second silicon nitride film 31 and the buffer oxide film 25 are removed.

Next, as shown in FIGS. 7D and 8A, a sacrificial oxide film 34 is formed on the surface of the silicon substrate 21 in the active region. Thereafter, when the sacrificial oxide film 34 is removed with hydrofluoric acid, the edge of the field oxide film 33 is also etched at the same time, so that the edge becomes gentle.

Subsequently, as shown in FIG. 8B, the silicon substrate 21 in the active region is thermally oxidized to form a gate oxide film 35. FIG. 9 shows a cross section taken along the line II-II in FIG.
become that way.

In the case where the second silicon nitride film 31 is left only in the active region as in the second embodiment, the first
The amount of bird's beak 33a of field oxide film 33 eroding the active region is larger than that of the embodiment. However, even in this case, since the first silicon oxide film 22 is formed in advance in the region where the LOCOS 32 is formed,
The time of thermal oxidation for forming COS32 is short,
The area of the bird's beak is smaller than in the prior art.

Also in this embodiment, since the silicon nitride film is not in direct contact with the silicon substrate 21 at the time of thermal oxidation, generation of a white ribbon in the gate oxide film 35 is prevented beforehand.

The opening 2 in the second silicon oxide film 22
2a is formed slightly wider than the active region,
The first silicon nitride film 23 may be selectively left in the opening 22a in a narrower active region. (Third Embodiment) FIGS. 10 to 14 are cross-sectional views showing manufacturing steps of a semiconductor device according to a third embodiment of the present invention. This embodiment differs from the first and second embodiments in that it includes a step of forming a field oxide film having an STI structure.

First, as shown in FIG. 10A, the main surface of the silicon substrate 36 is thermally oxidized at a temperature of 1050.degree.
It is formed to a thickness of 0 °. The first silicon oxide film 2
The formation of 2 is not limited to the thermal oxidation method, but may be formed by a CVD method.

Subsequently, a first resist 39 is applied on the first silicon oxide film 37, and is exposed and developed to form a resist pattern exposing a region other than the active region. Then, as shown in FIG. 10B, the first silicon oxide film 38 that is not covered with the resist pattern is etched, thereby forming the silicon substrate 3 in a region other than the active region.
6 is exposed.

Note that a silicon nitride film may be used instead of the first silicon oxide film 37. In this case, it is preferable to form a silicon oxide film under the silicon nitride film in order to prevent the silicon substrate 36 from being damaged. When a silicon nitride film is formed on the first silicon oxide film 37, the silicon nitride film may be patterned by photolithography and used as a patterning mask instead of a resist.

Next, as shown in FIG. 10C, a groove 40 is formed by etching the silicon substrate 36 in a region not covered with the patterned first silicon oxide film 37 to a depth of 3000 °. The groove 40 is formed in the element isolation region.

Subsequently, as shown in FIG. 10D, the first silicon oxide film 37 is removed with hydrofluoric acid. As a result, the active region of the silicon substrate 21 appears as a protrusion 36a.

Next, as shown in FIG. 11A, a 3000 nm thick second silicon oxide film 41 is formed on the silicon substrate 21 by a wet oxidation method. In this case, since the convex portion 36a of the silicon substrate 36 is also thermally oxidized, the corner of the convex portion 36a is rounded.

Subsequently, as shown in FIG.
After forming a silicon-based coating film 42 having a thickness of 3000 mm as described above, the silicon-based coating film 42 and the second silicon oxide film 41 are formed by chemical mechanical polishing (CMP) as shown in FIG. Polish and flatten. In this case, the second silicon oxide film 41 is planarized under the condition that the second silicon oxide film 41 slightly remains in the active region. Note that etching may be used instead of the CMP method.

Next, as shown in FIG. 12A, a second resist 43 is applied on the second silicon oxide film 41 and the silicon-based coating film 42, and this is exposed and developed to form an active region. A window 43a is formed on the substrate. Then, the window 43 of the resist 43
a, the second silicon oxide film 41 is etched to expose the projection 36a of the silicon substrate 36. In this case, as a method for etching the second silicon oxide film 41, dry etching using CF ₄ gas or wet etching using hydrofluoric acid may be used. As a result, the second silicon oxide film 41 and the silicon-based coating film 42 remaining selectively in the groove 40 are used as the field insulating film 44.

Thereafter, when the second resist 43 is removed, a state as shown in FIG.

Next, as shown in FIG. 12C, the surface of the convex portion 36a of the active region of the silicon substrate 36 is thermally oxidized to form a sacrificial oxide film 45 to a thickness of 200 °. Then,
As shown in FIG. 13A, the sacrificial oxide film 45 is removed by, for example, hydrofluoric acid. At this time, the second silicon oxide film 41 and the silicon-based coating film 43 are also etched at the same time, thereby rounding the corners of the second silicon oxide film 41 left after being vertically etched around the active region.

Thereafter, as shown in FIG. 13B, the surface of the silicon substrate 36 remaining as the convex portion 36a in the active region is thermally oxidized to form the gate oxide film 46 of the MOS transistor to a thickness of 50 °. . Since the edge of the convex portion 36 of the gate oxide film 46 is rounded, the gate oxide film 46 formed on the surface of the convex portion 36 has a uniform thickness even if the edge of the convex portion is exposed. .

FIG. 14 is a sectional view taken along the line III-III of FIG.

Thereafter, as shown in FIG. 14, the process proceeds to the step of forming the gate electrode 47 of the MOS transistor and forming an impurity diffusion layer (not shown) on the silicon substrate 36 in the active region.

As described above, the groove 40 is formed in the silicon substrate 36.
Is formed, the surface of the silicon substrate 36 is thermally oxidized at a high temperature by thermal oxidation, so that the corners of the convex portion 36a of the active region are rounded, and the gate oxide film 46 formed on the surface of the convex portion 36a is formed. Has a uniform thickness.

Therefore, the gate electrode 4 formed on the field insulating film 44 from the active region of the silicon substrate 36a
7, a voltage is applied to the projections 36a of the silicon substrate 36.
The electric field hardly concentrates on the upper edge of the upper surface, and the phenomenon of hump hardly occurs. As a result, good source / drain current characteristics can be obtained. (Fourth Embodiment) In a third embodiment, after forming a groove 40 and forming a second silicon oxide film 41, a silicon-based coating film 42 is formed on the second silicon oxide film 41. Although formed, a resist may be used instead of the silicon-based coating film 42. An embodiment in which the resist is used will be described below.

First, as shown in FIG. 11A, a groove 40 is formed in a silicon substrate 36, and thereafter, a silicon substrate 3 is formed.
6 is thermally oxidized to form a second silicon oxide film 41.
In this case, the corners of the protrusions 36a formed in the active region of the silicon substrate 36 are rounded as in the third embodiment.

Next, as shown in FIG. 15A, a third resist 50 is applied on the second silicon oxide film 41. Thereafter, the third resist 50 is baked and hardened, and then the third resist 50 and the second silicon oxide film 41 are polished by dry etching or CMP to be flattened. In this case, the etching rate or the polishing rate of the silicon oxide film 41 and the third resist 50 is made substantially equal, that is, the etching or polishing selection ratio is 1
It is necessary to adjust the composition of the resist and the baking temperature of the resist so that The second silicon oxide film 4
In the case of flattening 1, the condition is such that the second silicon oxide film 41 slightly extends in the active region.

Thereafter, similarly to the third embodiment, FIG.
As shown in (b), a second resist 43 is applied, and is exposed and developed to form a window 43a in the active region. Thereafter, the second silicon oxide film 41 is etched through the window 43a to form the projection 3 of the silicon substrate 36 in the active region.
6a is exposed. Here, the second silicon oxide film 41 remaining in a region other than the active region is used as a field insulating film.

Next, as shown in FIG. 15C, the second resist 43 and the third resist 50 are removed by oxygen plasma or a solvent.

Thereafter, as shown in FIG. 15D, a sacrificial oxide film 45 is formed on the exposed surface of the convex portion 36a of the active region of the silicon substrate 36. Subsequently, the sacrificial oxide film 45 is removed with hydrofluoric acid. I do. At this time, as shown in FIG.
The edge of the second silicon oxide film 41 around the active region is rounded.

Further, as shown in FIG. 16B, a gate oxide film 46 is formed on the surface of the active region of the silicon substrate 36 by 50.
Å thickness. FIG. 17 shows a cross section taken along the line IV-IV in FIG.

Thereafter, a gate electrode 47 extending on the second silicon oxide film 41 passing over the gate oxide film 46 is formed, and an impurity diffusion layer is formed in the active region.

As described above, the second silicon oxide film 41
Alternatively, a third resist 50 may be used, and the third resist 50 is removed together with the second resist 43. In this case, the second silicon oxide film 41 around the active region may be in a raised state, but in that portion, the corners are rounded as shown in FIG. Never come.

In this embodiment, as in the third embodiment, the convex portions 36 of the silicon substrate 36 in the active region are provided.
Since a is rounded, the gate oxide film 46 is formed to have a uniform thickness, so that the occurrence of hump is prevented. (Fifth Embodiment) In the third and fourth embodiments, when the second silicon oxide film 41 is flattened, the second silicon oxide film 41 is slightly left in the active region. After that, the second silicon oxide film 41 existing in the active region is etched through the window 43a of the second resist 43 to expose the underlying silicon substrate 36.

In this embodiment, a description will be given of exposing the silicon substrate 36 from the active region without using the second resist 43.

First, as shown in FIGS. 11 (c) and 15 (a), the second silicon oxide film 41 was polished or etched to leave a small amount of the second silicon oxide film 41 in the active region. Stop polishing or etching in the state. Note that FIG.
As shown in (a), when the third resist 50 is used, the third resist 50 is removed after polishing and etching.

Next, as shown in FIG. 18A, the second silicon oxide film 41 is etched with hydrofluoric acid, and the etching is stopped when the projection 36a of the silicon substrate 36 in the active region is exposed.

Subsequently, as shown in FIG. 18B, the surface of the silicon substrate 36 is thermally oxidized to form a sacrificial oxide film
Å thickness. In this case, since the surface of the silicon substrate ₃₆₁ is also oxidized through the second silicon oxide film 41, the thickness of the second silicon oxide film 41 slightly increases.

Subsequently, as shown in FIG. 18C, the sacrificial oxide film 51 is removed with hydrofluoric acid to clean the surface of the projection 36a of the silicon substrate 36. The hydrofluoric acid slightly etches the upper surface of the second silicon oxide film 41 to make it thinner.

Thereafter, as shown in FIG. 19, the exposed surface of the projection 36a of the silicon substrate 36 is thermally oxidized to a thickness of 50
Of the gate oxide film 52 is formed. FIG. 20 shows a cross section taken along line VV in FIG.

According to the above-described steps, the second silicon oxide film 41 is etched in the element isolation region, so that slight irregularities are generated. However, when the second silicon oxide film 41 is removed from the active region, the use of a resist is omitted, which is advantageous in that the process is shorter than in the third and fourth embodiments. (Sixth Embodiment) In the third and fourth embodiments, the second silicon oxide film 41 as a field oxide film is used.
When the surface is polished and flattened, the following steps may be performed to increase the flatness.

First, as shown in FIG. 11A, a groove 40 and a convex portion 36a are formed in a silicon substrate 36, and a second
Of silicon oxide film 41 is formed.

Next, as shown in FIG. 21A, a silicon nitride film 53 is formed on the second silicon oxide film 41 to a thickness of 50 ° by the CVD method.

Subsequently, the silicon nitride film 53 is patterned by photolithography to form a silicon substrate _361.
The opening 53a exposing the second silicon oxide film 41 from the active region and its periphery is formed. At the time of this patterning, the opening 53a of the silicon nitride film 53 may be formed in a range where the protruding portion of the second silicon oxide film 41 present in the active region and its periphery is completely exposed.
As shown by the broken line in (a), it may be narrowed so as to cover the side surface of the protruding portion.

Next, the exposed second silicon oxide film 41
Is polished by the CMP method, as shown in FIG. 21B, the silicon nitride film 53 becomes a polishing stopper.
The second silicon oxide film 41 is planarized with respect to the upper surface of the silicon nitride film 53.

Subsequently, as shown in FIG. 21C, the active region and the surrounding second silicon oxide film 41 are etched through the opening 53a of the silicon nitride film 53 by a dry etching method or a wet etching method. In this case, since the thickness of the second silicon oxide film 41 is the same as the depth of the groove 40 of the silicon substrate (the height of the convex portion 36a),
Although the second silicon oxide film 41 can be almost flattened, a slight step may be generated. In particular, FIG.
As shown by the dashed line in FIG. 1A, when the opening 53a of the silicon nitride film 53 is narrowed, the etching region of the second silicon oxide film 41 is narrowed. Steps caused by etching of oxide film 41 can be suppressed.

Thereafter, as shown in FIG. 21D, the silicon nitride film 53 is removed.

Next, as shown in FIG. 22A, the exposed surface of the convex portion 36a of the silicon substrate 36 is oxidized to
4 is formed to a thickness of 200 °. In this case, since the surface of the silicon substrate 36 is also oxidized, the thickness of the second silicon oxide film 41 increases.

Subsequently, as shown in FIG. 22B, the sacrificial oxide film 54 is removed with hydrofluoric acid, and the surface of the projection 36a of the silicon substrate 36 is cleaned. At this time, the second silicon oxide film 41 also becomes slightly thin.

Thereafter, as shown in FIG. 22C, the surface of the convex portion 36a of the active region of the silicon substrate 36 is thermally oxidized to form a gate oxide film 55 with a thickness of 50 °. FIG.
FIG. 23 shows a cross section taken along the line VI-VI of (c).

Further, a gate electrode 56 is formed, and an impurity diffusion layer (not shown) serving as a source and a drain is formed.

As described above, by using the silicon nitride film 53, the entire flatness of the second silicon oxide film (field oxide film) 14 formed on the silicon substrate 36 is increased. (Seventh Embodiment) In order to shorten the steps shown in the third embodiment, the following steps may be employed.

First, as shown in FIG. 11A, a groove 40 and a convex portion 36a are formed in a silicon substrate 36, and a second
Of silicon oxide film 41 is formed.

Next, as shown in FIG. 24A, a silicon nitride film 53 is formed on the second silicon oxide film 41 to a thickness of 1000 ° by the CVD method. Subsequently, a resist 60 is applied on the silicon nitride film 57, and this is exposed,
By developing, a window 60a is formed in the active region of the silicon substrate 36, that is, above the convex portion 36a. The window 60
a may be present slightly inside the active region.

Next, the silicon nitride film 5 is passed through the window 60a.
7 and the second silicon oxide film 41 are etched to form an opening 41b exposing the upper surface of the convex portion 36a of the silicon substrate 36 thereunder. Subsequently, when the resist 60 is removed, a state as shown in FIG. 24B is obtained.

Thereafter, the active region of the silicon substrate 36 is thermally oxidized through the opening 41b to form a sacrificial oxide film 58
Å thickness. In this case, since second silicon oxide film 41 is covered with silicon nitride film 57, its thickness does not increase.

Next, as shown in FIG. 24D, the artificial oxide film 58 is removed with hydrofluoric acid, and the upper part of the opening 41b of the second silicon oxide film 41 is etched to be rounded. The second silicon oxide film 41 left on the silicon substrate 36 is used as a field oxide film.

Thereafter, as in the third and fourth embodiments, the process moves to the step of forming a gate oxide film in the active region of the silicon substrate 36.

According to the steps described above, in order to planarize the second silicon oxide film 41, a step of forming the silicon-based coating film 42 and the resist 50 as in the third and fourth embodiments. And the step of polishing (or etching) them can be omitted, so that the step of forming the field oxide film can be shortened. (Eighth Embodiment) In this embodiment, a step of covering an active region of the silicon substrate 36 with a silicon nitride film when the silicon substrate 36 is filled with a silicon oxide film in the trench 40 will be described.

First, as shown in FIG. 25A, a first silicon oxide film (insulating film) 62 is formed to a thickness of about 30 ° by thermally oxidizing the main surface of a silicon substrate 61.
Subsequently, a silicon nitride film 63 is formed on the first silicon oxide film 62 to a thickness of 1100 ° by a CVD method.

Next, a resist 64 is applied on the silicon nitride film 63, and is exposed and developed to form a pattern for selectively covering the active region. Then, the silicon nitride film 63 and the first silicon oxide film 62 in the element isolation region exposed from the resist 64 are etched, and the silicon substrate 161 is removed.
Is formed to cover the active region.

Thereafter, when the resist 64 is removed, a sectional state as shown in FIG. 25B is obtained.

Next, the silicon substrate 61 is etched by RIE using the silicon nitride film 63 as a mask.
As shown in FIG. 5C, a groove 65 having a depth of 1200 ° is formed in the element isolation region. In this case, relatively convex portions 61a are formed in the active region of the silicon substrate 61.

Thereafter, as shown in FIG. 26A, the silicon substrate 61 is thermally oxidized at 1050.degree. C. through the groove 65 exposed from the silicon nitride film 63, so that the second silicon oxide film 66 has a thickness of 1200.degree. Form. Thereby, the groove 6
The inside of 5 is filled with a second silicon oxide film 66, and the corners of the projections 61a of the silicon substrate 16 are rounded by oxidation.

At the time of this thermal oxidation, the upper surface of the projection 61a of the silicon substrate 61 is substantially prevented from being oxidized by the silicon nitride film 63, so that the first silicon oxide film 62 on the projection 61a The film thickness does not increase.

The second silicon oxide film 6 in the trench 65
6 is applied as a field oxide film.

Then, when the silicon nitride film 63 is removed, a cross-sectional shape as shown in FIG. 26B is obtained.

Next, as shown in FIG. 26C, the first silicon oxide film 62 on the protrusion 61a of the silicon substrate 61 is removed and at the same time, the second silicon oxide film 66 in the groove 65 is removed.
Is also slightly thinned.

Subsequently, as shown in FIG. 27A, the exposed surface of the projection 61a of the silicon substrate 61 is thermally oxidized to form a sacrificial oxide film 67 having a thickness of 200 °.

Next, as shown in FIG. 27B, the sacrificial oxide film 67 is removed, and the surface of the projection 61a of the silicon substrate 61 in the active region is cleaned.

Thereafter, as shown in FIG. 27C, the exposed surface of the projection 61a of the silicon substrate 61 is thermally oxidized to a thickness of 7 mm.
A 0 ° gate oxide film 68 is formed.

As described above, the groove 65 is formed in the silicon substrate 61.
Is formed, the convex portions 6 of the active region of the silicon substrate 61 are formed.
While covering 1a with the silicon nitride film 63, the silicon substrate 61 is thermally oxidized through the groove 65 to form a second silicon oxide film 66 in the groove 65.

Therefore, since the second silicon oxide film 66 does not substantially grow in the active region of the silicon substrate 61, the step of removing the second silicon oxide film 66 from that region becomes unnecessary. For this reason, the number of steps is reduced as compared with the third embodiment.

Since the corners of the convex portion 61a of the active region of the silicon substrate 61 are rounded by oxidation, the thickness of the gate oxide film 68 formed thereon becomes uniform, and the MOS formed in the active region becomes uniform. The source / drain characteristics of the transistor are improved.

[0127]

As described above, according to the first aspect of the present invention, a first oxide film is formed on the surface of a semiconductor substrate in advance, and then the active region is covered with a silicon nitride film to oxidize the semiconductor substrate. To form a field oxide film,
Since the first oxide film is formed in advance in the region where the field oxide film is to be formed, the field oxidation time is shortened accordingly, and the amount of bird's beak eroded into the active region can be reduced.

When the pattern of the silicon nitride film for preventing oxidation is made wider than the active region, the supply amount of oxygen to the active region of the semiconductor substrate is reduced to reduce the amount of bird's beak entering the active region. Can be reduced.

According to the second aspect of the present invention, after a trench (trench) is formed by etching a semiconductor substrate other than the active region in advance, the entire surface of the substrate is oxidized to form a corner of the active region surrounded by the trench. The oxide film is thick enough and its corners are eliminated, so that when oxidizing the gate, the corners of the active region are rounded and the gate oxide film is not particularly thin at the corners, forming a uniform gate oxide film. it can. Thereby, the source / drain characteristics of the MOS transistor formed in the active region are improved.

When the active region is oxidized from all directions by oxidizing the entire surface, a flat surface can be obtained and a field oxide film most suitable for miniaturization can be formed.

Further, when the width of the groove formed in the semiconductor substrate is reduced and a field oxide film is formed in the groove by oxidizing the semiconductor substrate, the groove is not required to be buried by the CVD method. The process is shortened. Further, the area of the active region can be effectively used by making the groove narrow.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views showing a process for manufacturing a first conventional semiconductor device.

FIGS. 2A to 2D are cross-sectional views illustrating a process of manufacturing a second conventional semiconductor device.

3 (a) to 3 (d) are cross-sectional views (part 1) illustrating manufacturing steps of the semiconductor device according to the first embodiment of the present invention.

FIGS. 4A to 4D are cross-sectional views (part 2) illustrating manufacturing steps of the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a sectional view (part 3) showing a step of manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 6 is a sectional view (part 4) showing a step of manufacturing the semiconductor device according to the first embodiment of the present invention;

FIGS. 7A to 7D are cross-sectional views (No. 1) showing the steps of manufacturing the semiconductor device according to the second embodiment of the present invention.

FIGS. 8A and 8B are cross-sectional views (part 2) illustrating a manufacturing process of the semiconductor device according to the second embodiment of the present invention.

FIG. 9 is a sectional view (No. 3) showing a step of manufacturing the semiconductor device according to the second embodiment of the present invention;

FIGS. 10A to 10D are cross-sectional views (part 1) illustrating manufacturing steps of a semiconductor device according to a third embodiment of the present invention.

FIGS. 11A to 11C are cross-sectional views (part 2) illustrating a process for manufacturing the semiconductor device of the third embodiment of the present invention.

FIGS. 12A to 12C are cross-sectional views (Part 3) illustrating manufacturing steps of the semiconductor device according to the third embodiment of the present invention;

FIGS. 13 (a) and 13 (b) are cross-sectional views (part 4) illustrating manufacturing steps of the semiconductor device according to the third embodiment of the present invention.

FIG. 14 is a sectional view taken along line III-III of FIG. 13 (b).

FIGS. 15A to 15D are cross-sectional views (No. 1) showing the manufacturing process of the semiconductor device according to the fourth embodiment of the present invention.

FIGS. 16A and 16B are cross-sectional views (No. 2) showing the steps of manufacturing the semiconductor device according to the fourth embodiment of the present invention.

FIG. 17 is a sectional view taken along the line IV-IV in FIG. 16 (b).

FIGS. 18A to 18C are cross-sectional views (No. 1) illustrating the steps of manufacturing the semiconductor device according to the fifth embodiment of the present invention.

FIG. 19 is a sectional view (3) showing a step of manufacturing a semiconductor device according to a fifth embodiment of the present invention;

FIG. 20 is a sectional view taken along line VV of FIG. 19;

FIGS. 21A to 21D are cross-sectional views (No. 1) illustrating the steps of manufacturing the semiconductor device according to the sixth embodiment of the present invention.

FIGS. 22A to 22C are cross-sectional views (No. 2) showing the manufacturing process of the semiconductor device according to the sixth embodiment of the present invention.

FIG. 23 is a sectional view taken along the line VI-VI of FIG. 22 (c).

FIGS. 24A to 24D are cross-sectional views illustrating manufacturing steps of a semiconductor device according to a seventh embodiment of the present invention.

FIGS. 25 (a) to 25 (c) are cross-sectional views (part 1) illustrating manufacturing steps of a semiconductor device according to an eighth embodiment of the present invention.

FIGS. 26A to 26C are cross-sectional views (No. 2) showing the manufacturing process of the semiconductor device according to the eighth embodiment of the present invention.

FIGS. 27A to 27C are cross-sectional views (No. 3) illustrating the manufacturing process of the semiconductor device according to the eighth embodiment of the present invention.

[Explanation of symbols]

21 silicon substrate (semiconductor substrate), 22 silicon oxide film, 23 silicon nitride film, 24 resist, 25
Buffer oxide film, 26: silicon nitride film, 27: LOC
OS, 28: Field oxide film, 29: Sacrificial oxide film, 3
0: gate oxide film, 31: silicon nitride film, 32: LO
COS, 33: field oxide film, 34: sacrificial oxide film,
35 gate oxide film, 36 silicon substrate (semiconductor substrate), 37 silicon oxide film, 39 resist, 40
Grooves, 41: silicon oxide film, 42: silicon-based coating film,
43 resist, 44 field oxide film, 45 sacrificial oxide film, 46 gate oxide film, 47 gate electrode, 50
... resist, 51 ... sacrificial oxide film, 52 ... gate oxide film,
53: silicon nitride film, 54: sacrificial oxide film, 55: gate oxide film, 56: gate electrode, 57: silicon nitride film,
58 sacrificial oxide film, 60 resist, 61 silicon substrate (semiconductor substrate), 62 silicon oxide film, 63 silicon nitride film, 64 resist, 65 groove, 66 silicon oxide film, 67 sacrificial oxide film , 68 ... gate oxide film.

Continued on the front page (72) Inventor Yoshimi Shioya 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Prefecture Inside Fujitsu VSI Co., Ltd. (72) Inventor Tetsuo Fukuda 4-1-1 Kamikodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Inside (72) Inventor Kenichi Hitsugaya 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term within Fujitsu Limited (reference) 5F032 AA13 AA34 AA36 AA44 AA49 AA70 CA17 DA02 DA09 DA23 DA24 DA25 DA33 DA34 DA53 DA78 5F040 DA15 DA19 DB01 DC01 EK01 EK05 FC02 FC10 FC21 FC27

Claims (14)

[Claims] A step of forming a first oxide film on a semiconductor substrate; a step of removing the first oxide film on an active region of the semiconductor substrate to form an opening; Forming a buffer oxide film on the semiconductor substrate, forming a silicon nitride film on the buffer oxide film and on the first oxide film, and patterning the silicon nitride film at least A method for manufacturing a semiconductor device, comprising: a step of selectively leaving the semiconductor substrate on a buffer layer; and a step of oxidizing the semiconductor substrate in a region not covered with the silicon nitride film to form a field oxide film. 2. The method according to claim 1, wherein said silicon nitride film is selectively left inside and around said opening by patterning said silicon nitride film. 3. The method according to claim 1, wherein the patterning of the silicon nitride film selectively leaves the silicon nitride film smaller than the opening inside the opening. 4. The method according to claim 3, wherein said opening is formed wider than an active region. 5. The semiconductor device according to claim 1, wherein after the field oxide film is formed, the step formed at the edge of the field oxide film is moderated by etching the field oxide film. Production method. 6. A step of forming a groove by etching a region other than an active region in a semiconductor substrate, and a step of oxidizing the semiconductor substrate through at least the groove to thereby form an oxide film in the groove. A method for manufacturing a semiconductor device, comprising: 7. The method according to claim 6, wherein a portion of the oxide film protruding from the semiconductor substrate is thinned by etching or polishing. 8. When the oxide film is also formed on the semiconductor substrate in the active region, a step of applying a flattening film on the oxide film; and the flattening film and the oxide film. 7. The method according to claim 6, further comprising: planarizing the oxide film in the active region by continuously etching the oxide film. 9. The method according to claim 6, wherein the oxide film formed in the active region of the semiconductor substrate is removed by etching when the semiconductor substrate is oxidized. 10. The method according to claim 6, wherein an edge of said oxide film remaining around said active region is rounded by etching. 11. A step of forming a polishing stopper film on the oxide film after forming the oxide film, a step of forming an opening on at least the active region of the polishing stopper film, 7. The method of manufacturing a semiconductor device according to claim 6, further comprising the step of: polishing the oxide film protruding from the surface to planarize the oxide film. 12. The semiconductor device according to claim 11, further comprising a step of etching and removing said oxide film in said active region exposed from said opening using said polishing stopper film as a mask. Manufacturing method. 13. The method of manufacturing a semiconductor device according to claim 6, wherein said active region of said semiconductor substrate is covered with a silicon nitride film via a base oxide film when said oxide film is formed. . 14. The method according to claim 13, wherein the silicon nitride film is a film used as an etching mask when forming the trench in the semiconductor substrate.