JP2000165199A - Filter circuit and waveform generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a filter circuit that has a step response characteristic without an overshoot, is small in size at a low cost where a DC offset voltage is reduced and a multi-stage switching for a cut-off frequency is attained. SOLUTION: In the low pass or high pass filter circuit 6 that is configured by connecting a plurality of primary filter circuits 17 in series each including a variable resistance circuit and a capacitive element and whose cut-off frequency is variable by varying a resistance of the variable resistance circuit, a buffer circuit 15 is provided between among a plurality of the primary filter circuits 17, 17, and capacitive elements 13, 14 in a plurality of the primary filter circuits 17, 17 have nearly the same capacitance and variable resistance circuits 11, 12 in a plurality of the primary filter circuits 17, 17 are controlled to have the same resistance electrically respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter circuit having a step response characteristic with no overshoot and capable of varying a cutoff frequency, and a filter circuit provided with the filter circuit as a smoothing filter for various types of sine waves and rectangular waves. The present invention relates to a waveform generation device configured to generate a waveform.

[0002]

2. Description of the Related Art For example, when inspecting characteristics of a motor, an ABS sensor, and the like, a waveform generating apparatus for generating an arbitrary waveform for characteristic inspection is used. In this type of waveform generating apparatus, generally, first, waveform data is read from a waveform data memory in synchronization with a waveform read clock signal,
An analog signal is generated by digital-to-analog conversion of the read waveform data by a D / A conversion circuit. Next, by inputting the analog signal to a smoothing filter of a variable cutoff frequency type, a clock signal component for waveform reading contained in the analog signal is removed to generate an analog signal having a good S / N ratio. .
In this case, if the Q of the smoothing filter is high, so-called overshoot occurs. Therefore, as the smoothing filter, a low-pass filter having a Q value of 0.5 or less, or a Bessel-type low-pass filter having a step response characteristic without overshoot, in other words, a flat phase characteristic is used.

As such a smoothing filter,
In the conventional waveform generator, a smoothing filter 21 shown in FIG. 3 and a smoothing filter 31 shown in FIG. 4 are used. The smoothing filter 21 includes a plurality of low-pass filters 22a, 22b,... 22n (hereinafter, also simply referred to as “low-pass filter 22”), and an electronic switch 23 such as a multiplexer for switching the plurality of low-pass filters 22. It is configured. In this case, each low-pass filter 22 is formed of a series connection of a plurality of RC-type primary low-pass filters or an LC-type secondary low-pass filter, and is defined to have different cutoff frequencies. It is desirable that the value of Q in each low-pass filter 22 is 0.5 or less. In the smoothing filter 21, the electronic switch 23 is switched and controlled by a control unit (not shown), so that the low-pass filter 22 having a cutoff frequency corresponding to the frequency of the analog signal SIN generated by the D / A conversion circuit is selected. As a result, the read clock signal component and unnecessary spurious components contained in the analog signal SIN are removed, and an analog output signal SO having a good S / N ratio is generated.

On the other hand, the smoothing filter 31 is composed of a state-variable low-pass filter formed by connecting at least an inverting amplifier and two integrators by DC coupling. In the smoothing filter 31, the value of Q is predefined to a predetermined value of, for example, 0.5 or less, and the internal constant is variably controlled in accordance with the input digital control signal, so that the value of Q is not changed. Vary the cutoff frequency. The smoothing filter 31 also removes the read clock signal component and unnecessary spurious components contained in the analog signal SIN, and generates an analog output signal S0 having a good S / N ratio.

[0005]

However, the conventional smoothing filters 21 and 31 have the following problems. That is, since the smoothing filter 21 can be constituted only by passive elements such as a resistor (or an inductor) and a capacitor without using an active element, it is possible to easily increase the frequency. However, on the other hand, in order to switch the cutoff frequency in multiple stages, many low-pass filters 22a to 22n are indispensable. For this reason, there is a problem that the cost of the device is increased and the circuit is enlarged.

On the other hand, the smoothing filter 31 allows the cutoff frequency to be easily switched in multiple stages, but requires at least an inverting amplifier and two integrators, which leads to an increase in circuit cost. There is a problem. Further, in the smoothing filter 31, since the three operational amplifiers as inverting amplifiers and integrators are DC-coupled in series, the offset voltages of the operational amplifiers are added and superimposed on the analog output signal So. In this case, in the waveform generation device, the offset voltage causes a decrease in DC accuracy of a generated waveform. For this reason, the smoothing filter 31 has a problem that it is difficult to increase the DC accuracy of the generated waveform.

Further, in the smoothing filter 31,
The performance as a low-pass filter depends on the performance of the integrator. In this case, the integrator constituted by the operational amplifier circuit is generally theoretically operated only up to about 1/100 of the unity gain frequency because of the influence of the phase delay of the operational amplifier. For this reason, in a frequency range where the integrator does not theoretically operate, the integrator does not function as a low-pass filter, and thus the smoothing filter 31 has a problem that it is extremely difficult to increase the frequency. On the other hand, it is possible to increase the frequency by using an operational amplifier having a high unity gain frequency. However, in such a case, the cost of the circuit is increased because the operational amplifier is expensive.
Further, since the smoothing filter 31 has a feedback circuit formed by an integrator, there is a problem that the system as the whole low-pass filter is unstable.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has a step response characteristic without overshoot, is small in size and low in cost, and is capable of reducing a DC offset voltage and switching a cutoff frequency in multiple steps. It is a primary object of the present invention to provide a filter circuit that can be used, and a small-sized, low-cost, and highly accurate DC generator.

[0009]

According to a first aspect of the present invention, there is provided a filter circuit including a plurality of primary filter circuits including a variable resistor circuit and a capacitive element connected in series. A low-pass or high-pass filter circuit capable of varying a cutoff frequency by varying a resistance value of a variable resistor circuit, further comprising a buffer circuit disposed between the plurality of primary filter circuits, Each of the capacitive elements in the circuit is defined to have substantially the same capacitance value, and each of the variable resistance circuits in the plurality of primary filter circuits is electrically controlled so as to have substantially the same resistance value to each other. I do.

According to a second aspect of the present invention, there is provided a filter circuit.
In the above-described filter circuit, the variable resistor circuit is constituted by a digital-analog conversion circuit.

According to a third aspect of the present invention, there is provided a waveform generating apparatus according to the first aspect.
Alternatively, the low-pass type filter circuit described in 2 is provided as a smoothing filter, and an analog signal generated by performing digital-analog conversion of the waveform data read from the waveform data memory is output through the filter circuit.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a filter circuit and a waveform generator according to the present invention will be described below with reference to the accompanying drawings.

The waveform generator 1 is configured to generate an analog output signal SO of a standard waveform such as a sine wave or a rectangular wave or an arbitrary waveform in accordance with a waveform generation command input from an operation unit (not shown). I have. Specifically, the waveform generation device 1
1 includes a CPU 2, an address data generation circuit 3, a waveform data memory 4, a D / A conversion circuit 5, and a smoothing filter 6 corresponding to a filter circuit in the present invention, as shown in FIG.

The CPU 2 functions as a control unit, and controls operations of the address data generation circuit 3 and the smoothing filter 6 according to a waveform generation command. The address data generation circuit 3 includes a reference clock generation circuit and an address generator for generating waveform data DW in synchronization with the reference clock signal generated by the reference clock generation circuit. Generate address data DA for reading. The address data generation circuit 3 determines an initial address value at the start of reading of the waveform data DW based on a control signal SC output from the CPU 2 and increments the initial address value in synchronization with the reference clock signal. The address data DA is sequentially generated.

The waveform data memory 4 stores waveform data DW for a standard waveform and an arbitrary waveform at a predetermined address, and stores the address data at the address when the address data DA is input. The waveform data DW is sequentially output. The D / A conversion circuit 5 includes a waveform data memory 4
The analog signal SIN is generated by digital-to-analog conversion of the waveform data DW output from, and is output to the smoothing filter 6.

The smoothing filter 6 is a secondary low-pass filter of a variable cutoff frequency, and removes a reference clock signal component and a noise component contained in the input analog signal SIN. Specifically, the smoothing filter 6 includes the D / A conversion circuits 11 and 12, the capacitor 1
3 and 14 and buffer circuits 15 and 16. The D / A conversion circuits 11 and 12 use a so-called R-
It is composed of a 2R ladder resistance type digital-analog converter, and equivalently configures variable resistance circuits by varying the voltage dividing ratio by the ladder resistance according to the control data DC output from the CPU 2. In this case, D
The / A conversion circuits 11 and 12 are controlled to have the same resistance value by the control data DC. In addition, capacitor 1
Reference numerals 3 and 14 have the same and fixed predetermined capacitance values, respectively. Therefore, the first-order low-pass filter 1 of the RC type is formed by the D / A conversion circuit 11 and the capacitor 13.
7 is formed, and the D / A conversion circuit 12 and the capacitor 14 form an RC primary low-pass filter 17.
Is formed. In this case, both primary low-pass filters 1
The cutoff frequencies 7 and 17 are defined to be the same as each other, and together form a secondary low-pass filter. On the other hand, the buffer circuit 15 corresponds to the buffer circuit of the present invention, and is configured by a voltage follower having a high input impedance and a low output impedance by an operational amplifier, and the gain thereof is defined to a value of 1. The buffer circuit 16 is composed of an operational amplifier, has a high input impedance and a low output impedance, and has a gain specified to, for example, a value of 1. Note that the buffer circuit 16 may be configured by an amplifier circuit having a gain of 1 or more.

In this smoothing filter 6, both D /
The equivalent resistance values of the A conversion circuits 11 and 12 are respectively represented by values R
And the capacitance values of both capacitors 13 and 14 are respectively set to a value C
Then, each transfer function T of both first-order low-pass filters 17
(S) is represented by the following equations. T (S) = 1 / (sCR + 1) ···

In this case, both primary low-pass filters 17,
17 operate independently without being influenced by each other by the buffer circuit 15. Therefore, the overall transfer function T (S) of the first-order low-pass filters 17 is expressed by the following equation. T (S) = (1 / (sCR + 1)) ² ... Formula

Here, if jω is substituted for s in the equation, the transfer function T (S) of the equation is expressed by the following equation. T (jω) = 1 / (1− (ωCR) ² + j2ωCR) formula

The value of Q in the equation is the absolute value of the equation when ω = ω0 = 1 / CR, where ω0 is the angular velocity of the cutoff frequency of the secondary low-pass filter. It is expressed by an equation. Q = ((1− (ω0 · CR) ² ) ² + (2ωO · CR) ² ) ^−0.5 = 0.5

As is apparent from the equation, the value of Q as a whole of the smoothing filter 6 constituted by the two first-order low-pass filters 17 is 0.5. On the other hand, the smoothing filter of the waveform generating device 1 is indispensably required to have a Q value of 0.5 or less for preventing overshoot from occurring. Therefore, since the value of Q is 0.5, the smoothing filter 6 has such characteristics that the phase is flat and the passing loss is minimized while satisfying this requirement. FIG. 2 shows the step response of the smoothing filter 6,
It can be understood that the occurrence of overshoot is prevented.

Further, in this smoothing filter 6,
General-purpose D / A converters are used as the D / A conversion circuits 11 and 12, and the cutoff frequency is controlled in multiple stages by varying the voltage dividing ratio in accordance with control data DC output from the CPU 2. Therefore, the electronic switch 23
Unlike the conventional smoothing filter 21 using a plurality of filter circuits 22, the filter can be configured at low cost, and the cutoff frequency can be finely controlled according to the frequency of the generated waveform.

Further, in the smoothing filter 6, circuit elements for generating an offset voltage as an error voltage which causes a reduction in DC accuracy are limited to the buffer circuits 15 and 16. In this case, since the gains of the buffer circuits 15 and 16 are defined to a value of 1, the analog output signal S
The offset voltage superimposed on O 2 is limited to the input offset voltage of the buffer circuit 15. Therefore, unlike the conventional smoothing filter 31 having at least three operational amplifiers, it is possible to reduce the offset voltage superimposed on the analog output signal SO and deteriorating the DC accuracy. Signal SO
Can be generated. In the smoothing filter 6, the D / A conversion circuit 11, the buffer circuit 15,
Since it is composed of a non-feedback series connection circuit composed of the D / A conversion circuit 12 and the buffer circuit 16, it is possible to enhance the stability of the system and to use no integrator with a phase delay. It is possible to configure a second-order low-pass filter that can operate up to an extremely high frequency range while being low in cost.

Next, the overall operation of the waveform generator 1 will be described.

First, when a waveform generation instruction is issued from an operation unit (not shown) to C
When input to PU2, CPU 2 outputs control signal SC. As a result, the address data generating circuit 3 outputs a predetermined initial address data value as the address data DA, and then sequentially increments the initial address value, thereby sequentially outputting the address data DA to the waveform data memory 4. . As a result, the waveform data memory 4 sequentially outputs the waveform data DW stored at the address corresponding to the address data DA, whereby
An analog signal SIN defined by the waveform and frequency according to the waveform generation command is output to the smoothing filter 6.

The CPU 2 determines that the cutoff frequency is
The smoothing filter 6 has a frequency slightly higher than the frequency of the analog signal SIN corresponding to the waveform generation command.
Output the control data DC. As a result, the D / A conversion circuits 11 and 12 in the smoothing filter 6 change the voltage dividing ratio according to the control data DC, so that the cut-off frequency of the entire smoothing filter 6 is regulated to a predetermined frequency. Next, the smoothing filter 6 filters the input analog signal SIN to remove a reference clock signal component, noise, and unnecessary spurious components superimposed on the analog signal SIN, thereby obtaining an analog signal having a good S / N ratio. An output signal SO is generated.

As described above, according to the smoothing filter 6 in the waveform generator 1, the step response characteristic has no overshoot, the cutoff frequency can be switched in multiple stages, and the cutoff frequency can be changed to a high frequency range. An operable, high-precision DC-accurate small-sized low-pass filter can be constructed. Further, since high-precision and expensive circuit components are not used, the configuration can be made at low cost. Further, according to the waveform generation device 1,
The adoption of the inexpensive, small-sized, DC-accurate smoothing filter 6 can reduce the cost and size of the apparatus, and can generate an analog output signal SO with high DC-accuracy.

The present invention is not limited to the above embodiment. For example, in the embodiment of the present invention, the D / A conversion circuits 11 and 12 are used as the variable resistance circuits, but an analog photocoupler or a digital potentiometer can be used. However, since a general-purpose D / A converter can be used for the D / A conversion circuits 11 and 12, the configuration can be made extremely inexpensive as compared with the case where an analog photocoupler or the like is used. Of course. Furthermore, the filter circuit according to the present invention is not limited to the secondary low-pass filter described in the embodiment of the present invention, and can be configured as a secondary high-pass filter. Alternatively, a high-order high-pass filter can be configured.

Further, the waveform generating apparatus according to the present invention comprises:
The configuration is not limited to the configuration shown in the embodiment of the present invention, and can be appropriately changed. Further, the filter circuit according to the present invention is applicable not only to a waveform generating device but also to various measuring devices.

[0030]

As described above, according to the filter circuit of the first aspect, the capacitive elements having substantially the same capacitance value and the variable resistance circuits electrically controlled so as to have substantially the same resistance value. And a buffer circuit disposed between the primary filter circuits, thereby reducing the DC offset voltage while reducing the DC offset voltage in a small size and at low cost. The frequency can be switched in multiple stages.

According to the filter circuit of the second aspect, since the variable resistor circuit is constituted by the digital-analog conversion circuit, it can be constructed at a very low cost.

Further, according to the third aspect of the present invention, since the low-pass type filter circuit according to the first or second aspect is provided as a smoothing filter, the size and cost of the apparatus can be reduced. At the same time, it is possible to generate a waveform with high DC accuracy.

[Brief description of the drawings]

FIG. 1 is a block diagram of a waveform generation device 1 according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a step response of a smoothing filter 6;

FIG. 3 is a block diagram of a conventional smoothing filter 21.

FIG. 4 is a block diagram of a conventional smoothing filter 31.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Waveform generator 2 CPU 6 Smoothing filter 11, 12 D / A conversion circuit 13, 14 Capacitor 15, 16 Buffer circuit

Claims (3)

[Claims] 1. A primary filter circuit including a variable resistance circuit and a capacitive element is configured by connecting a plurality of primary filter circuits in series, and a cutoff frequency can be varied by varying a resistance value of the variable resistance circuit. A low-pass or high-pass filter circuit, further comprising a buffer circuit disposed between the plurality of primary filter circuits, wherein each of the capacitive elements in the plurality of primary filter circuits has substantially the same capacitance value as each other A filter circuit, wherein each of the variable resistance circuits in the plurality of primary filter circuits is electrically controlled so as to have substantially the same resistance value. 2. The filter circuit according to claim 1, wherein said variable resistance circuit is constituted by a digital-analog conversion circuit. 3. A low-pass type filter circuit according to claim 1, wherein said low-pass type filter circuit is provided as a smoothing filter, and an analog signal generated by digital-to-analog conversion of waveform data read from a waveform data memory is passed through said filter circuit. A waveform generator for outputting.