JP2000165002A - Electronic device board therefor, its manufacture and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve an acid resisting property against moisture or resist peeling agent and also to improve an acid resisting property against an etching agent and so on, by covering a copper wiring formed on a board by a copper compound layer selected from one of copper phosphide, copper bromide or copper nitride. SOLUTION: A display screen of a liquid crystal display device 30 is constituted by many pixels formed on a thin film transistor array board 31. This thin film transistor array board 31 comprises a gate electrode 40 on a board 36 of which surface is insulated, a semiconductor active film 42 which is less than the gate 40 laminated on a gate electrode 40, and contact films 43 and 44 laminated at the central side of the semiconductor active film 42 on the both terminals by separating each other by an interval. Here, a copper layer 40a of the gate electrode 40 is covered with a copper compound layer 40b selected from one of copper phosphide, copper bromide or copper nitride.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for an electronic device such as a thin film transistor (TFT) array substrate provided in an electronic device such as a liquid crystal display device, a method of manufacturing the same, and the electronic device. When used as a wiring material, an electronic device substrate and a method for manufacturing the same, which can improve oxidation resistance to moisture and a resist stripping solution, and can also improve acid resistance to an etchant, and the like, are provided with such an electronic device substrate. Related to electronic equipment.

[0002]

2. Description of the Related Art Generally, a thin film transistor (TFT) array substrate is known as a substrate provided in a liquid crystal display device. FIGS. 15 and 16 show an example of the structure of a general thin film transistor array substrate provided with portions such as a gate wiring G and a source wiring S on a substrate 86. In the thin film transistor array substrate shown in FIGS. 15 and 16, a gate wiring G and a source wiring S are arranged in a matrix on a transparent substrate 86 such as glass. A region surrounded by the gate line G and the source line S is a pixel portion 81, and each pixel portion 81 has a thin film transistor 8
3 are provided.

The thin film transistor 83 has a general structure of an etch stopper type, and a gate insulating film is formed on a gate wiring G and a gate electrode 88 made of a conductive material such as Al or an Al alloy and drawn out from the gate wiring G. Membrane 8
9, a semiconductor active film 90 made of amorphous silicon (a-Si) is provided on the gate insulating film 89 so as to face the gate electrode 88, and a conductive material such as Al or an Al alloy is provided on the semiconductor active film 90. A drain electrode 91 and a source electrode 92 are formed so as to face each other. Note that ohmic contact films 90a, 90a made of amorphous silicon or the like doped with a high concentration of an impurity serving as a donor such as phosphorus are formed on the upper sides on both sides of the semiconductor active film 90. The drain electrode 91 and the source electrode 90 are formed thereon. An etching stopper 93 is formed in a state sandwiched between the etching stopper 93 and the etching stopper 93. Also, the drain electrode 9
1, a transparent pixel electrode 95 made of a transparent electrode material is connected from the side of the drain electrode 91 to the side.

[0006] A passivation film 96 is provided on the gate insulating film 89, the transparent pixel electrode 95, the drain electrode 91, the source electrode 92, and so on. An alignment film (not shown) is formed on the passivation film 96, and a liquid crystal is provided above the alignment film to constitute an active matrix liquid crystal display device. When an electric field is applied to liquid crystal molecules by the transparent pixel electrode 95, The alignment of liquid crystal molecules can be controlled.

As a method of manufacturing the thin film transistor array substrate shown in FIGS. 15 and 16, a target made of aluminum or an aluminum alloy is used, and a glass is formed by a thin film forming means such as a normal sputtering method in which AC power is applied to the target. After the Al or Al alloy layer is formed on the substrate 86, the Al or Al alloy layer is removed at a position other than the gate forming position by photolithography to form the gate electrode 88, and the gate is formed by a thin film forming means such as a CVD method. An insulating film 89, a semiconductor active film 90, and an etching stopper 93 are formed, and an ohmic contact film 90a, a drain electrode 91, and a source electrode 9 are formed thereon by the above-described sputtering method and photolithography method.
2 is formed, and the ohmic contact film 90 is formed by using the formed drain electrode 91 and source electrode 92 as a mask.
is removed to divide the ohmic contact film 90a, and then the passivation film 96 is formed by a CVD method or the like.
Is formed, a thin film transistor array substrate is obtained.

In recent years, with the speeding up of liquid crystal display devices and the like, the problem of signal transmission delay due to the resistance of wiring such as gate electrodes, drain electrodes, and source electrodes has become apparent, and such problems have been solved. For this purpose, the use of copper having a lower resistance than Al or an Al alloy as a material for forming an electrode or a wiring has been studied. This copper wiring is made of Al or Al
After forming a Cu layer by a normal sputtering method as in the case of forming a wiring from an alloy, the Cu layer can be formed by removing the Cu layer at a position other than the wiring forming position by a photolithography method.

[0007]

However, in a liquid crystal display device provided with a thin film transistor array substrate having a structure as shown in FIGS. 15 and 16, if copper is used as an electrode or wiring material, copper is vulnerable to a chemical solution. However, when an oxidizing acid-based etching agent used in etching another layer in a subsequent process infiltrates the copper film, the copper film may be etched and damaged, and further damage may be caused. When the process proceeds, a disconnection failure may occur, and thus there is a problem that an etching agent to be used is limited.
Further, when copper is used as an electrode or wiring material, when a resist stripping solution used in a photolithography process permeates the copper film, the copper film may be corroded by the resist stripping solution. The etching mechanism of the copper film is such that the surface of the copper film is oxidized to perform etching.
If an oxide layer such as uO or CuO ₂ is formed, it is etched and damaged even by an etchant having no oxidizing power,
Further, there is a problem that a disconnection failure occurs. In addition,
Copper is less susceptible to oxidation than Al, Si or Cr, but is easily oxidized due to the presence of moisture and is susceptible to corrosion.
Therefore, a Cu alloy is considered as a Cu-based wiring material that can prevent the formation of an oxide layer such as CuO or CuO _{2 on the} surface. However, the Cu alloy has a higher wiring specific resistance than Cu, and has a low resistance. The effect of using this material cannot be expected much.

The present invention has been made in view of the above circumstances, and when low-resistance copper is used as an electrode or wiring material,
Provided is a substrate for an electronic device and a method of manufacturing the same, which can improve the oxidation resistance to moisture and a resist stripping solution, and can also improve the acid resistance to an etching agent and the like, and provide an electronic device provided with such a substrate for an electronic device. The purpose is to provide.

[0009]

In order to solve the above-mentioned problems, a substrate for an electronic device according to the present invention comprises forming a copper wiring on a substrate having at least an insulating surface, and forming the copper wiring with copper phosphide. It is characterized by being covered with any copper compound layer selected from copper boride, copper oxalate, and copper nitride. The thickness of the copper compound layer is preferably about 50 to 500 angstroms. If the thickness of the copper compound layer is less than 50 angstroms, it is too thin to improve the oxidation resistance to moisture and resist stripping solution and the acid resistance to an etching agent, etc., and even if the thickness exceeds 500 angstroms, it is intended. The effect cannot be improved so much, and the wiring resistivity decreases.

Further, the electronic device substrate according to the present invention comprises:
To solve the above problems, copper phosphide on the outer surface of the copper wiring,
A wiring structure covered with a copper compound layer selected from copper boride, copper oxalate, and copper nitride is provided on a substrate having at least a surface that is insulative. The thickness of the copper compound layer of the copper compound layer located between the substrate and the copper wiring is preferably about 50 to 500 angstroms. If the thickness of the copper compound layer is less than 50 angstroms, if the material forming the substrate is too thin,
The oxygen of iO ₂ enters the copper wiring and oxidizes the interface between the copper wiring and the substrate. Even if the thickness exceeds 500 angstroms, the desired effect cannot be improved so much, which is economically disadvantageous.

In the substrate for electronic equipment of the present invention, by adopting the above structure, a copper compound layer as a protective layer resistant to chemicals such as a resist stripping solution and an etching solution and moisture is provided on the surface of the copper wiring. Alternatively, it is formed on the outer peripheral surface (outer surface). According to the electronic device substrate having such a configuration, even if an oxidizing acid-based etching agent used when etching another layer in a later step comes into the copper wiring, the surface of the copper wiring or Since the copper compound layer is formed on the outer peripheral surface (outer surface), the copper wiring is hardly damaged by the etching agent, the occurrence of disconnection failure can be prevented, and the degree of freedom of the etching agent used is large.

Further, even if the resist stripping solution used in the photolithography step soaks into the copper wiring, since the copper compound layer is formed on the surface or outer surface of the copper wiring, the copper wiring is formed by the resist stripping solution. Corrosion can be prevented. Further, since the copper compound layer is formed on the surface of the copper wiring, an oxide layer is not formed on the surface of the copper wiring due to the presence of moisture before etching, and the copper compound layer is damaged by the non-oxidizing etching agent. And the occurrence of disconnection failure can be prevented. Therefore, according to the electronic device substrate of the present invention, it is possible to improve the oxidation resistance to moisture and a resist stripping solution without impairing the characteristics of using low-resistance copper as an electrode or wiring material, and to further reduce the acid resistance to etching agents and the like. Can be prevented, disconnection failure and corrosion can be prevented, and since the degree of freedom of an etching agent to be used is large, the process after copper wiring formation is not easily restricted. Further, in the electronic device substrate of the present invention, since the copper compound layer covering the copper wiring can be formed using the same film forming apparatus as that on which the copper wiring is formed, it is necessary to provide a special manufacturing apparatus. And the manufacturing process is not complicated. Further, since the copper compound layer does not require heat treatment at a high temperature of 800 ° C. or more in a processing gas atmosphere such as ammonia gas, when a substrate such as a glass substrate that cannot withstand heating at 600 ° C. or more is used. Can also be applied.

Further, in the electronic device substrate according to the present invention, there is provided a wiring structure in which the outer surface of a copper wiring is covered with the copper compound layer, the wiring structure being formed on a substrate having at least a surface having an insulating property. Since the copper compound layer is formed between the copper wiring and the substrate, even if the material forming the substrate is a glass substrate, SiO ₂ in the glass substrate
Can be prevented from entering the copper wiring, and the interface between the copper wiring and the substrate can be prevented from being oxidized. In the electronic device substrate according to the present invention, the substrate may have a silicon nitride film on a surface. According to the electronic device substrate having such a structure, since the silicon nitride film is interposed between the copper wiring and the substrate, when SiO _{2 in} the substrate is contained, oxygen of the SiO ₂ is transferred to the copper wiring. Intrusion can be avoided, and oxidation of the interface between the copper wiring and the substrate can be prevented.

In order to solve the above-mentioned problems, a method of manufacturing a substrate for electronic equipment according to the present invention includes disposing a substrate having copper wiring formed on a surface thereof in a processing chamber constituting a plasma apparatus which can be maintained in a reduced pressure state. A processing gas containing at least a nitrogen gas or an ammonia gas is supplied into the processing chamber, and plasma processing is performed so as to cover the copper wiring surface with a copper nitride film. Further, in order to solve the above problem, the method for manufacturing a substrate for an electronic device according to the present invention includes disposing a substrate having a copper wiring formed on a surface thereof in a processing chamber which can be maintained in a reduced pressure state and constitutes a plasma device. Alternatively, a processing gas containing at least a PH ₃ gas may be supplied into the processing chamber, and plasma processing may be performed so as to cover the copper wiring surface with a copper phosphide coating. Further, in order to solve the above problem, the method for manufacturing a substrate for an electronic device according to the present invention includes disposing a substrate having a copper wiring formed on a surface thereof in a processing chamber which can be maintained in a reduced pressure state and constitutes a plasma device. Alternatively, a processing gas containing at least a B ₂ H ₆ gas may be supplied into the processing chamber, and plasma processing may be performed so as to cover the copper wiring surface with a copper boride film. Further, in order to solve the above problem, the method for manufacturing a substrate for an electronic device according to the present invention includes disposing a substrate having a copper wiring formed on a surface thereof in a processing chamber which can be maintained in a reduced pressure state and constitutes a plasma device. , At least HB in the processing chamber
A processing gas containing r gas may be supplied, and plasma processing may be performed to cover the copper wiring surface with a copper bromide coating.

According to the method for manufacturing an electronic device substrate of the present invention having any one of the above-mentioned structures, a copper wiring is formed on a substrate, and the copper wiring is covered with the copper compound layer. A substrate for electronic equipment can be manufactured. In addition, any one of a copper nitride film, a copper phosphide film, a copper boride film, and a copper bromide film covering the surface of the copper wiring is formed using the same film forming apparatus as used for forming the copper wiring. As a result, there is no need to provide a special manufacturing apparatus, and the manufacturing process is not complicated. Further, since the above-mentioned film does not require heat treatment at a high temperature of 800 ° C. or more in a processing gas atmosphere such as ammonia gas, it can be applied to a case where a glass substrate that cannot withstand heating at 600 ° C. or more is used as a substrate. . Further, a method for manufacturing an electronic device substrate of the present invention having a structure in which a copper wiring is formed on a substrate and the copper wiring is covered with the copper compound layer is not limited to the above-described manufacturing method. In the ion implantation chamber to be configured, a substrate having a copper wiring formed on the surface is arranged, and a phosphor ion, a boron ion, a bromine ion, a nitrogen ion, or the like generated from an ion source through a mass spectrometer in the ion implantation. The specific ions to be selected are accelerated by an accelerator, and the accelerated ions are doped on the surface of the copper wiring, and any one of a copper nitride film, a copper phosphide film, a copper boride film, and a copper bromide film is formed on the copper wiring surface. It can also be manufactured by an ion implantation method (ion doping method) for forming a film of.

In order to solve the above-mentioned problems, a method of manufacturing a substrate for an electronic device according to the present invention comprises the steps of: mounting a substrate in a film forming chamber; and performing a first treatment containing at least nitrogen gas or ammonia gas in the film forming chamber. A gas is supplied, a copper nitride film is formed on the substrate surface by a vapor deposition method, and then an inert gas is supplied into the film formation chamber, and a copper film is formed on the copper nitride film surface by a vapor deposition method. A laminated film of the film and the copper film is patterned to form a wiring, and then a second processing gas containing at least a nitrogen gas or an ammonia gas is supplied into a plasma processing chamber, and an outer surface of the wiring is formed of a copper nitride film. It is characterized by plasma treatment to cover. Further, in order to solve the above problems, the method for manufacturing a substrate for an electronic device according to the present invention includes mounting a substrate in a film formation chamber, and disposing a first processing gas containing at least a PH ₃ gas in the film formation chamber. Supply, forming a copper phosphide film on the substrate surface by vapor deposition, then supplying an inert gas into the film forming chamber, forming a copper film on the copper phosphide film surface by vapor deposition, A wiring is formed by patterning a layered film of the copper film and the copper film, and then at least PH _{3 is} placed in a plasma processing chamber.
A second processing gas containing a gas may be supplied, and plasma processing may be performed so that the outer surface of the wiring is covered with a copper phosphide coating.

Further, in order to solve the above-mentioned problems, a method of manufacturing a substrate for electronic equipment according to the present invention comprises mounting a substrate in a film forming chamber, and forming a substrate containing at least B ₂ H ₆ gas in the film forming chamber. Supplying the processing gas of No. 1, forming a copper boride film on the surface of the substrate by vapor deposition, and then supplying an inert gas into the film forming chamber to form a copper film on the surface of the copper boride film by vapor deposition Then, a wiring is formed by patterning the laminated film of the copper boride film and the copper film, and then a second processing gas containing at least a B ₂ H ₆ gas is supplied into the plasma processing chamber to form a wiring. Plasma treatment may be performed so that the outer surface is covered with a copper boride film. Also,
In order to solve the above-described problems, a method for manufacturing a substrate for an electronic device according to the present invention includes mounting a substrate in a film formation chamber and supplying a first processing gas containing at least HBr gas into the film formation chamber. Forming a copper bromide film on the surface of the substrate by vapor deposition, then supplying an inert gas into the film formation chamber, forming a copper film on the surface of the copper bromide film by vapor deposition, the copper bromide film and A wiring is formed by patterning the laminated film with the copper film, and then a second processing gas containing at least HBr gas is supplied into the plasma processing chamber, and plasma processing is performed so that the outer surface of the wiring is covered with a copper bromide film. It may be characterized in that

According to the method for manufacturing an electronic device substrate of the present invention having any one of the above-described structures, at least the surface of the wiring structure having the outer surface of the copper wiring covered with the copper compound layer is insulative. The electronic device substrate of the present invention having a structure provided on the substrate can be manufactured. Further, a copper nitride film, a copper phosphide film, a copper boride film covering the outer peripheral surface (outer surface) of the copper wiring,
One of the copper bromide films can be formed using the same film forming equipment as that used for forming the copper wiring, so there is no need to provide special manufacturing equipment and the manufacturing process becomes complicated. Nor. Further, since the above-mentioned film does not require heat treatment at a high temperature of 800 ° C. or more in a processing gas atmosphere such as ammonia gas, it can be applied to a case where a glass substrate that cannot withstand heating at 600 ° C. or more is used as a substrate. .

Further, a method for manufacturing a substrate for an electronic device of the present invention having a structure in which a wiring structure formed by covering the outer surface of a copper wiring with the copper compound layer is provided on a substrate having at least a surface having an insulating property. Not limited to the manufacturing method described above, a substrate having a copper film formed on its surface is arranged in an ion implantation chamber constituting an ion implantation apparatus, and phosphorus ions generated from an ion source through a mass spectrometer in the ion implantation. ,
Specific ions selected from boron ions, bromine ions, nitrogen ions and the like are accelerated by an accelerator, and the accelerated ions are doped (ion implantation method) into the copper film surface to form a copper nitride film, a copper phosphide film , A copper boride film or a copper bromide film is formed, and then a copper film is formed on the surface of the film by a vapor deposition method, and a wiring is formed by patterning a laminated film of the film and the copper film. And then phosphorus ions generated from the ion source through a mass analyzer,
Specific ions selected from among boron ions, bromine ions, nitrogen ions, and the like are accelerated by an accelerator, and the accelerated ions are doped into the outer surface of the wiring (ion implantation method) to coat the outer surface of the wiring with a copper nitride film, It can also be manufactured by covering with any one of a copper phosphide film, a copper boride film and a copper bromide film. In the method for manufacturing a substrate for an electronic device according to the present invention, a vacuum evaporation method or a sputter evaporation method can be employed as the evaporation method.

According to another aspect of the invention, there is provided an electronic apparatus using any one of the above-described electronic device substrates according to the present invention. According to the electronic device of the present invention, since the electronic device substrate of the present invention using the copper wiring as the low-resistance wiring is provided, the signal voltage drop and the wiring delay due to the wiring resistance hardly occur, and the wiring is long. There is an advantage that it is possible to easily realize a display device or the like that is optimal for a display with a large area or a high-definition display with thin wiring. Also,
Since the electronic device substrate of the present invention, which is free from disconnection failure and corrosion, is provided, an electronic device having good characteristics can be provided.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Each embodiment of the present invention will be described below in detail, but the present invention is not limited to these embodiments. FIG. 1 shows a main part of a first embodiment in which the electronic device of the present invention is applied to a liquid crystal display device. The liquid crystal display device 30 of this embodiment is a thin film transistor array of the embodiment of the electronic device substrate of the present invention. It comprises a substrate 31, a transparent counter substrate 32 provided in parallel with and separated from the thin film transistor array substrate 31, and a liquid crystal layer 33 sealed between the thin film transistor array substrate 31 and the counter substrate 32. ing. Similar to the conventional structure shown in FIG. 15, the thin film transistor array substrate 31 has a large number of vertical source lines and a large number of horizontal gate lines arranged in a matrix when viewed from above the counter substrate 32 in a plan view. A large number of regions are arranged in such a manner as to be surrounded by a source wiring and a gate wiring, each of which is a pixel portion, and a region corresponding to each pixel portion is made of a transparent conductive material such as ITO (indium tin oxide). The pixel electrodes 35 are formed, and a thin film transistor is provided near each pixel electrode 35.

FIG. 1 is an enlarged view showing a portion of a thin film transistor provided in a region corresponding to one pixel portion surrounded by a source wiring and a gate wiring and a peripheral portion thereof. The display screen as the liquid crystal display device 30 is formed by arranging a large number of units. In the thin film transistor array substrate 31 of this embodiment, a gate electrode 40 is provided on a substrate 36 having at least a surface insulative in each pixel portion, and a gate insulating film 41 is provided to cover the gate electrode 40 and the substrate 36. A semiconductor active film 42 smaller than the gate electrode 40 is laminated on the gate insulating film 41 on the gate electrode 40, and ohmic contact films 43 and 44 made of an n ⁺ layer or the like are formed on both ends of the semiconductor active film 42. , Semiconductor active film 42
Are aligned with the ends of the semiconductor active film 42, and are separated from each other with a gap therebetween at the center of the semiconductor active film 42. Here, the substrate 36 may be a glass substrate or a SiN _x film 3 on the surface.
A substrate on which 6a is formed can also be used. Here, the gate electrode 40 is formed by covering a copper layer (copper wiring) 40a with any one of copper compound layers 40b selected from copper phosphide, copper boride, copper oxalate, and copper nitride.

Next, the pixel electrode 3 shown in FIG.
5), the upper surface and the left side surface of the ohmic contact film 43, the left side surface of the semiconductor active film 42 thereunder and a part of the upper surface of the gate insulating film 41 continuous therewith.
That is, the semiconductor active film 42 and the ohmic contact film 43
-Resistive silicon compound film 4 made of a-Si: n ⁺ layer, chromium silicide, etc.
5, and a source electrode 46 is formed thereon. The source electrode 46 here is a copper layer (copper wiring) 46a.
Covered with a copper compound layer 46b selected from copper phosphide, copper boride, copper oxalate, and copper nitride.

The right side of FIG. 1 (the pixel electrode 3 shown in FIG. 1)
5) covering the upper surface and the right side surface of the ohmic contact film 44 and the right side surface of the semiconductor active film 42 thereunder and a part of the upper surface of the gate insulating film 41 continuous therewith. A low-resistance silicon compound film 47 made of an n ⁺ layer or the like is provided so as to cover the overlapping portion of the ohmic contact film 43, and a drain electrode 48 is formed thereon. Here, the drain electrode 48 is formed by coating a copper layer (copper wiring) 48a with a copper compound layer 48b selected from copper phosphide, copper boride, copper oxalate, and copper nitride. A passivation film 49 is provided on each of these films to cover them.
Passivation film 4 on right end of drain electrode 48
A pixel electrode 35 is formed on 9, and this pixel electrode 35 is connected to a drain electrode 48 via a connection conductor 51 provided in a contact hole (conductive hole) 50 formed in the passivation film 49. .

On the other hand, on the liquid crystal side of the opposing substrate 32 provided for the thin film transistor array substrate 31, the color filter 52 and the common electrode film 5 are sequentially arranged from the opposing substrate 32 side.
3 are stacked. The color filter 52 includes a black matrix 54 for covering a thin film transistor portion, a gate wiring portion, and a source wiring portion which do not contribute to display, and transmits light passing through a portion which contributes to display in a pixel region where the pixel electrode 35 is provided. In addition, the color pixel section 55 for color display is mainly configured. These color pixel portions 55 are required when the liquid crystal display device has a color display structure, and are provided for each pixel portion. For example, R (red) ), G (green) and B (blue) are arranged regularly or randomly so that there is no color bias. In the sectional structure shown in FIG. 1, the alignment films provided on the liquid crystal side of the thin film transistor array substrate 31 and the liquid crystal side of the counter substrate 32 are omitted, and are provided outside the thin film transistor array substrate 31 and outside the counter substrate 32. The polarizing plate is omitted.

In the thin film transistor array substrate 31 provided in the liquid crystal display device 30 shown in FIG. 1, an oxidizing acid-based etching agent used for etching another layer in a later process is used for the gate electrode 40. Even if the copper compound layers 40b, 46b, and 48b are formed on the surface even if they penetrate into the source electrode 46 and the drain electrode 48, the copper layer is hardly damaged by the etching agent and the occurrence of disconnection failure is prevented. In addition, the degree of freedom of the etching agent used is large. Further, even if the resist stripping solution used in the photolithography step penetrates to the gate electrode 40, the source electrode 46, and the drain electrode 48, the copper compound layers 40b, 46b, and 48b are formed on the surface.
The copper layer is hardly oxidized by the resist stripping solution, and corrosion can be prevented. The gate electrode 40, the source electrode 46, and the drain electrode 48 have copper compound layers 40b, 46b,
Since 48b is formed, an oxide layer is not formed on the surface of the electrode due to the presence of moisture before etching, and the electrode is less likely to be damaged by an etching agent having no oxidizing power, thereby preventing the occurrence of disconnection failure.

Therefore, according to the thin film transistor array substrate 31 of the embodiment, the oxidation resistance to moisture and a resist stripping solution can be improved without impairing the characteristics of using low-resistance copper as an electrode or wiring material, and furthermore, an etching agent or the like can be used. Can be prevented from being broken, corrosion can be prevented, and the degree of freedom of an etching agent to be used is large, so that the process after forming an electrode is hardly restricted. In the thin film transistor array substrate 31 of the embodiment, the copper compound layer 40 covering the copper layers 40a, 46a, 48a
Since b, 46b, and 48b can be formed using the same film forming apparatus as used for forming the copper layers 40a, 46a, and 48a,
It is not necessary to provide a special manufacturing device, and the manufacturing process is not complicated. Further, the copper compound layer 40
Since b, 46b, and 48b do not require heat treatment at a high temperature of 800 ° C. or more in a processing gas atmosphere such as ammonia gas, they can be applied to a case where a glass substrate that cannot be heated at 600 ° C. or more is used as a substrate. Also, the substrate 36
In the case of using a substrate having a SiN _x film 36a formed on the surface,
Since the iN _x film 36a is interposed, the SiO ₂
Is contained, it is possible to prevent oxygen from entering the gate electrode 40 and prevent the interface between the gate electrode 40 and the substrate 36 from being oxidized.

According to the liquid crystal display device 30 of the embodiment, since the thin film transistor array substrate 31 as described above is provided, a signal voltage drop or a wiring delay due to wiring resistance is less likely to occur, and a large wiring area is required. There is an advantage that it is possible to easily realize a display device that is optimal for high-definition display where the display and the wiring are thin. Further, since the thin film transistor array substrate 31 free from disconnection failure and corrosion is provided, a liquid crystal display device having good characteristics can be provided.

Next, an example in which the method for manufacturing a substrate for electronic equipment of the present invention is applied to a method for manufacturing a thin film transistor array substrate having the structure shown in FIG. 1 will be described. FIG. 2 is a schematic configuration diagram illustrating a film forming chamber of a thin film manufacturing apparatus suitably used in the method for manufacturing a thin film transistor array substrate according to the embodiment, and FIG. 3 is a plan view illustrating an entire configuration of the thin film manufacturing apparatus. FIG. 4 is an enlarged side view of a part of the thin film manufacturing apparatus shown in FIG. FIG. 2 shows a film forming chamber (processing chamber) that can be maintained in a reduced pressure state. The film forming chamber 60 is connected to a side portion of a transfer chamber 61 via a gate valve 62 as shown in FIG. . A film forming chamber 60 is provided around the transfer chamber 61.
In addition, a rotor chamber 63, an unrotor chamber 66, and a stocker chamber 65 are connected so as to surround the transfer chamber 61, respectively, and gate valves 66, 67, 68 are provided between the transfer chamber 61 and the surrounding chambers, respectively. Is provided. As described above, the film forming chamber 60, the transfer chamber 61, the rotor chamber 63, the unrotor chamber 66, and the stocker chamber 65 constitute a thin film manufacturing apparatus A '.

As shown in FIG. 2, a first electrode 70 is provided on the upper part of the film forming chamber 60, and a target 71 is detachably mounted on the bottom surface of the first electrode 70. A second electrode 72 is provided at the bottom of the film chamber 60, and a substrate 36 having at least an insulating surface is detachably mounted on the upper surface of the second electrode 72. As a material of the target 71, copper is used when forming the gate electrode 40, the source electrode 46, and the drain electrode 48, and when forming an a-Si: n + layer, n-type a-S
i: P-doped Si for generating n @ + is used. When manufacturing a thin film transistor array substrate, a glass substrate can be suitably used as the substrate 36. In mounting the target 71, a generally known target mounting mechanism such as an electrostatic chuck can be used. The first electrode 70 is made of a matrix 7 made of a conductive material.
0a and a protective layer 70b formed of an oxide film, a nitride film or a fluoride film formed on the surface of the base 70a.

A first AC power supply 75 is connected to the first electrode 70, and a matching circuit 75a is incorporated between the first electrode 70 and the first AC power supply 75. The matching circuit 75a has an effect of reducing the reflected wave of the high-frequency power to zero. Also, the first electrode 70 has
A DC power supply 78 is connected via a band-pass filter 77 such as a low-pass filter for impedance adjustment. The bandpass filter 77 adjusts the impedance of the circuit to infinity so that a high frequency does not get on the DC power supply 78. Further, a second AC power supply 80 is connected to the second electrode 72, and the second electrode
A matching circuit 80a having the same function as that of the matching circuit 75a is incorporated between the second AC power supply 80 and the second AC power supply 80. The film forming chamber 60 includes an evacuation unit 60a for vacuum evacuation and gas exhaust, a reaction gas supply mechanism 60b into the film forming chamber 60, and the like. These are described in a simplified manner.

Next, a link-type transfer mechanism (magic hand) 69 is provided in the transfer chamber 61, and the transfer mechanism 69 rotates around a support shaft 74 erected at the center of the transfer chamber 61. The stocker chamber 65 is movably provided.
The target 71 is taken out from the cassette 79 disposed in the
The target 71 can be mounted on the first electrode 70. The cassette 79 also houses a dummy target 71a, and the dummy target 71a can be transported to the film forming chamber 60 as needed.

The apparatus for manufacturing a thin film shown in FIGS.
In one film forming chamber 60, one or more thin films (for example, a copper film for forming the gate electrode 40 and any one of a copper nitride film, a copper phosphide film, a copper boride film, and a copper bromide film covering this surface) Film, gate insulating film 41, and semiconductor active film 42
, Ohmic contact films 43 and 44, low resistance silicon compound films 45 and 47, a copper film for forming source electrode 46, and a copper nitride film, a copper phosphide film, a copper boride film, One of a copper bromide film, a copper film for forming the drain electrode 48 and a copper nitride film, a copper phosphide film, a copper boride film, or a copper bromide film covering the surface thereof. It is a device that can form a continuous film. That is, in the film forming chamber 60, a CVD film (a film covering a gate insulating film, a semiconductor active film, a copper film of a gate electrode,
Formation of a film covering the copper film of the source electrode and a film covering the copper film of the drain electrode) and sputtering film formation (ohmic contact film, low-resistance silicon compound film, copper film of the gate electrode, copper film of the source electrode, drain electrode) The formation of a copper film is performed by switching the power supply. First, if the pressure in the film forming chamber 60, the transfer chamber 61, and the stocker chamber 65 is reduced, the gate valves 62 and 18 are opened and the transfer mechanism 3 is opened.
3 mounts the glass substrate 36 on the second electrode 72.
When the gate valve 62 is closed from this state, a thin film such as the gate electrode 40 is sequentially formed on the substrate 36 according to the following steps.

(1) Step of Forming Copper Film for Gate Electrode The film forming chamber 60 is set in an Ar gas atmosphere, a target 71 made of copper is mounted on the first electrode 70, and a DC power supply 78
Of the target 7 by operating the AC power supply 75 of the target 7
1 and the second AC power supply 80 is operated to apply the second AC power to the glass substrate 36, thereby forming a copper film by sputtering. As shown in FIG. A copper film 40c is formed thereon. (2) Patterning Step of Copper Layer of Gate Electrode A resist is applied to the surface of the copper film 40c, pattern exposure is performed, and after removing unnecessary portions by etching, patterning is performed to peel off the resist, as shown in FIG. 5B. A copper layer (copper wiring) 40a is formed.

(3) Step of Forming Copper Compound Layer of Gate Electrode A target 71 made of copper is removed from the first electrode 70, and a dummy target 71 made of Si, SiO ₂ or the like is removed.
a, and the processing gas is supplied into the film forming chamber 60 while the glass substrate 36 mounted on the second electrode 72 remains as it is. As a processing gas used here, a mixed gas of nitrogen gas or ammonia gas is used when forming a copper nitride film, and PH ₃ is used when forming a copper phosphide film.
When a gas is used and a copper boride film is formed, B ₂ H ₆
A mixed gas with a gas is used, and when a copper bromide film is formed, an HBr gas is used. Here, the processing gas may include an inert gas such as Ar or a hydrogen gas. The flow rate of the processing gas is set at C for forming the gate insulating film.
It is almost the same as in the VD process.

Next, a high frequency of about 40 MHz is supplied from the first AC power supply 75 to the first electrode 70, and the load potential is floated to generate plasma.
13. Frequency from second AC power supply 80 to second electrode 72
A high frequency power of about 6 MHz is applied to deposit the components in the processing gas on the copper film 40c and to react N, P, B, Br and the like in the components with copper to nitride the surface of the copper layer 40a. When the plasma treatment is performed so as to cover with a film such as a copper film, a copper phosphide film, a copper boride film, and a copper bromide film, the surface of the copper layer 40a becomes a copper compound layer 40 as shown in FIG.
The gate electrode 40 covered with b is obtained. In this step, the electric power applied to the substrate 36 is 0.5 to 2 W
/ Cm ² . The plasma processing time is about 10 seconds to 10 minutes, preferably about 1 minute to 3 minutes. The longer the plasma treatment time is, the thicker the copper compound layer can be. However, if the thickness of the compound layer is too large, the specific resistance decreases.

(4) Gate insulating film (silicon nitride film) 41
The film forming chamber 60 is set to a mixed gas atmosphere of SiH ₄ + NH ₃ + N ₂ , a dummy target 71 a is mounted on the first electrode 70, and a frequency 2 is applied from the first AC power supply 75 to the first electrode 70.
A high frequency of 00 MHz is supplied, a load potential is floated, plasma is generated, and a silicon nitride film is deposited on the substrate 36 by CVD to form a gate insulating film 41 as shown in FIG. 5D. In the case of this CVD film formation, the dummy target 71 mounted on the first electrode 70 is used.
a is set to a large frequency so as not to sputter, a small amount of ion energy is applied to the first electrode 70, and a high-frequency power is supplied to the second electrode 72.
The ion energy applied to the substrate 36 is controlled. (5) CVD film forming step of semiconductor active film (a-Si layer) 42 The film forming chamber 60 is set to a mixed gas atmosphere of SiH ₄ + H ₂ , and the first alternating current is carried out while the dummy target 71 a is mounted on the first electrode 70. 200M frequency from the power supply 75 to the first electrode 70
Hz, and a second AC power supply 80
Then, high-frequency power is supplied to the second electrode 72 to control the ion energy applied to the glass substrate 36 to form the a-Si layer, thereby forming the semiconductor active film 42.

(6) Ohmic contact film (a-S
i: n <+> layer) 43a sputtering film forming step The film forming chamber 60 is set to an Ar gas atmosphere, and the first electrode 70
-Si: A target 71 made of P-doped Si for generating an n + layer is mounted, and a first electrode 7 is supplied from a first AC power supply 75.
A high frequency having a frequency of about 13.6 MHz is supplied to the DC power source 0, and the load potential applied from the DC power supply 78 is set to -200 V to perform sputtering, thereby forming an ohmic contact film 43a on the semiconductor active film 42. (7) Semiconductor active film 42 and ohmic contact film 43
Patterning Step a The resist is applied to the surface of the ohmic contact film 43a and subjected to pattern exposure, and after removing unnecessary portions by etching, patterning is performed to peel off the resist, and as shown in FIG. Small island-shaped semiconductor active film 42 and ohmic contact film 4
3a is obtained. The positions where the semiconductor active film 42 and the ohmic contact film 43a are formed are positions facing the gate electrode 40 in the gate insulating film 41 on the gate electrode 40. (8) Low resistance silicon compound film (a-Si: n + layer) 4
Sputtering Step 5a A low-resistance silicon compound film 45a is formed to cover the ohmic contact film 43a and the gate insulating film 41 in the same manner as the ohmic contact film 43a.

(9) Source electrode 46 and drain electrode 4
8, a film formation chamber 60 was placed in an Ar gas atmosphere, a target 71 made of copper was mounted on the first electrode 70, and a DC power supply 78
Of the first power by operating the AC power supply 75 of the target 7
5, a copper film 46c as shown in FIG. 5D is formed by a sputtering method in which the second AC power is applied to the glass substrate 36 by operating the second AC power supply 80. (10) Step of forming ohmic contact films 43 and 44, low-resistance silicon compound films 45 and 47, and copper layers of source electrode 46 and drain electrode 48 The upper part of the central portion of the semiconductor active film 42 is removed by etching, and By removing the ohmic contact film 43a, the low-resistance silicon compound film 45a, and the copper film 46c on the central portion of the active film 42, as shown in FIG. To form ohmic contact films 43 and 44, and cover the respective ohmic contact films with a low-resistance silicon compound film 4.
5, 47, a copper layer 46a of the source electrode 46, and a copper layer 48a of the drain electrode 48 can be formed.

(11) Step of Forming Copper Compound Layers 46b and 48b of Source and Drain Electrodes 46 and 48
b, 48b are covered with the copper layer 40a of the gate electrode 40.
Plasma treatment is performed in substantially the same manner as the plasma treatment of the surfaces of the copper layers 46a and 48a as shown in FIG.
The source electrode 46 and the drain electrode 48 whose surfaces are covered with the copper compound layers 46b and 48b are obtained. (12) CVD film forming step of passivation film 49 Semiconductor active film 42, source electrode 46 and drain electrode 48
Passivation film 4 made of silicon nitride so as to cover
9 is formed in substantially the same manner as the CVD film forming step of the gate insulating film 41.

(13) Pixel Electrode Forming Step After forming an ITO layer on the passivation film 49, the pixel electrode 35 is formed by patterning, and then the passivation film 49 is formed by a dry method or a combination of a dry method and a wet method. Etching to make contact hole 5
After forming 0, a layer made of a conductive material is formed, and then patterning is performed to form a connection conductor portion 51 over the bottom and inner wall surfaces of the contact hole 50 and the upper surface of the passivation film 49 as shown in FIG. When the drain electrode 48 and the pixel electrode 35 are connected via the connection conductor 51, a thin film transistor array substrate 31 similar to that of FIG. 1 is obtained. The substrate 36 has a surface of SiN _x
In the case of using the film on which the film 36a is formed, the gate insulating film 41 is formed before forming the copper layer 40a on the substrate 36.
A SiN _x film is formed in the same manner as in the CVD film forming step. Although the source wiring is not shown in the drawing, it may be formed at the same time as the film formation and the etching when the source electrode 46 is formed on the gate insulating film 41.

If a thin film transistor array substrate is manufactured by the method described above, the copper compound layers 40b and 46
Since b and 48b can be formed using the same film forming apparatus as that on which the copper layers 40a, 46a and 48a are formed, there is no need to provide a special manufacturing apparatus and the manufacturing process is not complicated. . Further, the copper compound layers 40b, 46b,
48b is 8b in a processing gas atmosphere such as ammonia gas.
Since heat treatment is not required at a high temperature of 00 ° C or more,
The present invention can be applied to a case where a glass substrate which cannot withstand heating of 0 ° C. or more is used as the substrate. In the above embodiment, the ohmic contact film 43 and the source electrode 46
And the case where the low-resistance silicon compound film is provided between the ohmic contact film 44 and the drain electrode 48, but the low-resistance silicon compound does not necessarily have to be provided. In the method for manufacturing a thin film transistor array substrate according to the first embodiment, a case where a copper layer (copper wiring) forming an electrode is formed in a processing chamber forming a plasma apparatus as shown in FIG. However, the copper layer may be formed by an ordinary sputtering device.

FIG. 7 shows a main part of a second embodiment in which the electronic apparatus of the present invention is applied to a liquid crystal display device. The liquid crystal display device 30a of this embodiment is different from the first embodiment shown in FIG. The difference from the liquid crystal display device of the embodiment is that the thin film transistor array substrate 31a in which the gate electrode (wiring structure) 40 is composed of a copper layer (copper wiring) 40a and a copper compound layer 40b covering the outer peripheral surface (outer surface) thereof. That is, the copper compound layer 40 is also provided between the substrate 36 and the copper layer 40a.
b is formed. According to the liquid crystal display device 30a of the second embodiment, since the copper compound layer 40b is formed between the copper layer 40a of the gate electrode and the substrate 36, even if the material forming the substrate is a glass substrate. The oxygen of SiO ₂ in the glass substrate can be prevented from entering the copper wiring,
Oxidation of the interface between the gate electrode 40 and the substrate 36 can be prevented.

Next, a method of manufacturing the thin film transistor array substrate 31a having the structure shown in FIG.
Before forming the film c, a film forming step (P-1) of a copper compound layer forming film 40e between the copper film and the substrate, which will be described later, is performed, and the above-mentioned (1) gate electrode is formed on the film 40e. A copper film 40c is formed in the same manner as in the copper film forming step of
The above-described first step is performed, except that the above-described (2) a patterning step (2-2) of a laminated film of a film 40e and a copper film 40c, which will be described later, is performed instead of the step of patterning the copper layer of the gate electrode.
This is the same as the method for manufacturing the thin film transistor array substrate 31 of the embodiment. (P-1) Step of Forming Coating 40e Between Copper Film 40c and Substrate A target 71 made of copper is mounted on the first electrode 70,
The processing gas is supplied into the film forming chamber 60, and the DC power supply 78 or the first AC power supply 75 is operated to apply the first power (at least one of DC power and AC power) to the target 71. At the same time, by operating the second AC power supply 80 and applying the second AC power to the glass substrate 36, a copper nitride film, a copper phosphide film, and a boride film are formed on the substrate 36 as shown in FIG. A film 40e such as a copper film or a copper bromide film is formed.

(2-2) Patterning Step of Coating 40e and Copper Film 40c A resist is applied to the surface of the copper film 40c and subjected to pattern exposure, and the resist is removed after removing unnecessary portions of the copper film 40c and the coating 40e by etching. 8B, a copper layer (copper wiring) 40a as shown in FIG.
A copper compound layer 40b is formed between this and the substrate 36.
According to the method for manufacturing a thin film transistor array substrate of the second embodiment, any one of the copper nitride film, the copper phosphide film, the copper boride film, and the copper bromide film 40e is a copper film 40c.
Since a film can be formed using the same film forming apparatus as used for forming the film, no special manufacturing apparatus is required, and the manufacturing process is not complicated. Further, the coating 40e
Does not require heat treatment at a high temperature of 800 ° C. or more in an atmosphere of a processing gas such as ammonia gas.
The present invention can be applied to a case where a glass substrate that cannot withstand the above-described heating is used as a substrate.

In the method of manufacturing a thin film transistor array substrate according to the second embodiment, a copper layer forming an electrode in a processing chamber forming a plasma apparatus as shown in FIG. 2, and the copper layer and the substrate Although the case where the intervening copper compound layer is formed has been described, the copper compound layer may be formed by a plasma CVD apparatus, and the copper layer may be formed by an ordinary sputtering apparatus. In the above embodiments, the case where the electronic device substrate and the method for manufacturing the same and the electronic device of the present invention are applied to a thin film transistor array substrate, a method for manufacturing the same, and a liquid crystal display device are described. And a semiconductor integrated device.

[0047]

(Embodiment 1) Using the thin film manufacturing apparatus shown in FIGS. 2 to 4, the film formation chamber 60 was set to an Ar gas atmosphere, a target 71 made of copper was mounted on the first electrode 70, and a direct current was applied. By operating the power supply 78 to apply DC power to the target 71 and operating the second AC power supply 80 to apply high-frequency power to the glass substrate 36, a 2000 Å thick copper film is formed on the glass substrate by sputtering. Formed.

Next, the target 71 made of copper is removed from the first electrode 70, and a dummy target 71a made of Si, SiO ₂ or the like is mounted.
The glass substrate 36 attached to the
Inside, an NH ₃ gas was supplied as a processing gas at a flow rate of 600 ccm. Then, the first electrode 7 is supplied from the first AC power supply 75.
0 is supplied with a high frequency having a frequency of 40 MHz, a load potential is floated to generate plasma, and a frequency of 13.6 MHz is supplied from the second AC power supply 80 to the second electrode 72.
A high-frequency power of about 30 ° C. is applied to deposit nitrogen on the processing gas on the copper film and react with the copper to perform plasma treatment for 1 minute. The surface of the copper film is formed by a copper nitride layer having a thickness of 200 angstroms. A coated wiring layer was produced. In this step, the electric power applied to the substrate 36 is 0.5
To about ² W / cm ² . When the specific resistance of the wiring layer obtained in Example 1 was measured, it was 2.05 Ω · cm.

Example 2 A wiring layer was formed in the same manner as in Example 1 except that the plasma processing time was set to 3 minutes. The wiring layer obtained here had a copper nitride layer thickness of 40.
It was 0 angstroms. When the specific resistance of the wiring layer obtained in Example 2 was measured, it was 2.11 Ω · cm. (Comparative Example 1) A copper film having a thickness of 2,000 Å was formed on a glass substrate in the same manner as in Example 1, and a wiring layer consisting of only the copper film was formed. When the specific resistance of the wiring layer obtained in Comparative Example 1 was measured, it was 1.9 Ω · cm.

(Experimental Example) The wiring layers obtained in Examples 1 and 2 and Comparative Example 1 were treated with ammonium persulfate (etching solution) for 1 hour.
They were immersed for a minute, removed from the stripping solution, rinsed and dried. The chemical resistance was examined. When the etching rate of each wiring layer was measured, the wiring layer of Example 1 was 200 Å / min, the wiring layer of Example 2 was 70 Å / min, and the wiring layer of Comparative Example 1 was 1 Å / min.
280 Å / min. The states of the conductive layers of Examples 1, 2 and Comparative Example 1 before and after immersion in ammonium persulfate were observed with an atomic force microscope (AFM). The results are shown in FIGS. FIG. 9 is a photograph showing the metallographic structure of the wiring layer surface of Example 1 before immersion in ammonium persulfate, and FIG. 10 is a photograph showing the metallographic structure of the wiring layer surface in Example 1 after immersion in ammonium persulphate. FIG.
Is a photograph showing the metallographic structure of the wiring layer surface of Example 2 before immersion in ammonium persulfate, and FIG. 12 is a photograph showing the metallographic structure of the wiring layer surface in Example 2 after immersion in ammonium persulfate. FIG. 13 is a photograph showing the metal structure of the wiring layer surface of Comparative Example 1 before immersion in ammonium persulfate.
3 is a photograph showing the metal structure of the wiring layer surface of Comparative Example 1 after immersion in ammonium persulfate.

As is clear from the results shown in FIGS. 9 to 14 and the measurement results of the etching rate, the wiring layer of Comparative Example 1 has a large etching rate by ammonium persulfate, and the copper film is etched over almost the entire surface. (The surface protection ratio is close to 0%.) Only a small amount of the copper film remains on the glass substrate surface, and it can be seen that the copper film is significantly damaged by the etching solution. On the other hand, in Examples 1 and 2, the etching rate by ammonium persulfate was higher than that in Comparative Example 1, and the surface protection ratio of the wiring layer of Example 1 was 50 minutes with a plasma treatment of 1 minute.
%, The surface treatment rate of the wiring layer of Example 2 was 3%, and the state of the surface of the wiring layer before and after immersion in the etching solution was not much changed. It can be seen that the chemical resistance is excellent. Here, the surface protection ratio is a ratio of the total area of the surface portion remaining after immersion in the etching solution to the surface area (100%) of the wiring layer before immersion in the etching solution.

[0052]

As described above, according to the present invention, when low-resistance copper is used as an electrode or wiring material, it is possible to improve the oxidation resistance to moisture and a resist stripping solution, and to further reduce the acid resistance to etching agents and the like. It is possible to provide an electronic device substrate and a method for manufacturing the same, which can improve the performance, and to provide an electronic device provided with such an electronic device substrate.

[Brief description of the drawings]

FIG. 1 is a diagram showing a cross section of a liquid crystal display device and a thin film transistor array substrate according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram showing a film forming chamber of a thin film manufacturing apparatus suitably used in the method for manufacturing a thin film transistor array substrate according to the first embodiment of the present invention.

FIG. 3 is a plan view showing the entire configuration of a thin film manufacturing apparatus suitably used in the method for manufacturing a thin film transistor array substrate according to the first embodiment of the present invention.

FIG. 4 is an enlarged side view of a part of the thin film manufacturing apparatus shown in FIG.

FIG. 5 is a view showing a method of manufacturing the thin film transistor array substrate according to the first embodiment of the present invention in the order of steps.

FIG. 6 is a diagram showing a method of manufacturing the thin film transistor array substrate according to the first embodiment of the present invention in the order of steps.

FIG. 7 is a diagram illustrating a cross section of a liquid crystal display device and a thin film transistor array substrate according to a second embodiment of the present invention.

FIG. 8 is a view illustrating a method of manufacturing a thin film transistor array substrate according to a second embodiment of the present invention.

FIG. 9 is a photograph showing the metallographic structure of the wiring layer surface of Example 1 before immersion in an etching solution.

FIG. 10 is a photograph showing the metallographic structure of the wiring layer surface of Example 1 after immersion in an etching solution.

FIG. 11 is a photograph showing a metal structure on the surface of a wiring layer of Example 2 before immersion in an etching solution.

FIG. 12 is a photograph showing the metal structure of the wiring layer surface of Example 2 after immersion in an etching solution.

FIG. 13 is a photograph showing a metal structure on the surface of a wiring layer of Comparative Example 1 before immersion in an etching solution.

FIG. 14 is a photograph showing the metallographic structure of the wiring layer surface of Comparative Example 1 after immersion in an etching solution.

FIG. 15 is a schematic plan view showing a pixel portion of an example of a thin film transistor array substrate provided in a conventional liquid crystal display device.

16 is a sectional view showing the thin film transistor array substrate of FIG.

[Explanation of symbols]

30, 30a: liquid crystal display device, 31, 31a: thin film transistor array substrate, 36: substrate, 36a: SiN
_x film, 40 ... gate electrode, 40a, 46a, 48a ...
Copper layer, 40b, 46b, 48b... Copper compound layer, 40
c, 46c: copper film, 40e: coating, 46: source electrode, 48: drain electrode, 60: film forming chamber.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Kenji Yamamoto 3-31, Meido, Izumi-ku, Sendai-shi, Miyagi F-Tech Co., Ltd. F-term (reference) 4E351 AA13 AA15 BB01 BB35 CC03 CC33 DD04 DD37 DD38 DD54 DD56 GG13 GG14

Claims (12)

[Claims] A copper wiring is formed on a substrate having at least an insulating surface, and the copper wiring is formed of any one of copper compounds selected from copper phosphide, copper boride, copper oxalate, and copper nitride. A substrate for an electronic device, wherein the substrate is coated with a layer. 2. A wiring structure in which an outer surface of a copper wiring is covered with a copper compound layer selected from copper phosphide, copper boride, copper oxalate, and copper nitride, at least a surface of which is insulated. A substrate for an electronic device, wherein the substrate is provided on a flexible substrate. 3. The electronic device substrate according to claim 1, wherein the substrate has a silicon nitride film on a surface. 4. A substrate having a copper wiring formed on a surface thereof is disposed in a processing chamber capable of being maintained in a reduced pressure state constituting a plasma apparatus, and a processing gas containing at least a nitrogen gas or an ammonia gas is supplied into the processing chamber. And performing a plasma treatment so as to cover the copper wiring surface with a copper nitride film. 5. A substrate having copper wiring formed on a surface thereof is disposed in a processing chamber that can be maintained in a reduced pressure state and constitutes a plasma device, and a processing gas containing at least a PH ₃ gas is supplied into the processing chamber. A method for manufacturing a substrate for electronic equipment, comprising performing a plasma treatment so as to cover the copper wiring surface with a copper phosphide film. 6. A substrate having copper wiring formed on a surface thereof is disposed in a processing chamber which can be maintained in a reduced pressure state and constitutes a plasma apparatus, and a processing gas containing at least a B ₂ H ₆ gas is supplied into the processing chamber. And performing a plasma treatment so as to cover the copper wiring surface with a copper boride film. 7. A substrate having copper wiring formed on a surface thereof is disposed in a processing chamber that can be maintained in a reduced pressure state and constitutes a plasma apparatus, and a processing gas containing at least an HBr gas is supplied into the processing chamber. A method of manufacturing a substrate for electronic equipment, comprising performing a plasma treatment so as to cover a copper wiring surface with a copper bromide film. 8. A substrate is mounted in a film formation chamber, a first processing gas containing at least nitrogen gas or ammonia gas is supplied into the film formation chamber, and a copper nitride film is formed on the surface of the substrate by vapor deposition. Then, an inert gas is supplied into the film formation chamber, a copper film is formed on the surface of the copper nitride film by a vapor deposition method, and a wiring is formed by patterning a stacked film of the copper nitride film and the copper film, Next, a second processing gas containing at least nitrogen gas or ammonia gas is supplied into the plasma processing chamber, and plasma processing is performed so as to cover the outer surface of the wiring with a copper nitride film. 9. A substrate is mounted in a film formation chamber, a first processing gas containing at least a PH ₃ gas is supplied into the film formation chamber, and a copper phosphide film is formed on the substrate surface by an evaporation method. Next, an inert gas is supplied into the film formation chamber, a copper film is formed on the surface of the copper phosphide film by an evaporation method, and a wiring is formed by patterning a stacked film of the copper phosphide film and the copper film. Then, a second processing gas containing at least a PH ₃ gas is supplied into the plasma processing chamber, and plasma processing is performed so as to cover an outer surface of the wiring with a copper phosphide film. 10. A substrate is mounted in a film forming chamber, a first processing gas containing at least B ₂ H ₆ gas is supplied into the film forming chamber, and a copper boride film is formed on the surface of the substrate by an evaporation method. Then, an inert gas is supplied into the film forming chamber, a copper film is formed on the surface of the copper boride film by a vapor deposition method, and a wiring is formed by patterning a laminated film of the copper boride film and the copper film. A second processing gas containing at least B ₂ H ₆ gas is supplied into a plasma processing chamber, and plasma processing is performed so as to cover an outer surface of the wiring with a copper boride film. Manufacturing method. 11. A substrate is mounted in a film formation chamber, a first processing gas containing at least HBr gas is supplied into the film formation chamber, and a copper bromide film is formed on a surface of the substrate by an evaporation method. Supplying an inert gas into the film forming chamber, forming a copper film on the surface of the copper bromide film by a vapor deposition method, forming a wiring by patterning a laminated film of the copper bromide film and the copper film, Next, a second processing gas containing at least HBr gas is supplied into the plasma processing chamber, and plasma processing is performed so as to cover an outer surface of the wiring with a copper bromide film. 12. An electronic device using the electronic device substrate according to claim 1.