JP2000161932A5 - - Google Patents
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- JP2000161932A5 JP2000161932A5 JP1998340297A JP34029798A JP2000161932A5 JP 2000161932 A5 JP2000161932 A5 JP 2000161932A5 JP 1998340297 A JP1998340297 A JP 1998340297A JP 34029798 A JP34029798 A JP 34029798A JP 2000161932 A5 JP2000161932 A5 JP 2000161932A5
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- JP
- Japan
- Prior art keywords
- screen
- wafer
- inspection apparatus
- inspection
- wafer inspection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000007689 inspection Methods 0.000 description 26
- 230000000875 corresponding Effects 0.000 description 5
- 238000001514 detection method Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 230000001678 irradiating Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Description
【特許請求の範囲】
【請求項１】
回路パターンが形成されたウェハに光、レーザ光あるいは荷電粒子線を照射する照射手段と、該照射によって基板から発生する信号を検出する検出手段と、該検出手段によって検出された信号を記憶する記憶手段と、該記憶された画像を他の同一の回路パターンから形成された画像と比較することにより前記回路パターン上の欠陥を検査する検査手段とを備えたウェハ検査装置において、
前記検査に必要な検査条件を設定するための操作画面が表示されるモニタと、
該操作画面上で該検査条件を設定入力するための入力手段とを備え、
前記操作画面には、複数の検査条件に応じた操作画面が、該検査条件を示すタブと共に複数個重ねて表示されることを特徴とするウェハ検査装置。
【請求項２】
請求項１に記載のウェハ検査装置において、
現在入力中の操作画面に対応するタブは、他の操作画面に対応するタブとは異なる背景色で前記モニタに表示されることを特徴とするウェハ検査装置。
【請求項３】
請求項１に記載のウェハ検査装置において、
前記操作画面は、前記検査条件の設定シーケンスに沿った順序で階層的に重ねて表示されることを特徴とするウェハ検査装置。
【請求項４】
請求項３に記載のウェハ検査装置において、
前記操作画面に対応するタブが画面上でずらされて表示されることにより、前記設定シーケンス全体が見渡せるように表示されることを特徴とするウェハ検査装置。
【請求項５】
請求項１に記載のウェハ検査装置において、
前記タブを選択することにより前記操作画面が当該選択したタブに対応する操作画面に切り替わることを特徴とするウェハ検査装置。
【請求項６】
請求項１に記載のウェハ検査装置において、
前記操作入力画面上に、前記検査条件で設定する項目の入力順序や現在のステータスを示すインジケータが表示されることを備えたことを特徴とするウェハ検査装置。
【請求項７】
請求項１に記載のウェハ検査装置において、
前記操作画面は、
前記荷電粒子線の照射条件変更ないし該荷電粒子線照射により得られる画像のコントラスト確認のための「コントラスト」画面、
前記ウェハ上に形成されたチップのチップサイズおよび配列を入力するための「チップマトリクス」画面、
前記照射手段のアライメント上の各種条件設定とアライメントを実行するための「アライメント」画面、
前記チップ内のメモリセル領域を設定するための「セル領域」画面、
前記ウェハ上で検査領域を指定するための「検査領域」画面、
明るさ調整用パターンを指定し明るさ調整を実行する「キャリブレーション」画面、
小領域の画像を取得し欠陥検出しきい値を決めるための「試し検査」画面、
ウエハ面内のばらつきも含めてしきい値の妥当性を確認するための「最終試し検査」画面、のいずれかを含むことを特徴とするウェハ検査装置。
[ Claims ]
[Claim 1]
An irradiation means for irradiating a wafer on which a circuit pattern is formed with light, a laser beam, or a charged particle beam, a detection means for detecting a signal generated from a substrate by the irradiation, and a memory for storing the signal detected by the detection means. In a wafer inspection apparatus including means and inspection means for inspecting defects on the circuit pattern by comparing the stored image with an image formed from other identical circuit patterns.
A monitor that displays an operation screen for setting the inspection conditions required for the inspection, and
It is provided with an input means for setting and inputting the inspection condition on the operation screen.
A wafer inspection apparatus characterized in that a plurality of operation screens corresponding to a plurality of inspection conditions are displayed on the operation screen together with a tab indicating the inspection conditions.
2.
In the wafer inspection apparatus according to claim 1,
A wafer inspection device characterized in that a tab corresponding to an operation screen currently being input is displayed on the monitor with a background color different from that of tabs corresponding to other operation screens.
3.
In the wafer inspection apparatus according to claim 1,
The wafer inspection apparatus, wherein the operation screens are displayed in a hierarchical manner in an order according to a setting sequence of the inspection conditions.
4.
In the wafer inspection apparatus according to claim 3,
A wafer inspection apparatus, characterized in that tabs corresponding to the operation screens are displayed so as to be shifted on the screen so that the entire setting sequence can be seen.
5.
In the wafer inspection apparatus according to claim 1,
A wafer inspection apparatus, characterized in that, by selecting the tab, the operation screen is switched to the operation screen corresponding to the selected tab.
6.
In the wafer inspection apparatus according to claim 1,
A wafer inspection apparatus characterized in that an indicator indicating an input order of items set by the inspection conditions and an indicator indicating the current status is displayed on the operation input screen.
7.
In the wafer inspection apparatus according to claim 1,
The operation screen is
"Contrast" screen for changing the irradiation conditions of the charged particle beam or checking the contrast of the image obtained by the charged particle beam irradiation,
A "chip matrix" screen for entering the chip size and arrangement of chips formed on the wafer,
"Alignment" screen for setting various conditions on the alignment of the irradiation means and performing alignment,
"Cell area" screen for setting the memory cell area in the chip,
"Inspection area" screen for designating an inspection area on the wafer,
"Calibration" screen, which specifies the brightness adjustment pattern and executes the brightness adjustment
"Trial inspection" screen to acquire a small area image and determine the defect detection threshold,
A wafer inspection apparatus including one of a "final trial inspection" screen for confirming the validity of a threshold value including variations in the wafer surface.
Priority Applications (12)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34029798A JP4035242B2 (en) | 1998-11-30 | 1998-11-30 | Circuit pattern inspection method and inspection apparatus |
| US09/450,856 US6476913B1 (en) | 1998-11-30 | 1999-11-29 | Inspection method, apparatus and system for circuit pattern |
| US09/832,222 US6388747B2 (en) | 1998-11-30 | 2001-04-11 | Inspection method, apparatus and system for circuit pattern |
| US09/832,220 US6759655B2 (en) | 1998-11-30 | 2001-04-11 | Inspection method, apparatus and system for circuit pattern |
| US09/832,217 US6480279B2 (en) | 1998-11-30 | 2001-04-11 | Inspection method, apparatus and system for circuit pattern |
| US09/832,218 US6567168B2 (en) | 1998-11-30 | 2001-04-11 | Inspection method, apparatus and system for circuit pattern |
| US09/832,219 US6421122B2 (en) | 1998-11-30 | 2001-04-11 | Inspection method, apparatus and system for circuit pattern |
| US10/115,079 US6504609B2 (en) | 1998-11-30 | 2002-04-04 | Inspection method, apparatus and system for circuit pattern |
| US10/116,059 US6919564B2 (en) | 1998-11-30 | 2002-04-05 | Inspection method, apparatus and system for circuit pattern |
| US10/116,134 US6493082B2 (en) | 1998-11-30 | 2002-04-05 | Inspection method, apparatus and system for circuit pattern |
| US10/287,706 US6903821B2 (en) | 1998-11-30 | 2002-11-05 | Inspection method, apparatus and system for circuit pattern |
| US11/931,856 US7957579B2 (en) | 1998-11-30 | 2007-10-31 | Pattern inspection method and apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34029798A JP4035242B2 (en) | 1998-11-30 | 1998-11-30 | Circuit pattern inspection method and inspection apparatus |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005346042A Division JP4177375B2 (en) | 2005-11-30 | 2005-11-30 | Circuit pattern inspection method and inspection apparatus |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000161932A JP2000161932A (en) | 2000-06-16 |
| JP2000161932A5 true JP2000161932A5 (en) | 2006-03-02 |
| JP4035242B2 JP4035242B2 (en) | 2008-01-16 |
Family
ID=18335603
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34029798A Expired - Fee Related JP4035242B2 (en) | 1998-11-30 | 1998-11-30 | Circuit pattern inspection method and inspection apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4035242B2 (en) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4526661B2 (en) * | 2000-06-28 | 2010-08-18 | 株式会社日立製作所 | Inspection apparatus and inspection method |
| EP1179841A3 (en) * | 2000-07-07 | 2004-10-06 | Leica Microsystems Jena GmbH | Graphical User Guidance Method and Apparatus for the Optical Measurement of Layers and Substrates and Software |
| JP4253189B2 (en) * | 2001-02-16 | 2009-04-08 | 周司 宮崎 | User interface for semiconductor evaluation equipment |
| JP2002303586A (en) | 2001-04-03 | 2002-10-18 | Hitachi Ltd | Defect inspection method and defect inspection device |
| JP2004349515A (en) | 2003-05-23 | 2004-12-09 | Hitachi High-Technologies Corp | Sem-aided appearance inspection apparatus, review apparatus, and alignment coordinate setting method |
| US9002497B2 (en) * | 2003-07-03 | 2015-04-07 | Kla-Tencor Technologies Corp. | Methods and systems for inspection of wafers and reticles using designer intent data |
| JP5180428B2 (en) * | 2005-06-21 | 2013-04-10 | 株式会社日立ハイテクノロジーズ | Imaging recipe creation apparatus and method for scanning electron microscope, and semiconductor pattern shape evaluation apparatus |
| JP4654093B2 (en) | 2005-08-31 | 2011-03-16 | 株式会社日立ハイテクノロジーズ | Circuit pattern inspection method and apparatus |
| JP4953427B2 (en) * | 2006-06-21 | 2012-06-13 | 東京エレクトロン株式会社 | Substrate processing apparatus, display method, recording medium, and program |
| US7898653B2 (en) | 2006-12-20 | 2011-03-01 | Hitachi High-Technologies Corporation | Foreign matter inspection apparatus |
| JP5090725B2 (en) * | 2006-12-20 | 2012-12-05 | 株式会社日立ハイテクノロジーズ | Foreign matter inspection device |
| JP2009175001A (en) * | 2008-01-24 | 2009-08-06 | Fuji Electric Systems Co Ltd | Defect inspection apparatus |
| JP2009300426A (en) * | 2008-05-16 | 2009-12-24 | Nuflare Technology Inc | Reticle defect inspection device and reticle defect inspection method |
| JP5286004B2 (en) * | 2008-09-12 | 2013-09-11 | 株式会社日立ハイテクノロジーズ | Substrate inspection apparatus and substrate inspection method |
| JP5154527B2 (en) * | 2009-09-16 | 2013-02-27 | 株式会社日立ハイテクノロジーズ | Foreign matter inspection device |
| JP5520135B2 (en) * | 2010-05-21 | 2014-06-11 | パナソニック デバイスＳｕｎｘ株式会社 | Image processing device |
| JP5163731B2 (en) * | 2010-12-06 | 2013-03-13 | 株式会社日立製作所 | Defect candidate image display method |
| JP5710314B2 (en) * | 2011-02-25 | 2015-04-30 | 株式会社東芝 | Mask inspection method and apparatus |
| JP6579682B2 (en) * | 2014-07-18 | 2019-09-25 | 株式会社ミツトヨ | Image measuring device |
| JP2019145304A (en) * | 2018-02-20 | 2019-08-29 | 株式会社日立ハイテクサイエンス | Charged particle beam device, stage driving range limiting method for charged particle beam device, and program |
-
1998
- 1998-11-30 JP JP34029798A patent/JP4035242B2/en not_active Expired - Fee Related
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