JP2000156970A - Switching power source circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the circuit scale of a voltage compensation circuit in a power source circuit, which is provided with the voltage compensation circuit and obtains a plurality of output voltages. SOLUTION: Two power source main circuits 44, 47, control circuits 45, 48 and drive circuits 46, 49 are installed, and a voltage compensation circuit 74 which compensates for the decrease in an input voltage VB is installed in common with the drive circuits 46, 49. The control circuit 45 and 48 make error amplifiers 64, 71 operate in opposite phase, and make comparators 67, 73 operate in the opposite phase. With respect to the reference level of 50% on which a triangular wave signal SC is divided, a clamp circuit 65 limits a voltage-setting signal S1a so as not to be lower than or equal to the reference level. A clamp circuit 72 limits a voltage-setting signal S2a so as not to be equal to or higher than the reference level. As a result, on-periods of FETs 53 and 57 will not overlap, and current supply capability of the circuit 74 can be reduced, and a chip area which is occupied in an IC 83 by the circuit 74 can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a switching power supply circuit capable of outputting a plurality of voltages.

[0002]

2. Description of the Related Art In recent years, a power supply voltage of a microcomputer (hereinafter referred to as a microcomputer) has been gradually reduced from 5 V, which has been conventionally used, to 3.3 V or 2.5 V, for example, in response to a demand for lowering the voltage. It is in. Also, the operating frequency of microcomputers tends to increase year by year due to demands for higher speeds. Along with this, switching regulators (hereinafter referred to as switching power supplies) have become mainstream in power supply circuits of microcomputers instead of series regulators having relatively large heat loss. In this case, set the output voltage of the switching power supply slightly higher than the power supply voltage of the microcomputer,
By further stabilizing this output voltage with a series regulator, a more stable power supply voltage with less switching noise can be supplied to the microcomputer.

On the other hand, the power supply voltage of a sensor or the like is still often 5V. Therefore, in a system including a microcomputer and a sensor having different power supply voltage specifications, when the output voltage of the switching power supply is stabilized by a series regulator, the output voltage must be set to, for example, 6 V or more in accordance with the highest power supply voltage specification. is there. At this time, the power supply voltage of the microcomputer is, for example, 2.5 V
In this case, the series regulator used in the power supply circuit of the microcomputer generates an input / output voltage difference of about 3.5 V, and the heat loss becomes extremely large. Therefore, in such a case, two switching power supplies are provided, and one output voltage is set to, for example, 4 V for the microcomputer, and the other output voltage is set to, for example, 6 V for the sensor. .

On the other hand, for example, in a switching power supply used in a vehicle-mounted control device, the driving of the switching element is performed so that the on-resistance of the switching element does not increase or the on-operation does not fail when the battery voltage as the power supply drops. In some cases, a voltage compensation circuit for compensating the voltage level is provided.

FIG. 6 shows an example of a two-output switching power supply circuit having such a voltage compensation circuit. In FIG. 6, power supply circuits 4 and 5 for a microcomputer and a sensor are connected to an input terminal IN via a filter circuit 3 including a coil 1 and a capacitor 2. The power supply circuit 4 is a P-channel MOSFET
6, a step-down chopper circuit 10 including a flywheel diode 7, a coil 8, and a capacitor 9, a detection circuit 13 for an output voltage V1 including resistors 11 and 12, and an error amplifier to which the detection voltage V1s and a reference voltage V1r are input. 14, a comparator 15, a driving circuit 16 for driving the FET 6, and a voltage compensation circuit 17.

Similarly, power supply circuit 5 includes P-channel M
A step-down chopper circuit 22 including an OSFET 18, a flywheel diode 19, a coil 20, and a capacitor 21, and an output voltage V2 including resistors 23 and 24.
A detection circuit 25, an error amplifier 26 to which the detection voltage V2s and the reference voltage V2r are input, a comparator 27, and the FE
Drive circuit 28 for driving T18, and voltage compensation circuit 2
9. The comparators 15 and 27 also output a common triangular wave signal Sc from the triangular wave generation circuit 30.
Is given.

When the DC voltage VB input to the input terminal IN falls to a voltage level that is insufficient to drive the FETs 6 and 18 with a low on-resistance, the voltage compensating circuits 17 and 29 become negative voltage. Perform a boost operation to generate
The negative boosted voltage is supplied to the driving circuits 16 and 28.

According to the above configuration, voltage stabilization control by PWM control is performed, and output voltages V1 of 4V and output voltages V of 6V from output terminals OUT1 and OUT2, respectively.
You can get 2. Further, even when the input DC voltage VB decreases, the FETs 6 and 18 can be driven in a low on-resistance state by the operation of the voltage compensation circuits 17 and 29.

[0009]

In the case where the above-described configuration is to be configured as a one-chip IC, the power supply circuits 4 and 5 are to be built. Are voltage compensation circuits 17 and 29. In this case, the voltage compensation circuits 17, 29
Is configured by a charge pump circuit,
The area of the capacitor portion is required by an amount corresponding to the magnitude (current capacity) of the instantaneous output current from the charge pump circuit.

Therefore, even when the voltage compensating circuits 17 and 29 are integrated as one voltage compensating circuit on the circuit, a capacitor capacity is obtained that is the sum of the current capacities of both the power supply circuits 4 and 5. Area is needed. For this reason, when viewed from the point of the chip area, it does not lead to a large space saving, and it is difficult to avoid a cost increase.

The present invention has been made in view of the above circumstances, and has as its object to reduce the circuit scale of a voltage compensation circuit in a power supply circuit having a voltage compensation circuit and obtaining a plurality of output voltages. A switching power supply circuit is provided.

[0012]

To achieve the above object, the means described in claim 1 can be employed. According to this means, when the drive circuit drives the switching element based on, for example, an input voltage (eg, a battery voltage) to the power conversion circuit, the input voltage decreases and the drive voltage level becomes sufficient for the switching element. When the drive voltage level drops to a level where it cannot be turned on, the drive voltage level is compensated by the voltage compensation circuit. That is, the voltage compensation circuit performs a boosting operation or the like based on the input voltage or the like and generates a voltage that can sufficiently turn on the switching element.

Since the switching power supply circuit includes a plurality of single output power supply circuits, the number of drive circuits connected to the voltage compensation circuit as a load is also plural. Then, while the drive circuit outputs a drive voltage for turning on the switching element, an operation current is supplied from the voltage compensation circuit to the drive circuit. In this case, according to the control circuit of the present means, the switching operation is controlled by setting the ON period of the switching element within the range of the OFF period of the other switching elements. The instantaneous value of the operating current does not exceed the instantaneous value of the operating current for one drive circuit.

Therefore, even when the voltage compensating circuit compensates for the driving voltages of the plurality of driving circuits, the switching operation is controlled so that the ON periods of the switching elements do not overlap, so that the current supply of the voltage compensating circuit is controlled. There is no need to increase the capacity, and the circuit used for one single output power supply circuit can be used with the same circuit scale. Thereby, in configuring a switching power supply having a plurality of output voltages, the design cost and the manufacturing cost of the voltage compensation circuit can be reduced. When the voltage compensating circuit is formed into an IC together with the control circuit and the driving circuit, the voltage compensating circuit, for example, the charge pump circuit occupies a large chip area according to the current supply capability. According to the unnecessary means, the chip area can be reduced and the cost can be reduced.

According to the second aspect, the two control circuits feedback the output voltage of the power conversion circuit to control the duty ratio of the control signal, so that the output voltage of each power conversion circuit is equal to the reference voltage. Is controlled to be equal to Further, the two control signal generation circuits are configured to divide one (positive side) part and the other part of the carrier signal when the commonly applied carrier signal is divided into two at a reference level (for example, 50% level) under the constant voltage control. Since the control signal is generated using the (negative side) portion, the two control signals do not simultaneously turn on the switching element. This means can be realized by limiting the range of use of the carrier signal to the positive side or the negative side, as compared with the conventional means for controlling the duty ratio of the control signal to make the voltage constant, so that a major design change is required. The circuit configuration is easy to adopt without using.

According to a third aspect of the present invention, each of the two control circuits includes one (positive side) of the carrier signal.
A clamp circuit is provided for limiting the control signal to a predetermined duty ratio within the range of the maximum duty ratio (for example, 50%) that the control signal can take for the portion and the other (negative side) portion. Thereby, regardless of the result of the constant voltage control, it is possible to reliably prevent the two switching elements from being simultaneously turned on.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment in which the present invention is applied to a step-down chopper type switching power supply circuit will be described below with reference to FIGS. FIG. 1 schematically shows an electrical configuration of a switching power supply circuit used as a power supply of a vehicle-mounted control device, for example. In FIG. 1, the switching power supply circuit 41 is composed of two power supply circuits (corresponding to a single output power supply circuit according to the present invention) 42 and 43. The input terminal IN of the switching power supply circuit 41 is supplied with, for example, a DC input voltage VB based on the voltage of a battery (not shown). The input voltage VB has a characteristic that varies within a range of, for example, 0 V to 35 V depending on the state of the battery. The output terminal O of the power supply circuit 42
The UT1 and the output OUT2 of the power supply circuit 42 are connected to power supply terminals of a microcomputer and various sensors (neither is shown) provided in the in-vehicle control device via a series regulator (not shown).

The power supply circuits 42 and 43 have substantially the same circuit configuration. The power supply circuit 42 includes a power supply main circuit (corresponding to a power conversion circuit in the present invention) 44 configured as a step-down chopper circuit, and an output voltage V1 of the power supply main circuit 44.
, For example, at a constant voltage of 4 V, and a drive circuit 46. The power supply circuit 43
Is the power supply main circuit 47, and the output voltage V of the power supply main circuit 47.
2 comprises a control circuit 48 for constant voltage control of, for example, 6 V, and a drive circuit 49.

The two power supply main circuits 44, 4 are connected to an input terminal IN via an L-type filter circuit 52 for preventing radio noise, which is composed of a coil 50 and a capacitor 51.
7 is connected. The power supply main circuit 44 includes a P-channel MOSFET 53 serving as a switching element, a flywheel diode 54, a coil 55 serving as a low-pass filter, and a capacitor 56.
The output terminal of the filter circuit 52 is connected to the output terminal OUT1 between the source and the drain of the FET 53 and the coil 55.
It is connected to the. A flywheel diode 54 having an anode on the ground terminal side is connected between the drain of the FET 53 and the ground terminal, and the output terminal OU
A smoothing capacitor 56 is provided between T1 and the ground terminal.
Is connected. On the other hand, the power supply main circuit 47 also
The P-channel MOSFET 57, the flywheel diode 58, the coil 59, and the capacitor 60 are connected in the same manner as the power supply main circuit 44.

The control circuit 45 includes a voltage detection circuit 63 composed of feedback resistors 61 and 62 connected in series between the output terminal OUT1 and the ground terminal, and a detection voltage V1s obtained from the voltage detection circuit 63. Amplifier (corresponding to a deviation calculation circuit according to the present invention) 64 for amplifying a voltage deviation between the reference voltage V1r (a voltage corresponding to the output voltage V1 (eg, 4 V)), and a voltage setting signal output from the error amplifier 64 The level of the triangular wave signal Sc output as a carrier signal from the clamp circuit 65 for limiting the size of S1a and the triangular wave generating circuit (corresponding to the carrier signal generating circuit in the present invention) 66 and the voltage setting signal S1a are compared. (A control signal generation circuit according to the present invention) 67 which outputs a control signal S1b. Here, the error amplifier 64 is configured such that the detection voltage V1s is input to its non-inverting input terminal, and the reference voltage V1r is input to its inverting input terminal. The comparator 67 has a voltage setting signal S at its non-inverting input terminal.
1a is input, and a triangular wave signal Sc is input to its inverting input terminal.

The control circuit 48, like the control circuit 45,
A voltage detection circuit 70 including resistors 68 and 69 connected in series between the output terminal OUT2 and the ground terminal;
An error amplifier 71 for amplifying a voltage deviation between a detection voltage V2s obtained from the voltage detection circuit 70 and a reference voltage V2r (a voltage corresponding to an output voltage V2 (for example, 6 V)), and a voltage setting signal output from the error amplifier 71 It comprises a clamp circuit 72 for limiting the magnitude of S2a, and a comparator 73 for comparing the level of the triangular wave signal Sc with the voltage setting signal S2a and outputting a control signal S2b. Here, the error amplifier 71 is configured such that the detection voltage V2s is input to its inverting input terminal and the reference voltage V2r is input to its non-inverting input terminal. The comparator 73 has an inverting input terminal to which the voltage setting signal S2a is input and a non-inverting input terminal to which the triangular wave signal Sc is input.

As described above, the control circuits 45 and 48 perform operations in which the operation of the error amplifier 64 with respect to the input signals V1s and V1r and the operation of the error amplifier 71 with respect to the input signals V2s and V2r are inverted with respect to each other. It is characterized in that the operation for the signals S1a and Sc and the operation for the input signals S2a and Sc of the comparator 73 are inverted operations.

The drive circuits 46 and 49 amplify the control signals S1b and S2b output from the comparators 67 and 73, respectively, to generate drive voltages to be applied to the gate terminals of the FETs 53 and 57. In order to compensate for the decrease in the drive voltage, a common voltage compensation circuit 74 is provided for the drive circuits 46 and 49.

The voltage compensating circuit 74 is constituted, for example, as a charge pump circuit shown in FIG. This figure 2
, The output terminal of the inverter circuit 75 is connected to the ground terminal via the capacitor 76 and the forward diode 77, and the output terminal of the inverter 78 connected in series with the inverter circuit 75 is connected to the capacitor 79 and the forward diode. And 80 is connected to the anode of the diode 77. A capacitor 81 and a forward diode 82 are connected in series between the ground terminal and the anode of the diode 80, and the anode of the diode 82 is used as an output terminal.

The control circuits 45 and 48, the driving circuits 46 and 49, and the voltage compensating circuit 74 are configured as a single monolithic IC 83.
The power supply voltage for operating the IC is generated by a built-in power supply circuit (not shown) provided inside the IC 83.

Next, the operation of the present embodiment will be described with reference to FIG. First, when an input voltage VB of a predetermined voltage (for example, 3 V) or more is applied to the input terminal IN, the IC
83 becomes operable. The power conversion operation related to the step-down of the power supply main circuit 44 at this time is, as is well known, F
When the ET 53 is turned on, power is supplied to a load (microcomputer via a series regulator) and current energy is stored in the coil 55. When the FET 53 is turned off, the current energy is transferred to the capacitor 56 via the diode 54. . This power conversion operation is the same for the power supply main circuit 47.

FIG. 3 is a timing chart showing the operation of the control circuits 45 and 48 for controlling the power supply main circuits 44 and 47. The output voltage V1 of the power supply circuit 42 is divided by the resistors 61 and 62 of the voltage detection circuit 63 and input to the error amplifier 64 as a detection voltage V1s. The error amplifier 64 obtains a voltage deviation by subtracting the reference voltage V1r from the detection voltage V1s, amplifies the voltage deviation, and outputs a voltage setting signal S1a.

The comparator 67 outputs the voltage setting signal S
1a and the triangular wave signal Sc are input, the two signal levels are compared as shown in FIG. 3A, and the result is compared with the control signal S1b.
Output as That is, the control signal S1b is as shown in FIG.
As shown in FIG. 7, when the level of the voltage setting signal S1a is equal to or higher than the level of the triangular wave signal Sc, the FET 53 is turned off when the level of the voltage setting signal S1a is lower than the level of the triangular wave signal Sc. Level.

Therefore, for example, when the detection voltage V1s (that is, the output voltage V1) is higher than the reference voltage V1r, the level of the voltage setting signal S1a becomes higher, and the L level period of the control signal S1b becomes narrower. As a result, the ON period of the FET 53 is shortened, and the rise of the output voltage V1 is suppressed. This PWM
By the feedback control using the control method, the output voltage V1 is kept at a constant voltage (4 V).

The control operation described above is substantially the same for the control circuit 48. However, in the control circuit 48, the error amplifier 71 changes the detection voltage V2s from the reference voltage V2r.
Is subtracted to obtain a voltage deviation. As shown in FIG. 3C, the control signal S2b output from the comparator 73 is such that the level of the voltage setting signal S2a is the triangular wave signal S2b.
It goes low when the level exceeds c, and goes high when the level of the voltage setting signal S2a falls below the level of the triangular wave signal Sc.

Here, focusing on the control signals S1b and S2b, the L-level periods of the two signals are shifted by a half cycle of the triangular wave signal Sc and do not overlap.
It can be seen that T53 and 57 are not simultaneously turned on. This is because the error amplifiers 64 and 71 and the comparators 67 and 73 were operated in an inverted state (an opposite phase state). At this time, in order to ensure that the L-level periods of the control signals S1b and S2b do not always overlap, the possible duty ratio of the control signals S1b and S2b (the L-level period for one cycle T of the triangular wave signal Sc) is further increased. For example, it is necessary to limit each other to 50% or less.

Therefore, clamp circuits 65 and 72 are provided to perform this restriction. That is, the triangular wave signal Sc is divided into two at a reference level (for example, 50% level) indicated by a dashed line in FIG. 3A, and the clamp circuit 65 prevents the voltage setting signal S1a from falling below the reference level (negative side). The clamp circuit 72 limits the voltage setting signal S2a so that it does not exceed the reference level (positive side). As a result, both the control circuits 45 and 48
7 is switched within the range of the duty ratio of 0 to 50%, so that the constant voltage control can be performed while avoiding that the FETs 53 and 57 are simultaneously turned on.

The control signals S1b and S2b are applied as drive voltages to the gate terminals of the FETs 53 and 57 via drive circuits 46 and 49, respectively. FET53,5
No. 7 has a characteristic that when the gate-source voltage drops to, for example, 5 V or less in the ON state, the ON resistance increases and the drain loss increases. Therefore, the negative voltage VP (<0) from the input voltage VB by the charge pump operation.
Is used. The voltage compensating circuit 74 includes a boosting operation control circuit (not shown) for operating or stopping the charge pump operation according to the input voltage VB.

That is, when the input voltage VB is equal to or higher than a predetermined voltage (for example, 8 V), the voltage compensating circuit 74 stops the charge pump operation, and the driving circuits 46 and 49 respond to the L level of the control signals S1b and S2b. Then, a drive voltage of approximately 0 V is output to the gate terminal (the gate-source voltage is V
B) In response to the H level of the control signals S1b and S2b, a drive voltage of VB is output to the gate terminal (0 V as a gate-source voltage). On the other hand, when the input voltage VB is lower than the predetermined voltage, the voltage compensating circuit 74 performs a charge pump operation, and the driving circuits 46 and 49 operate according to the L level of the control signals S1b and S2b. A drive voltage having a negative voltage VP is output to the gate terminal (the gate-source voltage is VB -VP), and the control signals S1b and S2b are set to H level.
A drive voltage of VB is output to the gate terminal in accordance with the level (the voltage between the gate and the source is 0 V). As a result, even when the input voltage VB decreases, the drive circuits 46 and 49 can apply a drive voltage sufficient to turn on the gate terminals of the FETs 53 and 57.
It is possible to prevent an increase in drain loss of 57 and stop of the switching operation.

The voltage compensating circuit 74 operates by inputting a rectangular wave having an appropriate frequency (for example, 1 MHz) to the input terminal of the inverter circuit 75 (see FIG. 2).
At this time, each time the voltage level of the rectangular wave alternates between 0 V and the voltage VB, the diodes 77, 80, and 82 alternately turn on and off, and the charge of the capacitor 76 is sequentially transferred to the capacitors 79 and 81. Pump operation is performed. Although the charge pump circuit shown in FIG. 2 has a two-stage configuration, three-stage, four-stage,
... You may increase it.

As described above, the voltage compensating circuit 74 having the form of the charge pump circuit includes the capacitors 76, 79, 81
Performs a negative boosting operation, and has a characteristic that the boosted voltage decreases as its output current, particularly its instantaneous value, increases. Therefore, when the two FETs 6 and 18 are simultaneously turned on as in the switching power supply circuit shown in FIG. 6, whether the voltage compensating circuits 17 and 29 as charge pump circuits are provided for each of the driving circuits 16 and 28,
Alternatively, it is necessary to provide a common voltage compensation circuit having twice the current supply capacity.

On the other hand, the switching power supply circuit 4
1, the two FETs 53 and 57 do not turn on at the same time.
(Or 43) is sufficient, and the voltage compensating circuit 17 (or 29) conventionally used as the voltage compensating circuit 74 can be used with almost the same circuit scale (FIG. 3D). reference). Therefore, the capacitance of the capacitors 76, 79, 81 is only about half of the total capacitance used for the voltage compensation circuits 17 and 29 shown in FIG. 6, and the chip area of the IC 83 can be reduced. .

As described above, according to the present embodiment,
A common voltage compensation circuit 74 is provided to prevent the on-level of the drive signals output from the drive circuits 46 and 49 from lowering, and the control circuits 45 and 48 are respectively connected to the reference circuits 45 and 48 in order to avoid simultaneous ON states of the FETs 53 and 57. It is characterized in that a constant voltage control is performed using the triangular wave signal SC divided into two levels.

As a result, the voltage compensating circuit 74 does not need to supply current to the driving circuits 46 and 49 at the same time. Therefore, even if the number of driving circuits is two, it is not necessary to increase the current supplying capability and reduce the cost. Can be achieved. In particular, when the voltage compensating circuit 74 is formed into an IC, the chip area can be largely saved, and the effect of cost reduction is great.

(Second Embodiment) Next, a second embodiment in which the first embodiment is modified will be described with reference to FIGS. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, description thereof will be omitted, and different components will be described below. FIG. 4 schematically shows an electrical configuration of the switching power supply circuit. In FIG. 4, the switching power supply circuit 84 includes the above-described power supply circuit 42 and a power supply circuit 85 which are single output power supply circuits.

In the control circuit 86 of the power supply circuit 85, the error amplifier 71 is configured such that the detection voltage V2s is input to its non-inverting input terminal, and the reference voltage V2r is input to its inverting input terminal. Further, the comparator 73
Has a voltage setting signal S2a input to its non-inverting input terminal and a triangular wave signal Sc to its inverting input terminal.
7, the inverted triangular wave signal Sc 'is input. Further, the clamp circuit 88 limits the voltage setting signal S2a so as not to be lower than a reference level (for example, 50% level) when the triangular wave signal Sc 'is divided into two (see FIG. 5C).

According to the above configuration, the operation of the error amplifier 71 with respect to the input signals V2s and V2r has the same phase as the operation of the error amplifier 64 with respect to the input signals V1s and V1r, and the input signal S2a and Sc of the comparator 73 with respect to the input signals S2a and Sc. The operation has the same phase as the operation of the comparator 67 for the input signals S1a and Sc. Therefore, the constant voltage control of the control circuit 86 is performed in the same manner as the constant voltage control of the control circuit 45 described above.

However, in the control circuits 86 and 45, the triangular wave signals Sc 'and Sc used have an opposite phase relationship. Therefore, as shown in the timing chart of FIG. 5, the L-level period of the control signals S2b and S1b is set to 1
There is no overlap with each other with a shift of / 2 period. Therefore,
Even with the above configuration, the FETs 53 and 57 are not simultaneously turned on, and the first
The same operation and effect as those of the embodiment can be obtained.

(Other Embodiments) The present invention is not limited to the above embodiments, but can be modified or expanded as follows. Power supply main circuit 4
Although step-down chopper circuits are used as 4 and 47, a step-up chopper circuit or an insulated power supply circuit having a switching transformer may be used. Further, the same can be applied to the case where an N-channel MOSFET is used as the switching element.

Although the control circuits 45, 48, and 86 are configured to perform constant voltage control, the present invention can be similarly applied to a case where the control circuits are configured to perform constant current control. Also, the control method is not limited to the PWM control method as long as the switching elements are controlled so that their ON periods do not overlap. In this case, a control unit for performing time-division control of the ON period of each switching element may be newly provided.

The switching power supply circuits 41 and 84 are
Each power supply circuit is composed of two power supply circuits, but may be composed of three or more power supply circuits. Although the switching power supply circuits 41 and 84 use a 50% level as a reference level for dividing the triangular wave signal Sc into two, other reference levels may be used in consideration of the capability of each power supply circuit.

The driving circuits 46 and 49 are configured to output a driving voltage using the input voltage VB, and use a voltage compensating circuit 74 for the purpose of compensating for a reduction in the gate voltage due to the reduction in the input voltage VB. . However, the driving circuit 46,
49 may be configured to output a drive voltage by using a voltage of another system other than the input voltage VB. In this case, the purpose of compensating for a decrease in the gate voltage, or selecting an optimum gate voltage from a high voltage. Voltage compensation circuit 7 depending on the purpose of generation
4 can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic electrical configuration diagram of a switching power supply circuit according to a first embodiment of the present invention.

FIG. 2 is an electrical configuration diagram of a voltage compensation circuit.

FIG. 3 is a timing chart for explaining the operation of the control circuit;

FIG. 4 is a view corresponding to FIG. 1, showing a second embodiment of the present invention;

FIG. 5 is a diagram corresponding to FIG. 3;

FIG. 6 is a diagram corresponding to FIG. 1 showing a conventional configuration.

[Explanation of symbols]

41, 84 are switching power supply circuits, 42, 43, 85
Is a power supply circuit (single output power supply circuit), 44 and 47 are power supply main circuits (power conversion circuits), 45, 48 and 86 are control circuits,
6 and 49 are drive circuits, 53 and 57 are MOSFETs (switching elements), 63 and 70 are voltage detection circuits, 64 and 7
1 is an error amplifier (deviation operation circuit), 65, 72, 88
Is a clamp circuit, 66 is a triangular wave generation circuit (carrier signal generation circuit), 67 and 73 are comparators (control signal generation circuits), and 74 is a voltage compensation circuit.

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 5H410 BB02 BB04 CC02 CC10 DD02 DD09 EA11 EA37 EB09 EB12 EB15 EB28 EB37 FF03 FF25 HH02 5H730 AA15 AS01 AS19 BB13 BB82 BB89 CC14 CC21 DD04 DD26 EE08 EE10 EE59 FF16

Claims (3)

[Claims] 1. A power conversion circuit comprising a switching element and performing power conversion in accordance with the switching operation, a control circuit controlling a switching operation of the switching element so that an output of the power conversion circuit becomes a predetermined output, and a control circuit A switching power supply circuit including a plurality of single-output power supply circuits each including a drive circuit configured to drive the switching element according to a control signal output from the circuit; A voltage compensating circuit for compensating the voltage to a level that can be sufficiently turned on, wherein the control circuit controls the switching operation by setting an on period of the switching element within a range of an off period of another switching element. A switching power supply circuit having a configuration. 2. A switching power supply circuit comprising two single output power supply circuits, wherein the control circuit comprises: a voltage detection circuit for detecting an output voltage of the power conversion circuit; and a detection voltage of the voltage detection circuit. A deviation calculation circuit for calculating a difference from the reference voltage; and a control signal generation circuit for comparing the output signal of the deviation calculation circuit with a carrier signal to generate a control signal. A carrier signal generating circuit for generating a given carrier signal; wherein the two control signal generating circuits are provided for one of two positive and negative carrier signals obtained by comparing the carrier signal with a reference level; 2. The switching power supply circuit according to claim 1, wherein each of the switching power supply circuits is configured to generate the control signal based on the control signal. 3. The switching power supply circuit according to claim 2, wherein each of the two control circuits includes a clamp circuit for limiting a control signal to a predetermined duty ratio.