JP2000156459A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, where a fine connection is easily made to realize a semiconductor device of high performance. SOLUTION: Adhesive agent 6 is applied on a semiconductor wafer 2 formed of a first semiconductor chip 1 so as not to cover an inner electrode 5 and an outer electrode 4, and a second semiconductor chip 7 is installed facing downward on the first semiconductor chip 1 so as to make inner electrodes 5 and 8 coincident with each other. After the adhesive agent 6 is cured, the semiconductor chip 7 bonded to the semiconductor wafer 2 is dipped into an electroless plating liquid tank 11, and an electroless plating liquid 10 is made to permeate the spacing between the semiconductor chip 7 and the semiconductor wafer 2. The inner electrode 6 of the first semiconductor chip 1 and the inner electrode 8 of the second semiconductor chip 7 are electrically connected together with a deposited metal 12 separated out from the electrode 5 and 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a first semiconductor chip having a first LSI and a second semiconductor chip having a second LSI.
The present invention relates to a method for manufacturing a semiconductor device in which a semiconductor chip is connected in a face-down manner.

[0002]

2. Description of the Related Art In recent years, in order to reduce the cost and size of LSI semiconductor devices, L
SI or LS formed by different processes
There has been proposed a semiconductor device in which semiconductor chips having I are joined in a face-down manner.

Hereinafter, a conventional LSI semiconductor device will be described.
This will be described with reference to FIG. First, a first internal electrode 111 and a bonding pad 112 are formed on a first semiconductor chip 110, and a second internal electrode 121 and a bump 122 made of solder are formed on a second semiconductor chip 120. Are electrically connected to each other. An insulating resin 130 is filled between the first semiconductor chip 110 and the second semiconductor chip 120, and the first semiconductor chip 110 and the second semiconductor chip 120 are connected to the bump 122 and the insulating resin 130. They are integrated by a resin 130.

The first semiconductor chip 110 is fixed to the die pad 131 of the lead frame with resin, and the bonding pad 112 of the first semiconductor chip 110 and the external lead 132 of the lead frame are connected via bonding wires 133. And are electrically connected. First semiconductor chip 110, second semiconductor chip 1
20, a part of the bonding wire 133, the die pad 131, and the external lead 132 are packaged with a sealing resin 135.

Hereinafter, a method of manufacturing the semiconductor device will be described with reference to FIGS.

First, as shown in FIG. 4 and FIG.
Bumps 1 on the internal electrodes 121 of the semiconductor chip 120
22 is formed. Next, when the first semiconductor chip 110 is in a wafer state, the solder bumps 1 on the second semiconductor chip 120 are formed.
The second semiconductor chip 120 is mounted on the first semiconductor chip 110 by matching the inner electrode 22 with the internal electrode 111 of the first semiconductor chip 110. Thereafter, the solder bumps 122 are melted by heating, and the internal electrodes 121 of the second semiconductor chip 120 and the internal electrodes 111 of the first semiconductor chip 110 are melted.
And are joined by soldering. Next, the first semiconductor chips 110 are individually divided from the wafer state. Finally, the first semiconductor chip 110 is die-bonded on the die pad 131 of the lead frame, and the bonding pad 112 of the first semiconductor chip 110 and the external lead 132 of the lead frame are connected by wire bonding. Packaged by

[0007]

However, according to the conventional method for manufacturing a semiconductor device, the connection between the first semiconductor chip and the second semiconductor chip is performed by soldering using solder bumps. There were issues to be shown.

(1) Since the solder is melted at the time of bonding, a dimensional change occurs in which the solder bumps spread in the horizontal direction, and miniaturization is difficult.

(2) Normally, the internal electrode of the semiconductor chip is A
Therefore, for solder bonding, it is necessary to form a metal film, such as Ti-Cu-Au, which easily diffuses with solder on the Al electrode, which is expensive.

(3) Since miniaturization is difficult, the internal electrodes of the first and second semiconductor chips are large, so that the electrical load capacity is increased, and the distance between the first semiconductor chip and the second semiconductor chip is increased. In signal transmission, delay is large and power consumption is large.

The present invention has been made in view of the above problems, and has as its object to provide a method of manufacturing a semiconductor device capable of facilitating fine connection and realizing a high-performance semiconductor device by solving the problems.

[0012]

Accordingly, an object of the present invention is to provide:
The first semiconductor chip and the second semiconductor chip face each other, are bonded and fixed with a gap therebetween, and connect internal electrodes by electroless plating to obtain a high-performance semiconductor device. A semiconductor chip having an internal electrode is provided on a surface of a semiconductor wafer having an external electrode and an internal electrode. The surface of the semiconductor chip and the surface of the semiconductor wafer face each other, and a gap is formed between the semiconductor wafer and the surface of the semiconductor chip. A step of bonding and fixing at a portion other than the external electrodes and the internal electrodes, and a step of electrically connecting the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer by electroless plating. It has become.

Preferably, the semiconductor wafer to which the semiconductor chips are bonded and fixed is immersed in an electroless plating solution to electrically connect the internal electrodes of the semiconductor chips and the internal electrodes of the semiconductor wafer by electroless plating. .

Preferably, the gap between the semiconductor chip and the semiconductor wafer to which the semiconductor chip is bonded and fixed is filled with the electroless plating solution without immersing the semiconductor wafer in the electroless plating solution. Thereby, the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating.

Preferably, an electroless plating solution is dropped on the surface of the semiconductor wafer to which the semiconductor chips are adhered and fixed, and the semiconductor wafer is rotated, so that the gap between the semiconductor chips and the semiconductor wafer is electroless. By filling a plating solution, the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating.

Preferably, the gap between the semiconductor chip and the semiconductor wafer to which the semiconductor chip is bonded and fixed is filled with the electroless plating solution without immersing the semiconductor wafer in the electroless plating solution. By heating the semiconductor wafer, the internal electrodes of the semiconductor chips and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating.

Further, a semiconductor chip having a rectangular internal electrode on a surface of a semiconductor wafer having an external electrode and a rectangular internal electrode is placed on the semiconductor wafer such that the internal electrode of the semiconductor wafer and the internal electrode of the semiconductor chip are orthogonal to each other. A step of bonding and fixing the surface of the chip and the surface of the semiconductor wafer facing each other, and with a gap between the surface of the semiconductor wafer and the surface of the semiconductor chip, except for the external electrodes and the internal electrodes, Electrically connecting the internal electrode of the semiconductor chip and the internal electrode of the semiconductor wafer by electroless plating.

Preferably, the vertical size of the rectangular internal electrode of the semiconductor wafer and the rectangular internal electrode of the semiconductor chip is 10 times or more the horizontal size.

With the above structure, the LSI can be face-down
Chip bonding uses metal deposition of electroless plating, and bonding of LSI chips on one side is performed in a wafer state, so that solder bumps for bonding do not spread, so fine connection is achieved. It can be realized at low cost and can be applied to a multi-pin LSI. In addition, since the internal electrodes to be connected are rectangular electrodes with a large aspect ratio and the electrodes are orthogonal to each other, bonding can be realized with fine positioning accuracy with loose electrodes, and the load capacity of the electrodes is small and high speed. Signal transmission becomes easy, and a highly functional module can be realized.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view for each step of a method for manufacturing a semiconductor device according to the present embodiment.

In FIG. 1, 1 is a first semiconductor chip,
2 is a semiconductor wafer made of the first semiconductor chip, 3 is a protective film of the semiconductor wafer, 4 is an external electrode of the first semiconductor chip, 5 is an internal electrode of the first semiconductor chip, 6 is an adhesive,
7 is a second semiconductor chip, 8 is an internal electrode of the second semiconductor chip, 9 is a protective film of the second semiconductor chip, 10 is an electroless plating solution, 11 is an electroless plating solution tank, and 12 is electroless plating. Deposited metal, 13 is a lead frame lead,
14 is a die pad of a lead frame, 15 is a bonding wire, 16 is a sealing resin, 17 is a collet, 18 is a vacuum hole of the collet, and 19 is a dicing groove.

In the method of manufacturing a semiconductor device according to the present embodiment, first, as shown in FIG. 1A, a second semiconductor chip 7 is mounted on a semiconductor wafer 2 comprising first semiconductor chips 1 and thereafter. An adhesive 6, such as epoxy, polyimide, or acrylic, is applied so as not to cover the internal electrode 5 and the external electrode 4 at the positions where they should be.

Next, as shown in FIG. 1B, the second semiconductor chip 7 is placed in a region of the semiconductor wafer 2 where the adhesive 6 is applied so that the internal electrodes 5 and 8 are aligned with a collet 17.
It is installed face down with vacuum suction.
Thereafter, the adhesive 6 is cured by heating through the collet 17, and the second semiconductor chip 7 is fixed on the semiconductor wafer 2. The heating temperature is about 100 ° C. to 300 ° C. The size of the internal electrodes 5 and 8 may be small because it is an electrode for connecting the second semiconductor chip 7 and the semiconductor wafer 2, and is about several [μm □] to about 100 [μm □]. At this time, the first semiconductor chip 1 and the second
Is between several [μm] and 100 [μm]. The adhesive 6 is prevented from flowing on the surfaces of the internal electrodes 5 and 8. By repeating this process, a plurality of first
Semiconductor chip 1 is fixed with an adhesive 6. Next, for example, when the internal electrodes 5 and 8 are aluminum (Al) and the metal to be deposited in the electroless plating performed later is nickel (Ni), the internal electrodes 5 and 8 are first immersed in a solution of nitric acid, phosphoric acid, or the like. 8 and the oxide film on the Al surface of the external electrode 4 are removed.

Next, as shown in FIG. 1C, the semiconductor wafer 2 to which the first semiconductor chip 1 has been bonded and fixed is immersed in an electroless plating solution bath 11. At this time, the electroless plating solution 10 enters the gap between the second semiconductor chip 7 and the semiconductor wafer 2. In the electroless plating solution 10, the metal to be deposited is Ni.
In this case, for example, a solution containing Ni sulfate or the like is used. Before immersion in the Ni electroless plating solution, the Al surfaces of the internal electrodes 5 and 8 are replaced with zinc or the like. In this embodiment, Ni will be described as the deposited metal 12.

Next, as shown in FIG. 1D, Ni, which is the deposited metal 12 deposited from the internal electrodes 5 and 8, is integrated with the internal electrode 5 of the first semiconductor chip 1 by the deposited metal 12. And the internal electrodes 8 of the semiconductor chip 7 are electrically connected. At this time, by further electrolessly plating gold (Au) on the surface of Ni, which is the deposited metal 12, the reliability can be improved, and the external electrodes 4 can be formed later.
When a bonding wire or the like is bonded thereon, the yield is very high. After immersion in each solution and treatment, the next treatment is performed after washing with a solution such as pure water. As described above, since the bonding is performed not by the conventional solder bumps but by the deposited metal 12 that is directly deposited on the Al electrode by electroless plating, the metal that causes the diffusion of solder in advance on the Al electrode is formed as in the conventional case. In addition, since all the chips can be joined together in a wafer state, productivity can be dramatically improved, and high-density connection can be realized at low cost.

Next, as shown in FIG. 1E, the semiconductor wafer 2 is diced and separated into first semiconductor chips 1. Here, before separation into the first semiconductor chip 1, probing is performed on the external electrodes 4, and a characteristic test can be performed in a state where the first semiconductor chip 1 and the second semiconductor chip 7 are joined.

Next, as shown in FIG. 1F, the first semiconductor chip 1 to which the second semiconductor chip 7 is bonded is die-bonded to the die pad 14 of the lead frame, and the first external electrode 4 and the lead frame are bonded. Are connected by a bonding wire 15 and finally sealed with a sealing resin 16 for packaging. At this time,
The sealing resin 16 is injected into the gap between the first semiconductor chip 1 and the second semiconductor chip 7 when the resin is injected into the mold. Further, the resin is injected into the gap between the first semiconductor chip 1 and the second semiconductor chip 7 by the sealing resin 16 of the package.
It may be performed before sealing a different resin with the sealing resin. Further, the sealing resin 16 may be in a state where the resin is not injected into the gap between the first semiconductor chip 1 and the second semiconductor chip 7.

Next, FIG. 2 is a cross-sectional view of each step of a method of manufacturing a semiconductor device when an electroless plating method different from the method shown in FIG. 1 of the embodiment of the present invention is used. That is, the present embodiment describes a method in which only the surface of the semiconductor wafer 2 is wet with the electroless plating solution and heated from below.

First, as shown in FIG.
The second semiconductor chip 7 is fixed on the semiconductor wafer 2 with the adhesive 6 in the same manner as described above.

Next, as shown in FIG. 2B, the surface of the semiconductor wafer 2 is coated with an electroless plating solution 10 by a dispenser 20.
The electroless plating solution 10 is injected into a gap between the second semiconductor chip 7 and the surface of the semiconductor wafer 2 by dropping. At this time, by dropping a sufficient amount of the electroless plating solution 10 on the semiconductor wafer 2, the electroless plating solution 10 easily enters the gap.

Next, as shown in FIG. 2C, the electroless plating solution 10 is heated from the back surface of the semiconductor wafer 2 with a hot plate 21 or the like. By leaving this state for a predetermined time, the metal 12 such as Ni is deposited on the internal electrode 8 of the second semiconductor chip 7 and the internal electrode 5 of the semiconductor wafer 2 as shown in FIG. The internal electrodes 8 of the second semiconductor chip 7 and the internal electrodes 5 of the semiconductor wafer 2 are electrically connected. Here, as a method of filling the gap between the second semiconductor chip 7 and the semiconductor wafer 2 with the electroless plating solution 10, the electroless plating solution 10 is dropped almost at the center of the semiconductor wafer 2 and the semiconductor wafer 2 is rotated. Accordingly, a method of filling the gap between the second semiconductor chip 7 and the semiconductor wafer 2 with the electroless plating solution 10 may be used.

Next, the electroless plating solution 10 is removed and washed with pure water. The electroless plating solution can be removed by immersing in pure water to replace the pure water, or by rotating the semiconductor wafer 2 at high speed to remove the electroless plating solution 1.
A method of shaking off 0 or the like is used. According to the second embodiment as described above, the amount of the electroless plating solution 10 required for the electroless plating for connecting the internal electrodes is very small, so that the cost is low.

Next, as a third embodiment of the present invention, a description will be given of a method for obtaining fine connections with rough positioning accuracy by making the shape of the internal electrodes rectangular, with reference to FIG. FIG. 3 shows that the second semiconductor chip 7 is
FIG. 4 is a top view of a state after the adhesive is fixed to the internal electrodes, and shows a state in which respective internal electrodes 5 and 8 are overlapped.

As shown in FIG. 3, the shape of the internal electrodes 5, 8 is a rectangle having an aspect ratio of 10 times or more, and the long sides of the internal electrodes 5, 8 are orthogonal to each other, and The second semiconductor chip 7 is bonded and fixed to the semiconductor wafer 2 as described in the above-described embodiment, so that the centers are substantially coincident with each other. At this time, the dimensions of the internal electrodes 5 and 8 are, for example, about 1 [μm] to 5 [μm] on the short side, and about 50 [μm] to 100 [μm] on the long side. With such a dimensional relationship, the positioning accuracy when bonding and fixing the second semiconductor chip 7 to the semiconductor wafer 2 is extremely large, about ± 20 μm to ± 45 [μm], and a simple positioning apparatus is used. Thus, the internal electrodes 5 and 8 can be easily matched with each other. Also, the area of the internal electrodes ^{5,8, 50 [μm 2] ~100} [μm 2] extent and because it very small compared conventional electrode 2500 from [[mu] m ^2] to 10000 [μm ^2], the internal electrodes electrically As a result, a high-speed electric signal can be easily transmitted, and power consumption can be reduced.

As described above, the method of manufacturing a semiconductor device according to the present embodiment comprises fixing another LSI to an LSI in a wafer state face-down with an adhesive, and joining the electrodes to each other with a metal deposited by electroless plating. Accordingly, fine bonding can be realized at low cost, and the electrodes can be rectangular electrodes having a large aspect ratio to reduce the load capacitance.

[0036]

As described above, according to the present invention, a metal deposition of electroless plating is used for joining an LSI chip face down, and the joining of the LSI chips is performed by one side of the LSI. By performing in the wafer state, solder bumps for bonding do not spread as in the past, so that fine connection can be easily performed at low cost, and a multi-pin LSI
It can be applied to Further, if the method of supplying the electroless plating solution is not dipping of the wafer but dropping on the wafer, the amount of the plating solution is not used, the plating tank is not required, and the cost can be reduced. In addition, since the internal electrodes to be connected are rectangular electrodes with a large aspect ratio and the electrodes are orthogonal to each other, bonding can be realized with fine positioning accuracy with loose electrodes, and the load capacity of the electrodes is small and high speed. Signal transmission becomes easy, and a high-performance module can be realized.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention, which is performed by each process.

FIG. 2 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention, which is performed by each process.

FIG. 3 is a top view showing a semiconductor device according to one embodiment of the present invention;

FIG. 4 is a sectional view showing a conventional semiconductor device.

FIG. 5 is a sectional view showing a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st semiconductor chip 2 Semiconductor wafer consisting of 1st semiconductor chip 3 Protective film of semiconductor wafer 4 External electrode of 1st semiconductor chip 5 Internal electrode of 1st semiconductor chip 6 Adhesive 7 2nd semiconductor chip 8 Internal electrode of second semiconductor chip 9 Protective film for second semiconductor chip 10 Electroless plating solution 11 Electroless plating solution tank 12 Deposited metal by electroless plating 13 Lead of lead frame 14 Die pad of lead frame 15 Bonding wire 16 Sealing Stop resin 17 Collet 18 Vacuum hole of collet 19 Dicing groove

Claims (7)

[Claims] 1. A semiconductor chip having an internal electrode on a surface of a semiconductor wafer having an external electrode and an internal electrode, wherein the surface of the semiconductor chip and the surface of the semiconductor wafer face each other, and the semiconductor wafer and the semiconductor chip are connected to each other. A step of bonding and fixing the parts except for the external electrodes and the internal electrodes in a state having a gap between the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer by electroless plating. A method of manufacturing a semiconductor device, comprising: connecting. 2. An electric connection between an internal electrode of the semiconductor chip and an internal electrode of the semiconductor wafer by electroless plating by immersing the semiconductor wafer to which the semiconductor chip is bonded and fixed in an electroless plating solution. The method for manufacturing a semiconductor device according to claim 1, wherein: 3. The method according to claim 1, wherein the step of filling the gap between the semiconductor chip and the semiconductor wafer of the semiconductor wafer to which the semiconductor chip is adhered and fixed is performed by filling the semiconductor wafer with the electroless plating solution without immersing the semiconductor wafer in the electroless plating solution. 2. The method according to claim 1, wherein the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating. 4. An electroless plating solution is dropped on a surface of a semiconductor wafer to which semiconductor chips are bonded and fixed, and the gap between the semiconductor chip and the semiconductor wafer is filled with the electroless plating solution by rotating the semiconductor wafer. The method according to claim 1, wherein the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating. 5. An electroless plating solution is filled in a gap between the semiconductor chip and the semiconductor wafer of the semiconductor wafer to which the semiconductor chip is bonded and fixed without dipping the semiconductor wafer in the electroless plating solution. The method according to claim 1, wherein the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer are electrically connected by electroless plating by heating the semiconductor chip. 6. A semiconductor chip having a rectangular internal electrode on a surface of a semiconductor wafer having an external electrode and a rectangular internal electrode, wherein said semiconductor chip has a rectangular internal electrode and the internal electrode of said semiconductor chip is orthogonal to said semiconductor chip. A step of bonding and fixing the surface of the semiconductor chip and the surface of the semiconductor wafer facing each other, and with a gap between the surface of the semiconductor wafer and the surface of the semiconductor chip, except for the external electrode and the internal electrode, Electrically connecting the internal electrodes of the semiconductor chip and the internal electrodes of the semiconductor wafer by electroless plating. 7. The method for manufacturing a semiconductor device according to claim 6, wherein the rectangular internal electrode of the semiconductor wafer and the rectangular internal electrode of the semiconductor chip have a vertical dimension not less than 10 times a horizontal dimension. .