JP2000138229A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress returning current which flows in a wafer and stabilize a wafer potential by forming a diode in a well region provided on a semiconductor wafer and connecting it to an output terminal of a pad. SOLUTION: An N-type embedded layer 6 is formed on a P-sub wafer 5 as a flywheel diode-forming region 10, a P-type well region 7 is formed in the region of the embedded layer 6, and an N-type diffused separating region 8 is formed ouside of the P region. The P region 7 is reverse baiseded through the connection of the diffusion-separated region 8 and the embedded layer 6 to a power line VDD, and a diode D formed internally is in a floating conditions and operates independently of the wafer 5. The potential fluctuation of the wafer 5 is suppressed by a returning current flowing from a ground pad 2a to a pad 2 through the diode D when the pad 2, in response to a drive-halt of a drive circuit 1, becomes a negative potential with respect to the ground GND by a counterelectromotive force of an inductance component or inertial current.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a coil component (inductance component) as a load, such as a motor drive circuit, a switching regulator, or a DC-DC converter, and supplying a current to the coil component. The present invention relates to a semiconductor device capable of suppressing a fluctuation of a reference voltage on an IC substrate side due to a circulation of an inertia current of an inductance component in a circuit to be supplied, and preventing a malfunction of an internal circuit.

[0002]

2. Description of the Related Art In recent years, motor drive circuits, switching regulators or DC-DC converters for audio equipment, and drive circuits for loudspeakers have been integrated into LSIs.
Individual ICs. In this case, an inductance component (hereinafter, an L component) of a motor or a coil or a capacitance component (hereinafter, a C component) of a capacitor or the like is usually externally attached to an IC circuit. In this type of semiconductor device, as shown in FIG. 5A, a drive transistor 20 is formed by providing a P-type substrate 21 with P ⁺ isolation, for example, as shown in FIG. 5B. A drive current for a motor or the like is output from the equivalent transistor circuit 22. In this case, as indicated by Dk, a parasitic diode is simultaneously formed between the emitter and the base or between the emitter and the collector via the P-type substrate 21 in the opposite direction.

[0003] Parasitic elements such as such diodes are
When a voltage lower than the ground is applied to the input terminal, the parasitic diode is turned on, and each transistor is turned on from the semiconductor substrate side (hereinafter simply referred to as the substrate side or the substrate). There is a problem that current flows through the formation layer. Therefore, normally, a voltage lower than the substrate (ground GND) is not applied to the input terminal. FIG. 6 shows a DC motor drive circuit using the above-described IC-made transistor as a drive circuit. 1
Is a drive circuit composed of a drive stage OP amplifier and an output stage transistor Q or the like driven by the drive stage. The drive circuit divides the output voltage by the resistors R1 and R2 and returns to the drive circuit 1. Thus, the divided voltage is controlled so as to become the reference voltage Vref. As a result, a constant voltage output is generated at the output terminal 2A of the IC, and the DC motor 3 is driven.
The drive circuit 1 is connected to the power supply line VDD via the switch circuit 4, and its operation current is supplied to control its operation.

[0004]

However, when the driving circuit of the motor or the like as described above is formed into an IC, a back electromotive force is generated due to an L component of the motor or the like, and the current supply to the driving circuit is stopped. In some cases, the inertial current from the L component returns to the original side (reflux current) and returns to the coil side via the substrate side. In such a case, the output terminal of the drive current to which the motor or the like is connected to the substrate has a large negative voltage. At this time, when a circulating current flows through the substrate, the voltage of the substrate changes from a reference potential (for example, ground GND).
The fluctuation of the substrate potential simultaneously affects the operation of the same integrated circuits and causes a problem that the circuits malfunction. In particular, recently, the integration ratio has been increased, and control circuits such as a controller have often been integrated at the same time, so this malfunction has become a serious problem. Further, in order to form a current path for circulating the inertial current in the case of such a coil drive, a flywheel diode or a commutation diode (to be described as a flywheel diode hereinafter) is externally connected to an external circuit. However, an externally mounted discrete diode increases the manufacturing cost and is problematic for light, thin and small devices. SUMMARY OF THE INVENTION An object of the present invention is to solve such a problem of the related art. When an electric current is supplied to the L component, the fluctuation of the reference voltage on the IC substrate side due to the recirculation of the inertial current is suppressed. An object of the present invention is to provide a semiconductor device capable of preventing a malfunction of a circuit.

[0005]

In order to achieve this object, a semiconductor device according to the present invention comprises a first pad connected to an output of a transistor for supplying a current to an L component and a ground terminal. A semiconductor device having a second pad for grounding a semiconductor substrate, comprising: a well region formed in the semiconductor substrate; and a diode provided in the well region and having a cathode side connected to the first pad. The anode side is grounded via a second pad or a third pad different from the second pad, and a diode circulates inertial current from the L component by a diode.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a semiconductor device according to the present invention having such a structure, a diode is formed in a well region provided on a semiconductor substrate, and the diode is connected to an output terminal of a current output. Connected to
This diode is a flywheel diode that circulates the inertial current from the L component without passing through the substrate side. As a result, a back electromotive force is generated due to the L component and the like, and the potential of the pad becomes negative when the current supply is stopped. The inertia current from the L component flows through the diode formed in the well region to the first pad via the ground GND, the second or third pad, with priority over the substrate side. it can. Since the current flowing through the diode does not pass through the substrate side, no circulating current flows on the substrate side, and the fluctuation in the potential of the substrate is suppressed or reduced, and the potential of the substrate is maintained at a stable potential.

In particular, by forming a bipolar transistor in the well region as the diode and using it in diode connection, almost no circulating current flows from the substrate due to the amplification effect of the bipolar transistor. As a result, the potential fluctuation of the substrate can be almost eliminated. Further, a collector wall is formed using the well region as a collector of the transistor, a base region is formed in the well region, and an emitter region is formed in the base region to make the base region in a floating state. VDD
Alternatively, it can be connected to the ground GND. Further, when the collector wall is connected to the power supply line, a current is supplied from the power supply side to the first pad, so that the potential fluctuation of the substrate can be suppressed. And
By setting the diode formation region (well region) in a floating state in this manner, the substrate side and the formed diode can be reliably separated from each other, so that the potential fluctuation of the substrate can be further suppressed.

[0008]

1 is a sectional view of a flywheel diode forming region of a semiconductor device to which the semiconductor device of the present invention is applied, FIG. 2 is a sectional view of another embodiment thereof, and FIG.
FIG. 4 is a sectional view of still another embodiment, and FIG. 4 is an explanatory diagram for explaining the operation of a diode-connected transistor formed as a flywheel diode.
In the figure, 1 is the drive circuit of FIG. 6, and 2A is its output terminal. FIG. 1 is a cross-sectional view of a flywheel diode forming region having a pad connected to a terminal for supplying a current to the L component. As a flywheel diode forming region 10, a P-sub (P-type substrate) substrate 5 is shown. Then, an N buried layer (B / L) 6 is formed by epitaxial growth, and then a P ⁺ ion implantation or application is performed as a P epitaxial layer on the P-sub substrate 5 in a P layer forming region, and then an oxide film is formed. The P-region 7 and the N ^- region are formed outside the P-region 7 as an N ^- epitaxial layer, and are formed inside the area of the N buried layer 6 so as to correspond to the P-type well region 7. Embedded layer 6
N ⁻ region is formed corresponding to the range.

Furthermore N formed outside the P region 7 ^- to form N diffusion isolation region 8 of N-type impurity region as a diffusion doped diffusion isolation region, diffusion separation region 8 to the P region 7 On the other hand, when viewed from a plane, the wall becomes a circular or rectangular side wall outer periphery, and a floating P-type well region 7 is formed with the N buried layer 6 as a bottom surface. Thus, P region 7 is formed so as to float on P-sub substrate 5 with the N-type layer interposed. That is, the P well region 7
Are separated by the formation of the space charge layer due to the reverse bias of the NP junction in the operating state, so that they are floating. In the figure, reference numeral 9 denotes an element isolation oxide film layer (LOCOS). 2 is an output terminal 2 shown in FIG.
A pad connected to A. Also, the diffusion isolation region 8
Is provided around the side surface of the P region 7 corresponding to the width of the N buried layer 6. Here, a collector wall (collector wall) is provided for the P region 7.
1, C / W).

On the inner side of the P region 7, an N type cathode region 7a diffused and formed on the surface side and a P ⁺ extraction region 7b as an extraction region having the P region 7 as an anode are adjacent to the cathode region 7a. And is formed on the surface side of the P region 7. Similarly, in the cathode region 7a, an N ⁺ extraction region 7c is formed on the front surface side of the cathode region 7a as an extraction region for the cathode region 7a. Thus, a diode D as shown by a dotted line is formed in a floating state in the well region. Extraction area 7 of cathode area 7a
d is connected to the pad 2 connected to the output terminal 2A (see FIG. 6) via the Al wiring. The extraction region 7b of the anode P region 7 is connected to the pad 2a via the Al wiring, and this is connected to the terminal of the ground GND and grounded. Then, the diffusion separation region 8 includes an extraction region 8a, A
1 and connected to the power supply line VDD via the pad 2c. The substrate 5 itself is connected to another pad 2b through a P ⁺ extraction region 5a formed on the outer surface of the diffusion isolation region 8 and an Al wiring as an extraction region of the substrate 5, and similarly through this. Connected to a terminal connected to ground GND and grounded.

With such a structure, the P region 7 is reverse-biased by connecting the wall of the diffusion isolation region 8 and the N buried layer 6 to the power supply line, and is completely in a floating state. Therefore, the diode D formed therein is also in a floating state, and operates independently of the substrate. In this case, it is the diode in this well region that is directly connected to the pad 2, so that the pad 2 is connected to the ground GND by the back electromotive force of the L component or by the inertial current according to the stop of the drive of the drive circuit 1. On the other hand, when it becomes negative, the inertial current due to the L component flows back from the pad 2a connected to the ground GND to the diode D and to the pad 2 in preference to the substrate 5 connected to the ground GND. Thus, the circulating current due to the L component flowing through the substrate 5 is suppressed or reduced, so that the potential fluctuation of the substrate 5 is suppressed.

FIG. 2 is a sectional view of a formation region where a diode-connected bipolar transistor is formed as a flywheel diode with respect to the diode D of FIG.
The output terminal 2A and the drive circuit 1 of FIG. 6 connected to the pad 2 are omitted in the figure. As a flywheel diode forming region 10, an N ⁺ buried layer (B / B) is formed on a P-sub (P-substrate) substrate 5 in the same manner as in FIG.
L) 6 is formed by epitaxial growth, and then a region where the N ⁻ region 12 is formed as an N ⁻ epitaxial layer is covered with an oxide film, and a P ⁺ type formed region is formed on the P-sub substrate 5 in a P layer type region.
After ion implantation or application, the oxide film is removed thereafter to form an N ⁻ region 12 as an N ⁻ epitaxial layer and a P region 12a outside the N ⁻ region 12 so as to correspond to the range of the N ⁺ buried layer 6. To form an N-type well region. Further, an N ⁺ diffusion separation region 11 is formed on the outer peripheral side surface of the N ⁻ region 12 as a diffusion separation region, and the diffusion separation region 11 becomes a circular or rectangular outer peripheral wall with respect to the N ⁻ region 12 when viewed from a plane. A floating well region is formed with the N ⁺ buried layer 6 as a bottom surface. As a result, a P region of a base region 13 (described later) formed inside this region 12 is brought into a floating state with respect to the P-sub substrate 5.

The diffusion isolation region 11 is provided around the side surface of the N ⁻ region 12 corresponding to the width of the N ⁺ buried layer 6. Here, a transistor having the N ⁻ region 12 as a collector is used. Collector wall
to wall). Further, N ^- region 1
Inside P 2, a P-type base region 13 diffused on the surface side and an N ⁺ emitter region 14 diffused on the surface side inside the P-type base region 13 are provided. In the base region 13, a P ⁺ extraction region 13a for the base region 13 is formed by diffusion. On the other hand, a P ⁺ extraction region 5 a is formed outside the diffusion isolation region 11 as an extraction region for the P-sub substrate 5. In addition, an N ⁺ extraction region 11a is formed as an extraction region in the diffusion isolation region 11 in the upper part of the diffusion region.

Thus, N ⁻ region 12 becomes a collector, and base region 13 and emitter region 14 form an N-type transistor. The emitter region 14 is formed by connecting to the pad 2 connected to the signal terminal by the Al wiring 15, and the base region 13 and the N ⁺ diffusion isolation region 11 are connected by the Al wiring 16 via the extraction region. N-type transistor (see transistor Q1 in FIG. 4A) is diode-connected,
It is connected to the pad 2a. The pad 2a is connected to the ground GND via a lead wire and is grounded. As a result, the base region 13 and the N ⁺ diffusion isolation region 11 are grounded. The P-sub substrate 5 is connected to the pad 2b via the extraction region 5a and the Al wiring 16a, is extracted, and is grounded. In this case, the pad 2a connected earlier may be used as the pad 2b. The pads 2a and 2b are assigned one of a number of pads.

When the pad 2 becomes negative with respect to the ground GND by a predetermined value or more due to the back electromotive force of the L component or the inertial current in response to the stop of the driving of the drive circuit 14, for example, a voltage reduced by 0.7V or more is applied. 4A, the transistor Q1 is formed in the relationship shown in FIG. 4A with respect to the pad 2, so that the transistor Q1 is turned on, and the circulating current flows from the ground GND toward the pad 2. Flows. At this time, a current approximately β times the current flowing through the base is supplied from the collector side, and the supply of the current from the P-sub substrate 5 is suppressed or reduced. Here, β of this transistor is a current amplification factor. Referring back to FIG. 2, when the pad 2 becomes negative, first, a small current flows preferentially between the base and the emitter of the PN junction, whereby an approximately β-fold current flows between the collector and the emitter. Flows. At this time, the buried layer 6 and the P-sub substrate 5 are connected to the ground GND.
Unless the voltage between the P-sub substrate 5 and the buried layer 6 becomes 0.7 V or more, the diode formed between them does not turn on. I can't.

The above operation is performed when the P-sub
This is because the substrate 5 side is located outside the collector and the diffusion isolation region 11 is set to the ground GND potential in front of the P-sub substrate 5. Therefore, the current flowing between the collector and the emitter at this time is equal to the ground GND-N
⁺ Diffusion separation region 11 -N ^- region 12 (collector)-base region 13-emitter region 14-pad 2 As a result, even if the pad 2 becomes negative due to the back electromotive force of the L component or the inertial current, the potential of the P-sub substrate 5 is hardly affected. This allows the internal circuit to:
It is possible to operate stably without being affected by the driving by the current supply of the L component.

FIG. 3 is a cross-sectional view similar to FIG. 2 and has the same structure as the flywheel diode forming region 10 in FIG. 2, except that the collector side (anode side) of the transistor Q1 is connected to the power supply line VDD. It is a circuit connected to the side. Therefore, the wiring destination of the diffusion isolation region 11 has been changed from the ground GND to the power supply line VDD. That is, in this example, the diffusion isolation region 11 is not connected to the pad 2a, but is connected to the pad 2c connected to the power supply line VDD via the Al wiring 17. The other configuration is the same as that of FIG. As a result, the transistor Q1 formed in FIG. 2 is connected to the pad 2 in a relationship as shown in FIG. As a result, the pad 2 side is connected to the ground GND.
When the voltage drops to a predetermined value, that is, 0.7V or more, from the power supply line VDD, a current generated by a back electromotive force or an inertial current flows from the power supply line VDD toward the pad 2. As in the case of FIG. 1, the current at this time is supplied from the collector side by approximately β times the current flowing to the base, so that the supply of the current from the P-sub substrate 5 is suppressed. You. However, in this case, since the voltage of the diffusion isolation region 11 is higher than the ground GND, a reverse bias is applied between the P-sub substrate 5 and the buried layer 6, and no current flows.

As a result, the current between the collector and the emitter, which flows when the pad 2 becomes negative, is generated via the power source of this circuit or the battery. That is, ground GND
-(Battery or power supply)-diffusion separation region 11-N ^- region 12 (collector) of power supply line VDD-N ⁺ -base region 13-emitter region 14-pad 2 flows. As a result, even when the pad 2 becomes more negative than the predetermined value with respect to the ground GND by the back electromotive force of the L component or by the inertial current, the current supply from the P-sub substrate 5 side is performed similarly to the case of FIG. Disappears.

As described above, the present invention provides a P-su
It is sufficient to form a diode connected to the pad receiving the signal in a floating state with respect to the substrate in front of the P-sub substrate so as to be in a forward direction from the ground GND, and it is not always necessary to use a diode-connected transistor form. Absent. Further, the well region is located closer to the signal input pad than the substrate side, and it is only necessary that a diode is formed there. Therefore, in the present invention, it is not always necessary to float the well region. Further, in the embodiment, P
Although an N-type semiconductor substrate is taken as an example, an N-type semiconductor substrate may be used. In this case, when the power supply side is used as a reference, in each of the embodiments of FIGS. 1, 2 and 3, the N-type region becomes the P-type, the P-type region becomes the N-type, and the ground GND becomes The power supply line is replaced with the power supply line VDD, and the power supply side is changed to the ground GND and becomes a reference voltage, which can be stabilized. In this case, in the flywheel diode forming region, since the semiconductor substrate is used as a power supply voltage reference, the well region formed in this region and the anode side of the diode provided in this well region are connected to the pad connected to the current output terminal. , The cathode side of the diode is connected to the pad connected to the power supply.

[0020]

As can be understood from the above description, according to the present invention, a diode is formed in a well region provided on a semiconductor substrate, and this diode is connected to a pad connected to an output terminal for current output. Since the connection is made, this diode becomes a flywheel diode that circulates the inertial current from the L component without passing through the substrate side. As a result, the current flowing through the diode does not pass through the substrate side, so that no circulating current flows on the substrate side, and fluctuations in the substrate potential are suppressed or reduced, and the substrate potential is maintained at a stable potential. You.

[Brief description of the drawings]

FIG. 1 is a sectional view of a flywheel diode forming region of a semiconductor device to which the semiconductor device of the present invention is applied.

FIG. 2 is a cross-sectional view of a flywheel diode forming region according to another embodiment.

FIG. 3 is a cross-sectional view of a flywheel diode forming region according to still another embodiment.

FIG. 4 is an explanatory diagram illustrating the operation of a diode-connected transistor formed as a flywheel diode.

FIGS. 5A and 5B are explanatory diagrams of a driving transistor element in such a conventional semiconductor device. FIG. 5A is a cross-sectional view of a formation region thereof, and FIG. 5B is an equivalent circuit diagram thereof.

FIG. 6 is an explanatory diagram of a DC motor drive circuit using a conventional semiconductor device.

[Explanation of symbols]

1: Drive circuit, 2, 2a, 2b, 2c: Pad, 2
A: output terminal, 3: DC motor, 4: switch circuit, 5
... semiconductor substrate (P-sub), 6 ... buried layer (B /
L), 7 well region (P region), 7a cathode region, 7b, 7c, 7d, 11a extraction region, extraction region, 7 N ^- region, 7a, 18 element isolation region, 8, 1
1 ... Diffusion isolation region, 9 ... Element isolation oxide film layer (LOCO
S) 10, 10: flywheel diode forming region, 12
... well region (N ^- region), 14 ... N ⁺ emitter region,
13 ... base region, 14 ... emitter region, 15, 15,
16, 21 ... Al wiring, 17 ... power supply line, VDD ... power supply line, GND ... ground, D ... diode, Q1 ... transistor.

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 29/861 F term (Reference) 5F003 AP04 BA97 BB08 BC08 BE08 BF03 BG03 BH16 BJ12 BJ99 BP01 BP21 BP31 5F064 BB28 CC02 DD32 EE53 FF22 FF23 FF36 FF45 GG01 GG05 5F082 AA33 BA02 BA16 BA17 BC01 BC11 EA01 EA21 FA13 GA04 HA37 HA67

Claims (6)

[Claims] 1. A semiconductor device comprising: a first pad connected to an output of a transistor for supplying a current to an inductance component; and a second pad connected to a ground terminal and grounding the semiconductor substrate. A well region formed, and a diode provided in the well region and having a cathode connected to the first pad, and an anode of the diode having a third electrode different from the second pad or the second pad. A semiconductor device which is grounded through a pad of (1) and circulates an inertial current from the inductance component by the diode. 2. The semiconductor device according to claim 1, wherein the well region is formed as a floating region having a wall region formed by impurity diffusion around a side surface, and the wall region is connected to the second or third pad. Semiconductor device. 3. The semiconductor device according to claim 2, wherein the diode is a diode-connected bipolar transistor, and the bipolar transistor has the well region as a collector and the wall region as a collector wall. 4. A buried layer of the same type as that of the well region is provided at the bottom of the well region so as to be coupled to the bottom of the wall region. In the bipolar transistor, a base region is formed in the well region. An emitter region is formed in a base region, wherein the base region and the collector wall are connected to the second or third region.
4. The semiconductor device according to claim 3, wherein said emitter region is connected to said first pad, and said emitter region is connected to said first pad. 5. A buried layer of the same type as the well region is provided at the bottom of the well region so as to be coupled to the bottom of the wall region. In the bipolar transistor, a base region is formed in the well region. An emitter region is formed in a base region, wherein the collector wall is connected to a power supply line, the base region is connected to the second or third pad, and the emitter region is connected to the first pad. The semiconductor device according to claim 3, wherein the semiconductor device is connected. 6. A power supply having a first pad connected to an output of a transistor for supplying a current to an inductance component and a second pad connected to a power supply terminal and connecting a semiconductor substrate to a power supply, wherein a potential of the power supply is provided. A semiconductor device that operates on the basis of: a well region formed in the semiconductor substrate; a diode provided in the well region, the anode side of which is connected to the first pad; and the cathode side of the diode is the second side. A semiconductor device connected to a power supply through a third pad different from the second pad or the second pad, wherein the diode circulates inertial current from the inductance component.