JP2000133649A - Formation of insulating film on element circuit substrate - Google Patents

Formation of insulating film on element circuit substrate

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Publication number
JP2000133649A
JP2000133649A JP31832498A JP31832498A JP2000133649A JP 2000133649 A JP2000133649 A JP 2000133649A JP 31832498 A JP31832498 A JP 31832498A JP 31832498 A JP31832498 A JP 31832498A JP 2000133649 A JP2000133649 A JP 2000133649A
Authority
JP
Japan
Prior art keywords
insulating film
substrate
film
forming
sol
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31832498A
Other languages
Japanese (ja)
Inventor
Makoto Kameyama
誠 亀山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP31832498A priority Critical patent/JP2000133649A/en
Publication of JP2000133649A publication Critical patent/JP2000133649A/en
Pending legal-status Critical Current

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  • Cold Cathode And The Manufacture (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide the manufacturing method of an insulating film, which can readily form the insulating film having the excellent insulating characteristics on a substrate with less process number. SOLUTION: The forming method of an insulating film 2 contains the process which discharges the sol containing the material of an insulating film on a substrate 1 by an ink jetting device 3, and the process for baking this sol- attached substrate. Before the discharging process, the process which applies a surface-quality improving film on the substrate 1 is included. In this case, by providing a surface-quality improving film between the substrate 1 and an insulating film 2, a contact angle θ between the end part of the insulating film and the substrate can be made small.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電気素子回路基板
上、石英ガラス、ソーダガラス、鉛ガラス等のガラス基
板上、またはシリコン、セラミック等の基板上への絶縁
層の製造方法に関し、特に電子放出素子回路基板に用い
る絶縁層の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing an insulating layer on a circuit board of an electric element, a glass substrate of quartz glass, soda glass, lead glass, or the like, or a substrate of silicon, ceramic, etc. The present invention relates to a method for manufacturing an insulating layer used for an emission element circuit board.

【0002】[0002]

【従来の技術】従来、基板上への絶縁膜の形成は、ガラ
スペーストを用いたスクリーン印刷法、CVD法(化学
蒸着法)、LPD法(液相析出成膜法)、ゾルゲル法を
用いた各種コーティング等によって行っていた。
2. Description of the Related Art Conventionally, an insulating film is formed on a substrate by a screen printing method using a glass paste, a CVD method (chemical vapor deposition method), an LPD method (liquid phase deposition film forming method), or a sol-gel method. This was done by various coatings.

【0003】印刷法は、市販のガラスペースト(例え
ば、株式会社ノリタケカンパニーリミテド製)をスクリ
ーン印刷法等の手法により基板上に塗布し、500℃〜
600℃で焼成する事によって成膜する。形成された絶
縁膜は厚さが20〜50μm程度、比誘電率が10〜3
0程度となる。
[0003] In the printing method, a commercially available glass paste (for example, manufactured by Noritake Co., Ltd.) is applied on a substrate by a method such as a screen printing method, and is then heated to 500 ° C.
A film is formed by firing at 600 ° C. The formed insulating film has a thickness of about 20 to 50 μm and a relative dielectric constant of 10 to 3
It is about 0.

【0004】CVD法では、真空装置を用いて基板を減
圧下に置き、シラン系ガスの蒸着、またはアルゴン、ヘ
リウム、酸素等のキャリアーガス及び反応ガスによるシ
リコンの酸化により、厚さ1μm程度までのSiO2
を形成する。
In the CVD method, a substrate is placed under reduced pressure using a vacuum apparatus, and a silicon-based gas is vapor-deposited or silicon is oxidized by a carrier gas such as argon, helium, oxygen or the like and a reaction gas to a thickness of about 1 μm. An SiO 2 film is formed.

【0005】LPD法では、ケイフッ化水素酸水溶液に
低温でSiO2 を溶かして過飽和溶液とし、基板を該溶
液に浸せきした状態で30〜40℃程度に温め、基板上
にSiO2 を析出させる(温度法)か、アルミニウム・
水・ほう酸を加えることにより化学平衡をずらせて、基
板上にSiO2 を析出させて成膜する。
In the LPD method, SiO 2 is dissolved at low temperature in an aqueous solution of hydrofluoric acid to form a supersaturated solution, and the substrate is immersed in the solution and heated to about 30 to 40 ° C. to deposit SiO 2 on the substrate ( Temperature method) or aluminum
The chemical equilibrium is shifted by adding water and boric acid, and SiO 2 is deposited on the substrate to form a film.

【0006】ゾルゲル法では、市販のゾルゲル液(例え
ば、日本曹達株式会社製のアトロン、東芝シリコーン株
式会社製のトスガード)、テトラエトキシシラン等のシ
ラン化合物をエタノール等の適当な溶媒に溶かした調製
品等をディップ、スプレーまたはスピンコーティング等
の手法を用いて基板上に塗布し、300℃程度で焼成す
る事により成膜する。膜厚は1〜3μmで、比誘電率は
3〜15程度となる。
In the sol-gel method, commercially available sol-gel liquids (eg, Atron manufactured by Nippon Soda Co., Ltd., Tosgard manufactured by Toshiba Silicone Co., Ltd.), and a preparation prepared by dissolving a silane compound such as tetraethoxysilane in a suitable solvent such as ethanol. Is applied on a substrate by using a technique such as dipping, spraying or spin coating, and is baked at about 300 ° C. to form a film. The film thickness is 1 to 3 μm, and the relative dielectric constant is about 3 to 15.

【0007】一方、このような絶縁膜を形成した回路用
基板の用途として、表面伝導型電子放出素子を用いた画
像形成装置がある。以下、表面伝導型電子放出素子につ
いて概説する。
On the other hand, as an application of a circuit board having such an insulating film formed thereon, there is an image forming apparatus using a surface conduction electron-emitting device. Hereinafter, the surface conduction electron-emitting device will be briefly described.

【0008】電子放出素子には、大別して熱電子放出素
子と冷陰極電子放出素子の2種類が知られている。冷陰
極電子放出素子には電界放出型(以下「FE型」とい
う。)、金属/絶縁層/金属型(以下「MIM型」とい
う。)、表面伝導型電子放出素子等がある。表面伝導型
電子放出素子は、基板上に形成された小面積の薄膜に、
膜面に平行に電流を流すことにより、電子放出が生ずる
現象を利用するものである。この表面伝導型電子放出素
子としてはM.I.Elinson等によるSnO2
膜を用いたもの、Au薄膜によるもの(M.Hartw
ell andC.G.Fonstad.,IEEE
Trans.ED conf.,519(197
5))、カーボン薄膜によるもの(荒木久他、真空、第
26巻、第1号、22項(1983))等がすでに知ら
れている。
[0008] As electron-emitting devices, there are roughly two types of thermionic and cold-cathode electron-emitting devices. The cold cathode electron emitting device includes a field emission type (hereinafter, referred to as “FE type”), a metal / insulating layer / metal type (hereinafter, referred to as “MIM type”), a surface conduction type electron emitting device, and the like. Surface-conduction electron-emitting devices consist of a small-area thin film formed on a substrate,
This utilizes the phenomenon that electron emission occurs when a current flows in parallel to the film surface. This surface conduction electron-emitting device is disclosed in I. Elinson et al. Using a SnO 2 thin film, Au thin film (M. Hartw
ell and C.I. G. FIG. Fonstad. , IEEE
Trans. ED conf. , 519 (197)
5)), those using a carbon thin film (Hisashi Araki et al., Vacuum, Vol. 26, No. 1, Item 22 (1983)) and the like are already known.

【0009】これらの表面伝導型電子放出素子の典型的
な素子構成として、前述のハートウエル(M.Hart
well)らの素子構成を図5に模式的に示す。同図に
おいて51は基板である。54は導電性薄膜で、H型形
状のパターンにスパッタで形成された金属酸化物薄膜等
からなり、通電フォーミングと呼ばれる通電処理等によ
って電子放出部55が形成される。尚、図中の素子電極
52、53の間隔Lは0.5〜1mm、またWは0.1
mm程度に設定されている。
A typical device configuration of these surface conduction electron-emitting devices is described in the above-mentioned Hartwell (M. Hart).
FIG. 5 schematically shows the device configuration of the present invention. In the figure, reference numeral 51 denotes a substrate. Numeral 54 denotes a conductive thin film, which is made of a metal oxide thin film or the like formed by sputtering in an H-shaped pattern, and the electron emitting portion 55 is formed by an energization process called energization forming. The distance L between the device electrodes 52 and 53 in the figure is 0.5 to 1 mm, and W is 0.1
mm.

【0010】これらの表面伝導型電子放出素子において
は、電子放出を行う前に、導電性薄膜54にあらかじめ
通電フォーミングと呼ばれる通電処理をして電子放出部
55を形成するのが一般的である。すなわち通電フォー
ミングとは、導電性薄膜54の両端に直流電圧あるいは
非常にゆっくりとした昇電圧、例えば1V/分程度を印
加通電し、導電性薄膜を局所的に破壊、変形もしくは変
質せしめ、電気的に高抵抗な状態にした電子放出部55
を形成することである。尚、電子放出部55は導電性薄
膜54の一部に亀裂が発生しその亀裂付近から電子放出
が行われる。前期通電フォーミング処理をした表面伝導
型電子放出素子は、その導電性薄膜54に電圧を印加
し、素子に電流を流すことにより、電子放出部55より
電子を放出せしめるものである。
In these surface conduction electron-emitting devices, before the electron emission, the conductive thin film 54 is generally subjected to an energization process called energization forming in advance to form an electron emission portion 55. That is, energization forming means applying a DC voltage or a very slowly increasing voltage, for example, about 1 V / min, to both ends of the conductive thin film 54 and energizing the conductive thin film 54 to locally destroy, deform or alter the conductive thin film. Emitter 55 in a state of high resistance
Is to form In the electron emitting portion 55, a crack is generated in a part of the conductive thin film 54, and electrons are emitted from the vicinity of the crack. In the surface conduction type electron-emitting device subjected to the energization forming process, a voltage is applied to the conductive thin film 54 and a current is caused to flow through the device to cause the electron-emitting portion 55 to emit electrons.

【0011】上述の表面伝導型電子放出素子は構造が単
純で製造も容易であることから、大面積にわたり多数の
素子を配列形成できる利点がある。そこでこの特徴を活
かして、この素子の電子ビーム源、表示装置等への応用
研究がなされている。
The above-described surface conduction electron-emitting device has a simple structure and is easy to manufacture, and thus has an advantage that a large number of devices can be arranged and formed over a large area. Therefore, taking advantage of this feature, application studies of this element to an electron beam source, a display device, and the like have been made.

【0012】表面伝導型電子放出素子を用いた画像形成
装置としては、例えば、特開平2−299136号公報
に開示されたものが挙げられる。
An image forming apparatus using a surface conduction electron-emitting device is disclosed in, for example, Japanese Patent Application Laid-Open No. 2-299136.

【0013】[0013]

【発明が解決しようとする課題】上記従来の絶縁膜の形
成方法は、それぞれ以下に記すような課題を有してい
る。すなわち、印刷法では、ガラスペーストを用いるた
め、膜厚が数十μm以上の厚いものしか形成されず、ま
たPbO等の成分が多いために比誘電率が大きくなり絶
縁特性が悪くなるという欠点があった。
The above-described conventional methods for forming an insulating film have the following problems, respectively. That is, in the printing method, since a glass paste is used, only a thick film having a thickness of several tens of μm or more is formed. In addition, since there are many components such as PbO, the relative dielectric constant is increased and the insulating characteristics are deteriorated. there were.

【0014】CVD法では、真空装置を用い、高真空を
必要とするため基板の大面積化が難しく、装置コストが
高く、スループットが小さい、という欠点があった。
The CVD method has the drawbacks that it is difficult to increase the area of the substrate because a vacuum apparatus is used and a high vacuum is required, the cost of the apparatus is high, and the throughput is small.

【0015】LPD法では、成膜スピードが非常に遅
く、膜の厚みに比例してスループットが小さくなるとい
う欠点があった。また、SiO2 上にしか絶縁層を形成
できないという欠点もあった。
The LPD method has the disadvantage that the film forming speed is very slow and the throughput decreases in proportion to the film thickness. There is also a disadvantage that an insulating layer can be formed only on SiO 2 .

【0016】ゾルゲル法では、ディップ、スピン、スプ
レー等の手法でベタ膜を形成した後、フォトリソ・エッ
チング等の手法によってパターン形成するという工程を
必要とし、製造コストが高くなるという欠点を有してい
た。
The sol-gel method requires a process of forming a solid film by a technique such as dip, spin, spray and the like, and then forming a pattern by a technique such as photolithography and etching. Was.

【0017】そこで本発明の目的は、絶縁特性の良好な
絶縁膜を各種基板上の必要な場所に少ない工程数で容易
に形成するのに好適な、絶縁膜の製造方法を提供するこ
とである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing an insulating film which is suitable for easily forming an insulating film having good insulating properties at a required place on various substrates with a small number of steps. .

【0018】[0018]

【課題を解決するための手段】上記目的は、以下の本発
明によって達成することが出来る。すなわち、第1の本
発明は、ゾルゲル法により基板上に絶縁膜を形成する方
法であって、(1)絶縁膜材料含有ゾルをインクジェッ
トにより基板上に吐出する工程、及び(2)該ゾルが付
着した基板を焼成して、基板上に絶縁膜を形成する工程
を含むことを特徴とする。
The above object can be achieved by the present invention described below. That is, a first aspect of the present invention is a method for forming an insulating film on a substrate by a sol-gel method, wherein (1) a step of discharging an insulating film material-containing sol onto the substrate by inkjet, and (2) A step of firing the attached substrate to form an insulating film over the substrate.

【0019】第2の発明は、前記吐出工程(1)の前
に、基板上に表面改質剤を塗布する工程(0)を含み、
次に前記工程(1)において前記ゾルを該表面改質した
基板上に吐出することを特徴とする、第1の発明に係る
絶縁膜形成方法である。
The second invention includes a step (0) of applying a surface modifier on a substrate before the discharging step (1),
Next, in the method (1), the sol is discharged onto the surface-modified substrate.

【0020】第3の発明は、前記焼成工程(2)におい
て、まず仮焼成を行い、次に該仮焼成の温度より高い温
度で本焼成を行う第1又は第2発明に係る絶縁膜形成方
法である。
According to a third aspect of the present invention, there is provided the insulating film forming method according to the first or second aspect, wherein in the firing step (2), first, the preliminary firing is performed, and then the main firing is performed at a temperature higher than the temperature of the temporary firing. It is.

【0021】第4の発明は、前記ゾルの粘度が1.0〜
10.0cpsの範囲に調整されている第1又は第2発
明に係る絶縁膜形成方法である。
In a fourth aspect, the sol has a viscosity of 1.0 to 1.0.
An insulating film forming method according to the first or second aspect of the present invention, which is adjusted to a range of 10.0 cps.

【0022】第5の発明は、前記表面改質剤がシランカ
ップリング剤である第2の発明に係る絶縁膜形成方法で
ある。
A fifth invention is the method for forming an insulating film according to the second invention, wherein the surface modifier is a silane coupling agent.

【0023】第6の発明は、前記絶縁膜の端部と前記基
板との接触角が90度未満に制御される第1〜第5発明
のいずれかに係る絶縁膜形成方法である。
A sixth invention is the method of forming an insulating film according to any one of the first to fifth inventions, wherein a contact angle between an end of the insulating film and the substrate is controlled to be less than 90 degrees.

【0024】第7の発明は、前記絶縁膜を、表面伝導型
電子放出素子用または該素子を用いた画像形成装置用の
層間絶縁膜として形成する第1〜第6発明のいずれかに
係る絶縁膜形成方法である。
According to a seventh aspect of the present invention, there is provided the insulating film according to any one of the first to sixth aspects, wherein the insulating film is formed as an interlayer insulating film for a surface conduction electron-emitting device or an image forming apparatus using the device. This is a film formation method.

【0025】[0025]

【発明の実施の形態】以下、本発明を実施の形態を挙げ
て詳細に説明する。図1は、本発明の方法により基板上
に形成された絶縁膜の断面(a)及び上面(b)の模式
図である。図1において、1は基板、2は絶縁層、3は
インクジェット装置のインク吐出部、θは絶縁層端部の
基板との接触角である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to embodiments. FIG. 1 is a schematic diagram of a cross section (a) and an upper surface (b) of an insulating film formed on a substrate by the method of the present invention. In FIG. 1, reference numeral 1 denotes a substrate, 2 denotes an insulating layer, 3 denotes an ink discharge portion of an ink jet device, and θ denotes a contact angle between the end of the insulating layer and the substrate.

【0026】本発明に用いる基板1は、例えば、ケイ酸
ガラス、ソーダ石灰ガラス、鉛ガラス、ホウケイ酸ガラ
ス等のガラス基板、アルミナ等のセラミック基板、金
属、あるいはシリコン等から適宜選択される。
The substrate 1 used in the present invention is appropriately selected from, for example, glass substrates such as silicate glass, soda-lime glass, lead glass and borosilicate glass, ceramic substrates such as alumina, metals, and silicon.

【0027】本発明に係る絶縁層2は、絶縁層材料含有
ゾルをインクとしてインクジェット装置に装填して、イ
ンク吐出部3より吐出し基板に付着させた後、焼成工程
を経て形成される。本発明に用いられる絶縁膜材料含有
ゾルは、テトラエトキシシラン等のシラン化合物をエタ
ノール等の適当な溶剤に溶かした調製品、または市販の
ゾルゲル液(日本曹達株式会社製のアトロン、東芝シリ
コーン株式会社製のトスガード、コルコート株式会社製
のHAS−10)等の何れでも良い。また、アルミニウ
ムのキレート塩、有機アルカリ金属塩または有機アルカ
リ土類金属塩等を含有する組成物で、焼成すると無機酸
化物のみになるように調合したものでも良い(例:東レ
ダウコーニング株式会社製のAY−49−208)。す
なわち、焼成によって絶縁膜を形成するような液状の組
成物が好ましく用いられる。
The insulating layer 2 according to the present invention is formed by loading a sol containing an insulating layer material as an ink into an ink jet apparatus, discharging the sol from an ink discharging section 3 and attaching the ink to a substrate, and then performing a firing step. The insulating film material-containing sol used in the present invention may be a preparation prepared by dissolving a silane compound such as tetraethoxysilane in an appropriate solvent such as ethanol, or a commercially available sol-gel solution (Atron manufactured by Nippon Soda Co., Ltd., Toshiba Silicone Co., Ltd.). And HAS-10) manufactured by Colcoat Co., Ltd. may be used. Further, a composition containing a chelate salt, an organic alkali metal salt, an organic alkaline earth metal salt, or the like of aluminum, which may be prepared so that it becomes only an inorganic oxide when fired (eg, manufactured by Toray Dow Corning Co., Ltd.) AY-49-208). That is, a liquid composition that forms an insulating film by firing is preferably used.

【0028】また、前述の絶縁膜材料含有ゾルはある程
度の粘度を有していてもかまわないが、インクジェット
装置の適性から1.0〜10cps程度が好ましい。
The above-mentioned sol containing the insulating film material may have a certain degree of viscosity, but is preferably about 1.0 to 10 cps from the suitability of the ink jet apparatus.

【0029】本発明に用いるインクジェット装置として
は、エネルギー発生素子として電気熱変換体を用いたバ
ブルジェットタイプ、あるいは圧電素子を用いたピエゾ
ジェットタイプ等が使用可能であり、吐出形成面積及び
吐出形成パターンは任意に設定することができる。
As the ink jet device used in the present invention, a bubble jet type using an electrothermal converter or a piezo jet type using a piezoelectric element can be used as an energy generating element. Can be set arbitrarily.

【0030】また、絶縁層の端部と基板との接触角θ
は、90度より小さく制御することが望ましい。これは
絶縁層上に配線を形成する際のステップカバレージを良
好なものとするためである。該接触角θを小さく制御す
るには、絶縁層材料含有ゾルを吐出する前に、基板をU
Vオゾン処理等により表面清浄化しておく必要がある。
さらにその制御性を確実なものとする方法として、あら
かじめ絶縁層材料含有ゾルを吐出する部分にシランカッ
プリング剤を薄く塗布しておくと良い。
The contact angle θ between the end of the insulating layer and the substrate
Is desirably controlled to be smaller than 90 degrees. This is to improve the step coverage when forming the wiring on the insulating layer. In order to control the contact angle θ to be small, the substrate must be U-shaped before the sol containing the insulating layer material is discharged.
It is necessary to clean the surface by V ozone treatment or the like.
Further, as a method for ensuring the controllability, a thin silane coupling agent is preferably applied in advance to a portion where the sol containing the insulating layer material is discharged.

【0031】また、インクジェットによるゾルの吐出
は、1回のみである必要はなく、重ね打ちを行っても良
く、この方法は膜を厚く形成するのに有効である。
The sol is not required to be ejected only once by ink jet, but may be overprinted. This method is effective for forming a thick film.

【0032】以上の様にして基板上に吐出した絶縁膜材
料含有ゾルは次に焼成するが、この工程では、必要に応
じて仮焼成を行った後、本焼成を行う。仮焼成の温度は
通常、絶縁膜材料含有ゾルの有効成分(例えばシリコー
ン化合物)の沸点以下、およそ60〜200℃、より好
ましくは60〜100℃であれば、有効成分の揮発等が
無いので望ましい。また本焼成は、シリコーン化合物の
アルコキシ基が脱離し、脱水反応が十分に進行する温度
が望ましく、通常200℃以上、より好ましくは350
℃以上で行う。
The sol containing the insulating film material discharged onto the substrate as described above is then fired. In this step, temporary firing is performed as necessary, and then main firing is performed. The pre-baking temperature is usually lower than the boiling point of the active ingredient (for example, silicone compound) of the insulating film material-containing sol, and is preferably about 60 to 200 ° C., more preferably 60 to 100 ° C., because there is no volatilization of the active ingredient. . In addition, the main baking is preferably performed at a temperature at which the alkoxy group of the silicone compound is eliminated and the dehydration reaction sufficiently proceeds.
Perform at or above ° C.

【0033】本発明の方法により、表面伝導型電子放出
素子を用いた画像形成装置の層間絶縁層を形成する場
合、緻密な絶縁膜を、省材料で少ない工程数で形成する
ことが出来コスト的に有利である。
When an interlayer insulating layer of an image forming apparatus using a surface conduction electron-emitting device is formed by the method of the present invention, a dense insulating film can be formed in a small number of steps with less material and cost. Is advantageous.

【0034】[0034]

【実施例】以下、本発明を実施例等によりさらに説明す
るが、本発明はこれらに限定されるものではない。実施例1 図2は本発明の一実施例に係るマトリックス配線基板形
成工程の断面模式図である。
EXAMPLES Hereinafter, the present invention will be further described with reference to examples and the like, but the present invention is not limited to these examples. Embodiment 1 FIG. 2 is a schematic sectional view of a matrix wiring board forming step according to an embodiment of the present invention.

【0035】先ず、図2(a)に示すようにA4版サイ
ズで板厚2ミリのソーダ石灰ガラス21に、230μm
おきに厚さ1μm、幅100μmで銀ペースト配線22
を形成した。
First, as shown in FIG. 2 (a), 230 μm
Every 1 μm thick and 100 μm wide, silver paste wiring 22
Was formed.

【0036】配線22の上にはこれに直行する様に別の
配線24を形成するが、その前に配線24が交差すべき
配線22の位置(層間絶縁部分)に、インクジェット装
置を用いて絶縁膜材料含有ゾルを吐出した。このゾルと
して、粘度が3.5(cps)に調整されたゾルゲル液
アトロン(日本曹達株式会社製)を用いた。その後14
0℃で15分間仮焼成を行い、さらに450℃で1時間
本焼成を行い図2(b)の層間絶縁膜23を形成した。
この膜厚は2μmで緻密な膜であった。また誘電率は
4.3であり、SiO2 に極めて近い膜が得られた。
Another wiring 24 is formed on the wiring 22 so as to be perpendicular to the wiring 22. Before that, the position (interlayer insulating portion) of the wiring 22 where the wiring 24 should intersect is insulated using an ink jet device. The sol containing the film material was discharged. As this sol, a sol-gel liquid Atron (manufactured by Nippon Soda Co., Ltd.) whose viscosity was adjusted to 3.5 (cps) was used. Then 14
Preliminary baking was performed at 0 ° C. for 15 minutes, and further baking was performed at 450 ° C. for 1 hour to form the interlayer insulating film 23 of FIG. 2B.
This film was a dense film having a thickness of 2 μm. The dielectric constant was 4.3, and a film very close to SiO 2 was obtained.

【0037】続いて図2(c)に示すように、上部の配
線として230μmおきに厚さ1μm、幅100μmで
銀ペースト配線24を配線した。
Subsequently, as shown in FIG. 2C, a silver paste wiring 24 having a thickness of 1 μm and a width of 100 μm was formed every 230 μm as an upper wiring.

【0038】本実施例では、層間絶縁膜23で絶縁され
たマトリックス配線回路基板を前述したような少ない簡
便な工程で作成することが出来た。これらの配線間での
ショート及び配線の断線等は観測されなかった。
In this embodiment, the matrix wiring circuit board insulated by the interlayer insulating film 23 can be manufactured by the above-mentioned few simple steps. No short circuit between these wirings and no disconnection of the wirings were observed.

【0039】実施例2 実施例1と同様にして、図2(a)に示すようにA4版
サイズで板厚2ミリのソーダ石灰ガラス21に、230
μmおきに厚さ1μm、幅100μmで銀ペースト配線
22を配線した。
Example 2 In the same manner as in Example 1, as shown in FIG.
The silver paste wiring 22 was wired with a thickness of 1 μm and a width of 100 μm every μm.

【0040】次に配線22の上部に直交するよう後に配
設される配線24との交差予定位置(層間絶縁部)に、
インクジェット装置を用いて、粘度を5.0(cps)
に調整したエチルシリケート40(コルコート株式会社
製)を吐出し、その後140℃で15分間仮焼成を行
い、さらに450℃で1時間本焼成を行い図2(b)に
示す層間絶縁膜23を形成した。この時の膜厚は3μm
で緻密な膜であった。また誘電率は4.5でありSiO
2 に極めて近い膜が得られた。
Next, at a position (interlayer insulating portion) at which the wiring is to intersect with the wiring 24 which is to be disposed later so as to be orthogonal to the upper part of the wiring 22,
Using an inkjet device, the viscosity is 5.0 (cps)
The ethyl silicate 40 (manufactured by Colcoat Co., Ltd.) is discharged, and then calcined at 140 ° C. for 15 minutes and further calcined at 450 ° C. for 1 hour to form the interlayer insulating film 23 shown in FIG. did. The film thickness at this time is 3 μm
It was a dense film. The dielectric constant is 4.5 and SiO
A film very close to 2 was obtained.

【0041】最後に図2(c)に示すように、上部の配
線として230μmおきに厚さ1μm、幅100μmで
銀ペースト配線24を配線し、層間絶縁膜23で絶縁さ
れたマトリックス配線基板を前述したような少ない簡便
な工程で作成することが出来た。これらの配線間でのシ
ョート及び配線の断線等は、実施例1と同様に観測され
なかった。
Finally, as shown in FIG. 2 (c), a silver paste wiring 24 having a thickness of 1 μm and a width of 100 μm is formed every 230 μm as an upper wiring, and a matrix wiring substrate insulated by an interlayer insulating film 23 is formed as described above. It was able to be created with few simple steps as described above. Short-circuiting between these wirings, disconnection of the wirings, and the like were not observed as in Example 1.

【0042】実施例3 図3は本発明の一実施例に係るマトリックス配線基板形
成工程の断面模式図である。先ず、図3(a)に示すよ
うにA4版サイズで板厚2ミリのソーダ石灰ガラス31
に、230μmおきに厚さ1μm、幅100μmで銀ペ
ースト配線32を配線した。次にメタクリロキシを官能
基に持つシランカップリング剤KBM502(信越化学
工業株式会社製)をアルコールで10%に希釈し、これ
をスピンナーで基板全面に薄くコートして下地表面改質
膜33を形成した。
Embodiment 3 FIG. 3 is a schematic sectional view of a step of forming a matrix wiring board according to an embodiment of the present invention. First, as shown in FIG. 3A, a soda-lime glass 31 of A4 size and 2 mm thick is used.
Then, a silver paste wiring 32 having a thickness of 1 μm and a width of 100 μm was formed every 230 μm. Next, a silane coupling agent KBM502 (manufactured by Shin-Etsu Chemical Co., Ltd.) having methacryloxy as a functional group was diluted to 10% with alcohol, and this was thinly coated on the entire surface of the substrate with a spinner to form a ground surface modified film 33. .

【0043】次に、配線32の上部に直交するように配
設される配線35との交差予定位置(層間絶縁部分)
に、インクジェット装置を用いて、粘度が3.5(cp
s)に調整されたゾルゲル液アトロン(日本曹達株式会
社製)を吐出し、その後140℃で15分間仮焼成を行
い、さらに450℃で1時間本焼成を行い図3(b)の
層間絶縁膜34を形成した。この層間絶縁膜34の端部
の基板(シランカップリング剤)との接触角は60度か
ら70度の範囲で制御されていた。絶縁膜34の厚さは
2μmで緻密な膜であった。また誘電率は4.3であり
SiO2 に極めて近い膜が得られた。
Next, an expected crossing position (interlayer insulating portion) with the wiring 35 disposed orthogonally to the upper part of the wiring 32
In addition, using an inkjet device, the viscosity is 3.5 (cp)
The sol-gel liquid Atron (manufactured by Nippon Soda Co., Ltd.) adjusted in step s) is discharged, and then calcined at 140 ° C. for 15 minutes, and further calcined at 450 ° C. for 1 hour, and the interlayer insulating film shown in FIG. 34 were formed. The contact angle of the end of the interlayer insulating film 34 with the substrate (silane coupling agent) was controlled in the range of 60 to 70 degrees. The thickness of the insulating film 34 was 2 μm and a dense film. The dielectric constant was 4.3, and a film very close to SiO 2 was obtained.

【0044】最後に図3(c)に示すように、上部の配
線として230μmおきに厚さ1μm、幅100μmで
銀ペースト配線35を配線し、層間絶縁膜34で絶縁さ
れたマトリックス配線基板を前述したような少ない簡便
な工程で作成することが出来た。これらの配線間でのシ
ョート及び配線の断線等は観測されなかった。
Finally, as shown in FIG. 3C, a silver paste wiring 35 having a thickness of 1 μm and a width of 100 μm is formed every 230 μm as an upper wiring, and the matrix wiring substrate insulated by the interlayer insulating film 34 is formed as described above. It was able to be created with few simple steps as described above. No short circuit between these wirings and no disconnection of the wirings were observed.

【0045】比較例1 図4は本発明に対する比較例に係るマトリックス配線基
板形成工程の断面模式図である。先ず、図4(a)に示
すようにA4版サイズで板厚2ミリのソーダ石灰ガラス
41に、230μmおきに厚さ1μm、幅100μmで
銀ペースト配線42を配線した。
Comparative Example 1 FIG. 4 is a schematic sectional view of a matrix wiring substrate forming step according to a comparative example of the present invention. First, as shown in FIG. 4A, a silver paste wiring 42 having a thickness of 1 μm and a width of 100 μm was formed every 230 μm on an A4 size soda lime glass 41 having a thickness of 2 mm.

【0046】次に図4(b)に示すようにポジ型レジス
トOMR−800(東京応化工業株式会社製)をスピン
ナーコートし、80℃で30分間のプリベークを行っ
た。次にマスク露光及び現像を行い余分なレジストを除
去した後140℃30分のポストベークを行い、図4
(c)に示すようなレジスト43を形成した。
Next, as shown in FIG. 4B, a positive resist OMR-800 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) was spin-coated and prebaked at 80 ° C. for 30 minutes. Next, after performing mask exposure and development to remove excess resist, post-baking is performed at 140 ° C. for 30 minutes, and FIG.
A resist 43 was formed as shown in FIG.

【0047】次に粘度が5.5(cps)に調整された
ゾルゲル液アトロン(日本曹達株式会社製)中に基板全
体を10分間浸せきし、引き上げ速度600mm/分で
引き上げた(図4(d))。そして液のたれ落ちがなく
なるまで十分に待った後、140℃で15分間仮焼成し
た。その後レジスト剥離液でレジスト43を剥離し、4
50℃で1時間本焼成を行い図4(e)に示すような層
間絶縁膜44を形成した。この層間絶縁膜44の端部の
基板との接触角は90度から100度と大きなものとな
ってしまった。また膜厚は2μm、誘電率は4.5であ
った。
Next, the entire substrate was immersed in a sol-gel liquid Atron (manufactured by Nippon Soda Co., Ltd.) whose viscosity was adjusted to 5.5 (cps) for 10 minutes, and pulled up at a pulling rate of 600 mm / min (FIG. 4 (d)). )). Then, after sufficiently waiting until the dripping of the liquid disappeared, it was calcined at 140 ° C. for 15 minutes. Thereafter, the resist 43 is stripped with a resist stripper,
The main baking was performed at 50 ° C. for 1 hour to form an interlayer insulating film 44 as shown in FIG. The contact angle of the end of the interlayer insulating film 44 with the substrate was as large as 90 degrees to 100 degrees. The film thickness was 2 μm and the dielectric constant was 4.5.

【0048】最後に図4(f)に示すように、上部の配
線として230μmおきに厚さ1μm、幅100μmで
銀ペースト配線45を配線し、層間絶縁膜44で絶縁さ
れたマトリックス配線基板を作成した。
Finally, as shown in FIG. 4F, a silver paste wiring 45 is formed as a top wiring at a thickness of 1 μm and a width of 100 μm every 230 μm to form a matrix wiring substrate insulated by an interlayer insulating film 44. did.

【0049】このように、従来用いられていた手法は本
発明の方法に比べて倍以上の工程を必要とする。また、
本比較例の基板では、配線間でのショートはなかった
が、図4(f)の46で示すような上部配線の断線が数
カ所観測された。
As described above, the conventionally used method requires twice or more steps as compared with the method of the present invention. Also,
In the substrate of this comparative example, there was no short circuit between the wirings, but several disconnections of the upper wiring as indicated by 46 in FIG. 4F were observed.

【0050】[0050]

【発明の効果】以上の説明から明らかなように本発明の
方法によれば、金属アルコキシド等によるゾルゲル剤を
インクジェットを用いて基板に吐出し焼成することによ
り、緻密で、絶縁性の良好な絶縁膜を少ない工程で容易
に形成することが出来、さらに形成面積及び形成パター
ンを容易に変更することが出来るという効果がある。
As is apparent from the above description, according to the method of the present invention, a sol-gel agent such as a metal alkoxide is discharged onto a substrate by using an ink jet and baked, thereby obtaining a dense and good insulating material. There is an effect that a film can be easily formed with a small number of steps, and a formation area and a formation pattern can be easily changed.

【0051】また本発明によれば、絶縁材を吐出形成す
る前に基板表面をシランカップリング剤等で改質してお
くことにより、絶縁膜端部の基板との接触角を60度程
度に抑えることが出来、その上部への配線形成の際ステ
ップカバレージが良好となり、配線の断線が起こらない
という効果がある。
Further, according to the present invention, the surface of the substrate is modified with a silane coupling agent or the like before the insulating material is formed by discharging, so that the contact angle of the end portion of the insulating film with the substrate is reduced to about 60 degrees. This has the effect of improving the step coverage when forming the wiring on the upper part thereof and preventing the wiring from being disconnected.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の方法により基板上に形成した絶縁層
の模式図である。
FIG. 1 is a schematic view of an insulating layer formed on a substrate by a method of the present invention.

【図2】 本発明の絶縁層の製造方法を説明する断面模
式図である。
FIG. 2 is a schematic sectional view illustrating a method for manufacturing an insulating layer according to the present invention.

【図3】 本発明の絶縁層の製造方法を説明する断面模
式図である。
FIG. 3 is a schematic sectional view illustrating a method for manufacturing an insulating layer according to the present invention.

【図4】 比較例の絶縁層の製造方法を説明する断面模
式図である。
FIG. 4 is a schematic cross-sectional view illustrating a method for manufacturing an insulating layer of a comparative example.

【図5】 表面伝導型電子放出素子の平面図である。FIG. 5 is a plan view of a surface conduction electron-emitting device.

【符号の説明】[Explanation of symbols]

1,21,31,41,51:基板、2,23,34,
44:絶縁膜、3:インクジェット装置、22,24,
32,35,42,45:銀ペースト配線層、33:表
面改質膜、43:レジスト、46:断線箇所、52,5
3:素子電極、54:導電性薄膜、55:電子放出部。
1, 21, 31, 41, 51: substrate, 2, 23, 34,
44: insulating film, 3: inkjet device, 22, 24,
32, 35, 42, 45: silver paste wiring layer, 33: surface modified film, 43: resist, 46: disconnection, 52, 5
3: device electrode, 54: conductive thin film, 55: electron emitting portion.

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 ゾルゲル法により基板上に絶縁膜を形成
する方法であって、(1)絶縁膜材料含有ゾルをインク
ジェットにより基板上に吐出する工程、及び(2)該ゾ
ルが付着した基板を焼成して、基板上に絶縁膜を形成す
る工程を含むことを特徴とする。
1. A method for forming an insulating film on a substrate by a sol-gel method, comprising: (1) a step of discharging an insulating film material-containing sol onto the substrate by ink jet; and (2) a step of: Baking to form an insulating film over the substrate.
【請求項2】 前記吐出工程(1)の前に、基板上に表
面改質剤を塗布する工程(0)を含み、次に前記工程
(1)において前記ゾルを該表面改質した基板上に吐出
することを特徴とする、請求項1記載の絶縁膜形成方
法。
2. The method according to claim 1, further comprising: a step (0) of applying a surface modifying agent on the substrate before the discharging step (1). 2. The method of forming an insulating film according to claim 1, wherein the liquid is discharged.
【請求項3】 前記焼成工程(2)において、まず仮焼
成を行い、次に該仮焼成の温度より高い温度で本焼成を
行う請求項1または2記載の絶縁膜形成方法。
3. The insulating film forming method according to claim 1, wherein in the firing step (2), first, preliminary firing is performed, and then main firing is performed at a temperature higher than the temperature of the temporary firing.
【請求項4】 前記ゾルの粘度が1.0〜10.0cp
sの範囲に調整されている請求項1または2記載の絶縁
膜形成方法。
4. The viscosity of the sol is 1.0 to 10.0 cp.
3. The method for forming an insulating film according to claim 1, wherein the value is adjusted to a range of s.
【請求項5】 前記表面改質剤がシランカップリング剤
である請求項2記載の絶縁膜形成方法。
5. The method according to claim 2, wherein the surface modifier is a silane coupling agent.
【請求項6】 前記絶縁膜の端部と前記基板との接触角
が90度未満に制御される請求項1〜5いずれかに記載
の絶縁膜形成方法。
6. The insulating film forming method according to claim 1, wherein a contact angle between an end of said insulating film and said substrate is controlled to be less than 90 degrees.
【請求項7】 前記絶縁膜を、表面伝導型電子放出素子
用または該素子を用いた画像形成装置用の層間絶縁膜と
して形成する請求項1〜6いずれかに記載の絶縁膜形成
方法。
7. The method for forming an insulating film according to claim 1, wherein said insulating film is formed as an interlayer insulating film for a surface conduction electron-emitting device or an image forming apparatus using said device.
JP31832498A 1998-10-22 1998-10-22 Formation of insulating film on element circuit substrate Pending JP2000133649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31832498A JP2000133649A (en) 1998-10-22 1998-10-22 Formation of insulating film on element circuit substrate

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Publication Number Publication Date
JP2000133649A true JP2000133649A (en) 2000-05-12

Family

ID=18097920

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Country Link
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