JP2000132286A - Data processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To arbitrarily set an input/output relation between respective substrate and to improve versatility by generating a control signal in accordance with a combination of the substrates, supplying each switching means with this, switching a connection of each switching means and forming the connection relation of connection lines in accordance with the combination of substrates. SOLUTION: Boards 32, 33 and 34 connect each of connection lines L1 to L5, L11 to L15 and L21 to L25 to corresponding buses B11 to B15 respectively. Respective switches SW1 to SW10 switch their connection states respectively on the basis of a control signal supplied by a bus switch control 35. In this way, in a data processor 30, only an area is occupied where the data are transferred out of the respective buses B11 to B15 and plural data are transmitted by a single bus by switching the connection states of respective switches SW1 to SW10 in accordance with the combination of respective boards 32 to 34.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing apparatus, and is suitably applied to, for example, an editing system constructed by combining extension boards of a personal computer (PC).

[0002]

2. Description of the Related Art Conventionally, a PCI (Peripheral Component Interconn
ect) Many devices connected to a general-purpose external bus such as a bus are manufactured, and a desired data processing system is configured by combining these expansion boards. By the way, in an editing system constructed by combining a plurality of expansion boards connected to a general-purpose external bus, it is necessary to simultaneously transmit and receive a huge amount of audio data and video data. There was a problem that a sufficient data transfer capacity could not be obtained simply by using it.

In order to avoid such a problem, there is an editing system in which a plurality of extension boards are connected using a dedicated motherboard. FIG. 6 shows a configuration of a conventional editing system 1 using such a dedicated motherboard. This editing system 1 uses a video I / O (In
put and Output) board 2, disk recorder board 3, image processing boards 4 to 6, and switcher board 7, and these boards are connected by a dedicated motherboard 8. The video I / O board 2 has a VTR (Vi
A deo Tape Recorder 9 and a monitor 10 are connected.

The video I / O board 2 converts the video data S1 reproduced from the disc recorder board 3 into a VTR 9
To be recorded on the VTR 9 or transmitted to the monitor 10 for display on the monitor 10.
The video I / O board 2 sends the video signal S2 reproduced from the VTR 9 to the disc recorder board 3 and records the video signal S2 on the disc recorder board 3.

The disk recorder board 3 reproduces, for example, video data S3 to S5 of three channels, sends the video data S3 to the image processing board 4, sends the video data S4 to the image processing board 5, and The data S5 is sent to the image processing board 6. The image processing board 4 is a board for performing image processing such as special effect processing, and performs predetermined image processing on the video data S3.
The resulting video data S6 is sent to the switcher board 7.

Similarly, the image processing boards 5 and 6 are boards for performing predetermined image processing, respectively, and perform predetermined image processing on video data S4 and S5, respectively, and process the resulting video data S7 and S8. Each is sent to the switcher board 7. The switcher board 7 combines the video data S6 to S8, sends out the resulting video data S9 to the disk recorder board 3, and records the video data S9 on the disk recorder board 3.

As described above, in the editing system 1, a bus for inputting / outputting a plurality of video data from each board is defined, and a large amount of video data can be transferred at the same time.

In order to avoid the above problem that the data transfer capacity cannot be sufficiently obtained, there is an editing system using a general-purpose motherboard. FIG. 7, in which parts corresponding to those in FIG. 6 are assigned the same reference numerals, shows a configuration of a conventional editing system 20 using a general-purpose motherboard, and is the same as the above-described editing system 1 except for the configuration of a general-purpose motherboard 21. Is configured.

The general-purpose motherboard 21 includes buses B1 to B7.
And the plurality of buses B1 to B7 are allocated between the slots. Specifically, the bus B1 includes the disk recorder board 3 and the video I / O
It is used for data transfer between the board 2, the disk recorder board 3, and the image processing board 4. The bus B2 is used for data transfer between the disk recorder board 3 and the image processing board 5, and the bus B3 is used for data transfer between the disk recorder board 3 and the image processing board 6.

The bus B4 is used for data transfer between the image processing board 4 and the switcher board 7, and the bus B5 is
The bus B6 is used for data transfer between the image processing board 5 and the switcher board 7, and the bus B6 is used for data transfer between the image processing board 6 and the switcher board 7. Bus B7
Are the switcher board 7 and the disc recorder board 3
It is used for data transfer between the video I / O board 2 and the disk recorder board 3.

[0011]

The editing system 1 using the dedicated motherboard 8 is not versatile enough to cope with various connection relationships. It is necessary to prepare a desired number of motherboards in advance. For this reason, in the editing system 1 using the dedicated motherboard 8,
There is no degree of freedom to change the combination of each board and the arrangement of input / output pins, and there is a problem that it is difficult to realize desired functions by combining various boards.

On the other hand, in the editing system 20 using the general-purpose motherboard 21, the degree of freedom is improved as compared with the editing system 1 using the special motherboard 8, but all the boards share the buses B1 to B7. Therefore, each board occupies the bus used by each board. For this reason, in the editing system 20, when the number of boards to be combined increases, the bus B
Had to be increased.

The present invention has been made in view of the above points, and it is an object of the present invention to propose a data processing apparatus capable of further improving the versatility as compared with the prior art.

[0014]

According to the present invention, a plurality of connecting lines provided on a plurality of substrates on which electronic circuits are arranged are connected to a desired bus among a plurality of bus lines. In a data processing device constructed by connecting to a line, a plurality of switching means for switching connection of a connection line of a substrate connected via a bus line based on a supplied control signal, and a combination of a substrate and Control means for generating a control signal, supplying the control signal to each switching means, and switching the connection of each switching means to form a connection relation of connection lines according to the combination of the substrates is provided.

By appropriately switching the connection of the connection lines of the boards connected via the bus lines according to the combination of the boards, the input / output relationship between the boards can be arbitrarily set.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

(1) First Embodiment In FIG. 1, reference numeral 30 indicates the configuration of a data processing device as a whole, and a CPU (Central Processing Unit) 31
It is composed of boards 32 to 34 on which electronic circuits are arranged, a bus switch control 35, and a general-purpose motherboard 36 including buses B11 to B15. CPU
31 is a board 32 to 34 via a PCI bus B10,
It is connected to the bus switch control 35.

The board 32 connects the connection lines L1 to L5 to the corresponding buses B11 to B15 via the slots ST1 of the general-purpose motherboard 36, respectively. That is, the connection line L1 of the board 32 is connected to the bus B via the slot ST1.
11, the connection line L2 is connected to the bus B12 via the slot ST1, the connection line L3 is connected to the bus B13 via the slot ST1, and the connection line L4 is connected to the slot S
It is connected to the bus B14 via T1, and the connection line L5 is connected to the bus B15 via the slot ST1.

The board 33 includes connection lines L11 to L1.
5 are connected to the corresponding buses B11 to B15 via the slot ST2 of the general-purpose motherboard 36. That is, the connection line L11 of the board 33 is connected to the bus B11 via the slot ST2, and the connection line L12 is connected to the slot S2.
The connection line L13 is connected to the bus B13 via the slot ST2, and the connection line L13 is connected to the bus B12 via the slot T2.
14 is connected to the bus B14 via the slot ST2,
The connection line L15 is connected to the bus B15 via the slot ST2.

Further, the board 34 includes connection lines L21 to L21.
25 are connected to the corresponding buses B11 to B15 via the slots ST3 of the general-purpose motherboard 36, respectively.
That is, the connection line L21 of the board 34 is connected to the bus B11 via the slot ST3, the connection line L22 is connected to the bus B12 via the slot ST3, and the connection line L23 is connected to the bus B13 via the slot ST3. Line L24 is connected to bus B14 via slot ST3, and connection line L25 is connected to bus B15 via slot ST3.
Connected to.

The slot ST1 and the slot ST
Between the two, a switch SW1 for dividing the bus B11, a switch SW2 for dividing the bus B12, a switch SW3 for dividing the bus B13, a switch SW4 for dividing the bus B14, and a switch SW5 for dividing the bus B15. Is provided.

Between the slot ST2 and the slot ST3, a switch SW6 for dividing the bus B11 and a bus B
12, a switch SW8 for dividing the bus B13 and a switch S for dividing the bus B14.
W9 and a switch SW10 for dividing the bus B15 are provided.

Each of the switches SW1 to SW10 is, for example, of the analog switch type, thereby easily realizing a bidirectional switch with a small delay. Each of the switches SW1 to SW10 switches its connection state based on a control signal supplied from the bus switch control 35. Thus, in the data processing device 30, each board 32 to
By switching the connection states of the switches SW1 to SW10 in accordance with the combinations of 34, only the area to which data is transferred among the buses 11 to B15 is occupied, and a plurality of data are transmitted by one bus. It has been done.

FIG. 2 shows an editing system 4 constructed using the principle of data transfer in the data processing apparatus 1 described above.
0 is shown. The editing system 40 has a video I / O board 41, a disc recorder board 42, image processing boards 43 to 45, and a switcher board 46 as expansion boards, and these boards are connected to buses B21 to B2.
5, and the connection state is controlled by a bus switch control 48. Video I / O board 4
A VTR 49 and a monitor 50 are connected to 1.

As shown in FIG. 3, the video I / O board 41 includes a signal processing section 41A and an input / output switching section 41B. The signal processing section 41A is a circuit for performing signal processing such as format conversion. The signal processing section 41A performs predetermined signal processing on video data supplied from the input / output switching section 41B, and switches the video data obtained as a result of input / output switching. This is sent to the unit 41B.

The input / output switching section 41B includes a slot ST11.
A desired bus B is selected from a plurality of buses B21 to B25 connected through the bus, and data is exchanged via the selected bus B. In this case, the input / output switching unit 41B selects the bus B21, selects and inputs the video data supplied from the bus B21, and selects the bus B25 to output the video data to the bus B25. It has been done.

The disk recorder board 42, like the video I / O board 41 shown in FIG. 3, comprises a signal processing unit and an input / output switching unit (not shown). The signal processing unit is a circuit for recording and reproducing video data, and the input / output switching unit selects a desired bus B from the buses B21 to B25 connected via the slot ST12, This is a circuit for exchanging video data via the selected bus B. In this case, the disk recorder board 42 inputs video data supplied from the bus B25 to the inside, and supplies video data output to the outside to the buses B21, B22, and B23.

The image processing board 43, like the video I / O board 41 shown in FIG. 3, comprises a signal processing unit and an input / output switching unit (not shown). The signal processing unit is a circuit for performing image processing such as special effect processing, and the input / output switching unit selects a desired bus B from the buses B21 to B25 connected via the slot ST13. Then, video data is exchanged via the selected bus B. In this case, the image processing board 43 inputs the video data supplied from the bus B21 to the inside, and supplies the video data output to the outside to the bus B24.

The image processing board 44, like the video I / O board 41 shown in FIG. 3, comprises a signal processing unit and an input / output switching unit (not shown). The signal processing unit is a circuit for performing image processing such as special effect processing, and the input / output switching unit selects a desired bus B from the buses B21 to B25 connected via the slot ST14. Then, video data is exchanged via the selected bus B. In this case, the image processing board 44 inputs the video data supplied from the bus B22 to the inside, and supplies the video data output to the outside to the bus B21.

The image processing board 45, like the video I / O board 41 shown in FIG. 3, comprises a signal processing unit and an input / output switching unit (not shown). The signal processing unit is a circuit for performing image processing such as special effect processing, and the input / output switching unit selects a desired bus B from the buses B21 to B25 connected via the slot ST15. Then, video data is exchanged via the selected bus B. In this case, the image processing board 45 inputs the video data supplied from the bus B23 to the inside, and supplies the video data output to the outside to the bus B22.

The switcher board 46, like the video I / O board 41 shown in FIG. 3, comprises a signal processing unit and an input / output switching unit (not shown). The signal processing unit is a circuit for synthesizing video data, and the input / output switching unit selects a desired bus B from the buses B21 to B25 connected via the slot ST16 and performs the selection. Data is exchanged via the bus B. In this case, the switcher board 46 is connected to the bus B
The video data supplied from 21, B22 and B24 is input to the inside, and the video data output to the outside is supplied to the bus B25.

The slots ST13 and S
Between T14, a switch SW21 that divides the bus B21
A switch SW22 for dividing the bus B22;
A switch SW23 for dividing the bus B23, a switch SW24 for dividing the bus B24, and a switch SW25 for dividing the bus B25 are provided.

The slots ST14 and ST1
A switch SW26 for dividing the bus B21 between
A switch SW27 for dividing the bus B22;
, A switch SW29 for dividing the bus B24, and a switch S for dividing the bus B25.
W30 are provided.

Further, the slots ST15 and ST
A switch SW31 for dividing the bus B21 is provided between the switches 16
A switch SW32 for dividing the bus B22;
A switch SW33 that divides the bus 23, a switch SW34 that divides the bus B24, and a switch SW35 that divides the bus B25 are provided.

Each of the switches SW21 to SW35 switches their connection state based on a control signal supplied from the bus switch control 48. In this case, the switches SW21, SW27 and S
W33 switches the connection state to the off state, and switches SW22 to SW26, SW28 to SW32, and SW3.
4 and the SW 35 switch the connection state to the ON state.

Thus, the video I / O board 41 stores the video data S reproduced from the disc recorder board 42.
21 is sent to the VTR 49 and recorded on the VTR 49, or sent to the monitor 50 and displayed on the monitor 50. The video I / O board 41 has V
The video signal S22 reproduced from the TR 49 is transmitted to the disc recorder board 42 and recorded on the disc recorder board 42.

The disk recorder board 42 is, for example, 3
By reproducing the video data S23 to S25 of the channel,
The video data S23 is transmitted to the image processing board 43, the video data S24 is transmitted to the image processing board 44, and the video data S25 is transmitted to the image processing board 45.

The image processing board 43 is a board for performing image processing such as special effect processing. The image processing board 43 performs predetermined image processing on the video data S23, and sends the resulting video data S26 to the switcher board 46. . Similarly, the image processing boards 44 and 45 are boards for performing predetermined image processing, respectively, and perform predetermined image processing on the video data S24 and S25, respectively, and convert the resulting video data S27 and S28 into a switcher board. To 46.

The switcher board 46 combines the video data S26 to S28, sends out the resulting video data S29 to the disk recorder board 42, and records it on the disk recorder board 42.

In the above configuration, in the editing system 40, between the slots ST13 and ST14 in each of the buses B21 to B25 of the general-purpose motherboard 47 and the slot ST1
4 and ST15 and between slots ST15 and ST16, switches SW21 to SW35 are provided respectively, and an input / output switching unit for selecting and switching a bus B for exchanging data among the buses B21 to B25 is provided on each of the boards 41 to 46. Provided.

By switching the connection state of the switches SW21 to SW35 according to the combination of boards connected to the general-purpose motherboard 47, each board does not occupy the bus as in the related art. Since it is only necessary to occupy between the boards for transferring video data among B, a plurality of video data are transmitted on one bus B, and the number of buses B21 to B25 is reduced as compared with the conventional case.

Further, by selectively switching the bus B for exchanging data between the boards 41 to 46 according to the combination of boards connected to the general-purpose motherboard 47, the board 41 capable of coping with various connection relationships is provided. ~ 4
6 is realized, and the versatility of the board is improved.

According to the above configuration, the general-purpose motherboard 4
7, the connection state of the switches SW provided between the slots ST of each bus B is switched, and the buses for exchanging video data among the buses B are adaptively switched. By switching, a large number of video data can be transferred while reducing the number of buses B. Thus, the versatility can be further improved as compared with the conventional one while the transfer efficiency of the video data is improved with a simple configuration.

(2) Second Embodiment FIG. 4 shows the configuration of an editing system 60 according to a second embodiment. This editing system 60, as an extension board,
Video I / O board 61, disk recorder board 6
2. Image processing boards 63 to 65, switcher board 66
These boards are connected by a general-purpose motherboard 68 including a matrix switch 67,
The connection state is switched based on a control signal S40 sent from the matrix switch control 69. The video I / O board 61 has
The VTR 70 and the monitor 71 are connected.

As shown in FIG. 5, the matrix switch 67 is composed of thirty buses B31 to B60, and connects desired boards via these buses B31 to B60. Specifically, video I / O
Of the first connection lines L31 of the board 61, the video I
Input connection line L for inputting video data to I / O board 61
31A is connected to buses B31 to B60 via switches SW101 to SW130, respectively, and is connected to video I / O board 61 via switch SW131, while outputting video data from video I / O board 61. The output connection line L31B is connected to the bus B31.

Second connection line L of video I / O board 61
32, the input connection line L32A for inputting video data to the video I / O board 61 is connected to the switch SW14.
1 to SW170, are connected to the buses B31 to B60, respectively, and are connected to the video I / O board 61 via the switch SW171. On the other hand, the output connection line L32B outputs video data from the video I / O board 61.
Are connected to the bus B32.

Third connection line L of video I / O board 61
33, the input connection line L33A for inputting video data to the video I / O board 61 is connected to the switch SW18.
1 to SW210, are connected to the buses B31 to B60, respectively, and are connected to the video I / O board 61 via the switch SW211. On the other hand, the output connection line L33B outputs video data from the video I / O board 61.
Are connected to the bus B33.

Fourth connection line L of video I / O board 61
34, the input connection line L34A for inputting video data to the video I / O board 61 is connected to the switch SW12.
1 to SW250, are connected to the buses B31 to B60, respectively, and are connected to the video I / O board 61 via the switch SW251. On the other hand, the output connection line L34B outputs video data from the video I / O board 61.
Are connected to the bus B34.

Fifth connection line L of video I / O board 61
35, the input connection line L35A for inputting video data to the video I / O board 61 is connected to the switch SW26.
1 to SW290, are connected to the buses B31 to B60, respectively, and are connected to the video I / O board 61 via the switch SW291, while the output connection line L35B outputs video data from the video I / O board 61.
Are connected to the bus B35.

Subsequently, among the first connection lines L41 of the disk recorder board 62, the input connection line L41A is connected to the buses B31 to B6 via the switches SW301 to SW330.
0 while being connected to the disk recorder board 62 via the switch SW331.
Output connection line L41B is connected to bus B36.

The input connection line L42A among the second connection lines L42 of the disk recorder board 62 is connected to the switch SW.
The output connection line L42B is connected to the bus B37, while being connected to the buses B31 to B60 via the switches 341 to 370 and to the disk recorder board 62 via the switch SW371, respectively.

The input connection line L43A among the third connection lines L43 of the disk recorder board 62 is connected to the switch SW.
The output connection line L43B is connected to the bus B38 while being connected to the buses B31 to B60 via the switches 381 to SW410 and to the disk recorder board 62 via the switch SW411.

Hereinafter, the connection lines of the disk recorder board 62, the image processing boards 63 to 65, and the switcher board 66 are similarly connected to the buses B31 to B60, and the input connection line L among the connection lines L of each board is Connected to the respective buses B31 to B60 via the switch SW,
The output connection line L is connected to a desired bus B while being connected to each board via the switch SW.

In this state, the matrix switch control 69 generates a control signal S 40 in accordance with the combination of boards connected to the general-purpose motherboard 68, sends it to the matrix switch 67, and sends the control signal S 40 to each of the matrix switches 67. The connection state of the switch SW is switched.

Thus, the video I / O board 61 stores the video data S reproduced from the disc recorder board 62.
41 is sent to the VTR 70 and recorded on the VTR 70, or sent to the monitor 71 and displayed on the monitor 71. The video I / O board 61 has V
The video signal S42 reproduced from the TR 70 is sent to the disc recorder board 62 and recorded on the disc recorder board 62.

The disk recorder board 62 is, for example, 3
By reproducing the video data S43 to S45 of the channel,
The video data S43 is transmitted to the image processing board 63, the video data S44 is transmitted to the image processing board 64, and the video data S45 is transmitted to the image processing board 65. The image processing board 43 performs predetermined image processing on the video data S43, and sends out the resulting video data S46 to the switcher board 66. Similarly, the image processing boards 64 and 65 are boards for performing predetermined image processing, perform predetermined image processing on the video data S44 and S45, respectively, and switch the resulting video data S47 and S48 to the switcher board, respectively. 66.

The switcher board 66 combines the video data S46 to S48, sends out the resulting video data S49 to the disk recorder board 62, and records it on the disk recorder board 62.

In the above configuration, the general-purpose motherboard 6
In the matrix switch 67 of No. 8, among the connection lines L connected to each board, the input connection line L is connected to each of the buses B31 to B60 via the switch SW, and the input connection line L is connected to the switch SW. The output connection line L is connected to a desired bus B, while being connected to each board via the bus.

The connection state of each switch SW provided in the matrix switch 67 is described by the general-purpose motherboard 6.
By switching in accordance with the combination of boards connected to the board 8, there is no need to provide an input / output switching unit on each board, as compared with the editing system 40 according to the first embodiment. The versatility that can set the input / output relation of arbitrarily is improved.

According to the above configuration, the general-purpose motherboard 6
The input / output relationship between the boards can be arbitrarily set by adaptively switching the connection state of each switch SW provided in the matrix switch 67 in accordance with the combination of boards connected to the switch 8. Thus, versatility can be further improved as compared with the related art.

(3) Other Embodiments In the above embodiment, the general-purpose motherboard 4
The case where an analog switch is used as the switch SW provided in the switches 7 and 68 has been described. However, the present invention is not limited to this, and the point is that any switching means that can switch the connection state may be used.

Further, in the above-described embodiment, the case where the present invention is applied to the general-purpose motherboards 47 and 68 comprising a bus B for transferring video data has been described. As described above, the present invention can be widely applied to a substrate including signal lines for transferring various data.

Further, in the above-described embodiment, the case where the present invention is applied to the editing systems 40 and 60 constructed by combining extension boards of a personal computer has been described. However, the present invention is not limited to this. The present invention can be widely applied to various other data processing apparatuses, such as an apparatus constructed by combining expansion boards of other computers.

[0064]

As described above, according to the present invention, the connection between the connection lines of the boards connected via the bus lines is adaptively switched in accordance with the combination of the boards, so that the input / output between the boards is performed. The relationship can be set arbitrarily, and the versatility can be further improved as compared with the related art.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a data processing device according to the present invention.

FIG. 2 is a block diagram illustrating an editing system according to the first embodiment.

FIG. 3 is a block diagram illustrating a configuration of a video I / O board.

FIG. 4 is a block diagram illustrating an editing system according to a second embodiment.

FIG. 5 is a block diagram illustrating a configuration of a matrix switch.

FIG. 6 is a block diagram showing a configuration of a conventional editing system.

FIG. 7 is a block diagram illustrating a configuration of a conventional editing system.

[Explanation of symbols]

30, data processing device, 32, 33, 34 board, 35, 48 bus switch control, 36,
47, 68: General-purpose motherboard, 40, 60: Editing system, 67: Matrix switch, 69: Matrix switch control, B: Bus, ST ...
Slot, SW ... Switch.

Claims (3)

[Claims] 1. A data processing apparatus constructed by connecting a plurality of connection lines respectively provided on a plurality of substrates on which electronic circuits are arranged to a desired bus line among a plurality of bus lines. A plurality of switching means for switching the connection of the connection line of the board connected via the bus line, based on the control signal, and generating the control signal in accordance with a combination of the boards; A data processing apparatus comprising: a control unit configured to form a connection relationship of the connection lines in accordance with a combination of the substrates by supplying a connection to the switching unit and switching connections of the switching units. 2. The apparatus according to claim 1, wherein said board includes a selection means for selectively switching a desired one of said connection lines, and each of said switching means is provided on each of said bus lines. Item 2. The data processing device according to item 1. 3. The data processing apparatus according to claim 1, wherein each of said switching means is provided between each of said connection lines and each of said bus lines.