JP2000124442A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the manufacturing method of a high withstand voltage semiconductor device and a semiconductor device by alleviating the electric field of a PN junction curved part where electric field is concentrated. SOLUTION: A P-type anode diffusion layer 2 is provided on an N-base layer 1, P-type field limiting rings 3a to 3m are provided continuously in ring form surrounding the anode diffusion layer 2, and a silicon oxide film 5 is provided on the rings 3a to 3m. Aperture parts 5a to 5d are provided on the prescribed positions of the silicon oxide film 5 on the field limiting rings 3e to 3h, where electric field which is previously required is concentrated, and field plate rings 6a to 6d are arranged on the aperture parts 5a to 5d. Also, in order to enhance relaxation of electric field, a passivation film is provided on the above-mentioned field limiting rings 3a to 3m.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor for a high withstand voltage power, and more particularly to a thyristor and a junction final end portion of a diode.

[0002]

2. Description of the Related Art As shown in FIG. 6 (in this case, a diode is shown), a conventional planar power semiconductor for high withstand voltage power has an N ⁻ base layer 1 on an N ⁺ buffer diffusion layer 18.
9 is provided with a P-type anode diffusion layer 16, and an anode aluminum electrode 11 in contact with the anode diffusion layer 16 and an N ⁺
The cathode aluminum electrode 13 provided below the buffer diffusion layer 18 forms a diode electrode.

In the diode having the above structure, the electric field intensity at the curved portion of the junction between the N ⁻ base layer 19 and the P-type anode region 16 is higher than that of the other portions, so that the junction breakdown voltage is determined by this portion. , The withstand voltage is considerably lower than that of the planar junction.
state Electronics ”Vol. 9 (1966)
Year) M. Sze and G.S. Reported by Gibbons.

[0004] For this reason, various methods have been proposed as a method of weakening the electric field strength of the above-mentioned curved joint portion.
For example, the electric field strength can be weakened by extending the depletion layer generated when a reverse bias is applied to the PN junction inside the substrate, mainly in the lateral direction. In the method of extending the depletion layer, for example, in the case of a high withstand voltage element having a withstand voltage of 4500 V or more, a field limiting ring for expanding the depletion layer on a silicon substrate having a low impurity concentration is applied in multiple layers. On the outer periphery of the joint.

This field limiting ring is indicated by reference numeral 17 in FIG.
As shown in the upper right quarter plan view of the above-mentioned diode, the diode is formed in a continuous ring shape to the vicinity of the equipotential ring 12 so as to surround the anode aluminum electrode 11 and the anode diffusion layer 16.

In the conventional structure, the region constituted by the field limiting ring 17 has a three-layer structure of Si / SiO ₂ / Si ₃ N _{4 in} the element longitudinal direction. In the process, there are many mobile ions and trap charges which are inevitable to be mixed, and in particular, interfacial fixed charges and interface states exist between silicon and the oxide film.

FIGS. 8A to 8C are diagrams showing the change of the depletion layer due to the above-mentioned electric charge and the location of the concentration of the electric field.
The part surrounded by a circle is where the electric field is concentrated. FIG. 8A shows a diagram of a depletion layer around a field limiting ring as a guard ring which is not affected by the charge and the like. On the other hand, FIG.
As shown in (c), an inversion layer or an enhanced layer is formed on the silicon surface affected by the charge and the like containing the above elements, and the spread width of the depletion layer at the junction changes. However, there is a problem that electric field concentration occurs near the surface, and a stable breakdown voltage cannot be obtained.

There is also a method of providing a field plate ring on all the field limiting rings in order to make the depletion layer inside the substrate easier to spread and to stabilize the potential. FIG. 9 (a) shows a field plate on a field limiting ring.
An example in which a metal electrode as a ring is provided is shown. As shown in this figure, when the + ions move near the electric field by the provided field plate ring,
The electrons in the figure also move freely, the high concentration region is eliminated, and the electric field concentration at the junction is released.

Further, in order to improve the reliability of the device, a method of using a silicon nitride film having low hygroscopicity and excellent blocking properties against an alkali metal such as Na as a passivation film on the field limiting ring. There is also.

FIG. 9B shows an example in which a semi-insulating protective film as a passivation film is provided on the field plate ring. As shown in this figure, by connecting the field plate ring with a semi-insulating protective film, even in the portion not covered by the field plate ring, + ions move to the vicinity of the electric field.
The electrons also move freely, the high concentration region is eliminated, and the electric field concentration at the junction is released. In other words, the field plate
The same effect as in the case where the ring is provided can be obtained even in a portion where the ring is not provided, and the effect of the field limiting ring can be extended to the entire device.

Further, by changing the composition of the silicon nitride film to a silicon-rich one, the resistivity changes from insulating to more conductive, thereby attracting ionic impurities in the oxide film. In addition, the enhanced layer generated near the surface of the silicon substrate can be canceled.

[0012]

However, in any of the above-described methods, the depletion layer itself extends in the lateral direction in the device, but the field limiting of the device.
Since the distribution of the electric field strength in the ring region is not taken into account, the depletion layer is expanded uniformly regardless of the strength of the electric field concentration in the substrate, and the effective design of the device is increased while the design area of the device is increased. I couldn't.

From our experimental results, it can be seen from FIG. 6 that the depletion layer spreads too much laterally and
As a result, the electric field was concentrated at the N ⁺ stopper layer 10 formed on the outermost periphery of the limiting ring region.

Further, a field amplification type of a successive amplification type (a structure in which the distance between the field limiting rings becomes wider toward the outer periphery of the element: a high breakdown voltage is obtained because the depletion layer is effectively spread). When a ring is used, the distance between the inner and outer field limiting rings is narrow, and when a field plate ring is formed, discharge may occur. .

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device having a high withstand voltage by effectively relaxing only an electric field at an electric field concentrated portion in a semiconductor device so that the above problem does not occur.

[0016]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
A plurality of field limiting rings are formed so as to surround a periphery of an electrode of a semiconductor device having an N junction on a circumference, and a field plate ring is arranged on the field limiting ring. In the manufacturing method, in advance, an electric field concentration area where the electric field of the field limiting ring is concentrated is determined, and then, the field limiting ring is arranged according to the determined electric field concentration area. Features.

According to a second aspect of the present invention, the electric field concentration region is obtained by applying a reverse bias to the PN junction.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the first or second aspect, after disposing the field plate ring, the method further comprises: Forming a passivation film on the field limiting ring including the plate ring;

According to another aspect of the present invention, there is provided a semiconductor device having a plurality of field limiting rings formed so as to surround a circumference of an electrode of a semiconductor device having a PN junction. The apparatus is characterized in that a field plate ring is formed only in an electric field concentration region where the electric field of the field limiting ring is concentrated.

According to a fifth aspect of the present invention, there is provided the semiconductor device according to the fourth aspect, wherein
A passivation film is further formed on the field limiting ring including the plate ring.

Therefore, according to the first, second or fourth aspect of the present invention, the field plate ring is formed only in the electric field concentration region where the electric field of the field limiting ring is concentrated. Therefore, an even electric field is shared in the semiconductor device, and the depletion layer in the semiconductor device expands according to the strength of the electric field.

According to the third or fifth aspect of the present invention, a passivation film is further formed on the field limiting ring.
As in the case where the field plate rings are arranged on all the field limiting rings, an equal electric field is shared in the semiconductor device, and a depletion layer in the semiconductor device is formed according to the strength of the electric field. spread.

[0023]

Embodiments of the present invention will be described below with reference to the drawings. The first and second embodiments described below show a case where an electric field concentration region exists in an intermediate portion of a semiconductor device. FIG. 1 is a partial sectional view of a diode according to a first embodiment of the present invention. FIG.
In the semiconductor device according to the present embodiment, a P-type anode diffusion layer 2 is provided on an N ⁻ base layer 1 and a P-type field diffusion layer is formed in a continuous ring shape so as to surround the P-type anode diffusion layer 2.
Limiting rings 3a to 3m are provided.
The electrode of the diode is constituted by the electrode 4 which is the main electrode in contact with the anode diffusion layer 2 and an electrode (not shown) provided below the N ^- base layer 1.

A silicon oxide film 5 is provided on the field limiting rings 3a to 3m, and a field limiting ring in an electric field concentration region where an electric field determined in advance based on the following simulation or the like is concentrated. Openings 5a to 5d are provided at predetermined positions of the silicon oxide film 5 corresponding to 3e to 3h.
Field plate rings 6a to 6d are arranged so as to cover limiting rings 3e to 3h.

In the semiconductor device of the first embodiment, the field limiting ring 3 in which the electric field is concentrated
e to 3h only for field plate rings 6a to 6
By covering with d, a more even distribution of the electric field is performed in each field limiting ring, and the depletion layer can be expanded according to the strength of the electric field concentration. As a result, the breakdown voltage of the semiconductor device can be increased. .

FIG. 2 shows a second embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In the second embodiment, silicon-rich silicon is further provided on the field limiting rings 3a to 3m including the field plate rings 6a to 6d in the electric field concentration region of the structure of the first embodiment. It is covered with a resistive (semi-insulating) passivation film 7 represented by a nitride film.

The semiconductor device having the structure of the second embodiment can provide the same effect as the case where the field plate rings are arranged on all the field limiting rings, and can provide the field plate.・ The original function of the ring can be brought out. That is, the function of attracting ionic impurities in the oxide film and canceling the enhanced layer or the like generated near the surface of the silicon substrate can be effectively brought out, and the original function is that no voltage is directly applied. This occurs in all the field plate rings, and as the distance to the outer peripheral portion increases, the shared voltage is weakened, and the depletion layer can be effectively extended outward. As a result, the breakdown voltage of the semiconductor device can be increased.

Next, an example of a simulation result in the case where the field plate ring described in the first and second embodiments is efficiently arranged only at the electric field concentrated portion of the field limiting ring will be described. .

In Table 1 below, a is the initial interval (the interval between the anode region and the first field limiting ring), and b is the amplification pitch (for example, the interval between the first and second lines is a + b, 2 The distance between the third and the third line is a
+ 2b,...), And Table 1 shows the breakdown voltage values and breakdown locations of the field limiting ring created with a diffusion window of 10 μm and a depth of 17 μm, using the parameters a and b as parameters. Numerical values shown in parentheses in Table 1 indicate the number of field limiting rings, and all designs are set within 1500 μm from the viewpoint of reducing the element area.

[0030]

[Table 1]

FIGS. 3A to 3C show typical results in three breakdown regions (the first stage, the middle portion, and the last stage of the field limiting ring). . In the figure, a region surrounded by a circle is a place where the electric field is stronger than other regions.

As shown in Table 1 and an example of the simulations shown in FIGS. 3A to 3C, the place where breakdown occurs due to the design value of the field limiting ring, that is, the place where the electric field is concentrated is determined by the field.・ The ring is divided into three stages: the first stage, the middle, and the last stage of the limiting ring. In each embodiment of the present invention, the field plate ring is efficiently arranged based on the electric field concentration region represented by the simulation result.

FIG. 4 shows a third embodiment of the present invention. 1 and 2 are denoted by the same reference numerals and description thereof will be omitted. As shown in the third embodiment, according to the present invention, as in the first and second embodiments, the amplification pitch is a linear expression (eg, a, a + b, a +
The present invention can be applied not only to the value represented by 2b) but also to a design including terms of squares, cubes,... (For example, the first field limiting ring as shown in FIG. 5). And ln the spacing between each field limiting ring, then ln
= A + (n-1) b + (n-1) 2 c + (n-1) is represented as being at ³ d. ). Note that the numerical values shown in FIGS. 4 and 5 are examples, and the present invention is not limited thereto.

[0034]

As described above, the first and second aspects of the present invention are described.
According to the method of manufacturing a semiconductor device of the first aspect and the semiconductor device of the fourth aspect, the field plate ring is formed only in the electric field concentration region where the electric field of the field limiting ring is concentrated. An electric field is shared, a depletion layer in the semiconductor device expands according to the strength of the electric field, and only the electric field in the electric field concentration region can be effectively relaxed, so that the withstand voltage of the semiconductor device can be increased. It works.

Further, according to the method of manufacturing a semiconductor device of the third aspect of the present invention and the semiconductor device of the fifth aspect, the above-described effects can be obtained and the field limiting method can be used.
Since the passivation film is further formed on the ring, the same effect as when the field plate ring is arranged on all the field limiting rings can be obtained.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a semiconductor device according to a first embodiment.

FIG. 2 is a partial cross-sectional view of a semiconductor device according to a second embodiment.

FIGS. 3A to 3C are diagrams illustrating a typical electric field intensity distribution in a field limiting ring, and FIG. 3A is a diagram illustrating an example of a case where an electric field is concentrated at a final stage; (Area in Table 1), (b) shows an example of a case where an electric field is concentrated at the first stage (Area in Table 1), (c)
FIG. 4 is a diagram (an area in Table 1) showing an example of a case where an electric field is concentrated at an intermediate portion.

FIGS. 4A to 4D are partial cross-sectional views of a semiconductor device according to a third embodiment.

FIG. 5 is a diagram illustrating the relationship between the number of field limiting rings, the distance to the first field limiting ring, and the distance between each field limiting ring according to the third embodiment.

FIG. 6 is a partial cross-sectional view of a conventional semiconductor device.

FIG. 7 is a top-right quarter plan view of the conventional semiconductor device.

FIGS. 8A to 8C are diagrams illustrating changes in a depletion layer due to surface charges in the conventional semiconductor device.

FIGS. 9A and 9B are diagrams illustrating the effect of a field plate ring.

[Explanation of symbols]

1 ... N ^- base layer 2 ... anode diffusion layer 3A～3m ... field limiting ring 4 ... anode aluminum electrode 5 ... silicon oxide film 6 a to 6 d ... field plate rings

Claims (5)

[Claims] A plurality of field limiting rings are formed so as to surround a periphery of an electrode of a semiconductor device having a PN junction, and a field plate ring is formed on the field limiting ring. In a method of manufacturing a semiconductor device in which a ring is arranged, an electric field concentration region where an electric field of the field limiting ring is concentrated is determined in advance, and then, the field limiting region is determined according to the determined electric field concentration region. A method for manufacturing a semiconductor device, comprising: arranging a ring. 2. The method according to claim 1, wherein the electric field concentration region is obtained by applying a reverse bias to the PN junction. 3. The method according to claim 1, further comprising, after disposing the field plate ring, further forming a passivation film on the field limiting ring including the field plate ring. A method for manufacturing a semiconductor device according to claim 2. 4. A field device formed so as to surround a periphery of an electrode of a semiconductor device having a PN junction.
A semiconductor device having a plurality of limiting rings, wherein a field plate ring is formed only in an electric field concentration region where an electric field of the field limiting ring is concentrated. 5. The semiconductor device according to claim 4, wherein a passivation film is further formed on the field limiting ring including the field plate ring.