JP2000124271A - Defect inspection apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a defect inspection apparatus, which can detect a defect in a wafer with high accuracy and reliability when a wafer is inspected, even when a wafer which does not have a pattern is inspected, and can perform continuous inspection to prevent the deterioration of working efficiency. SOLUTION: In a marking section 22 installed within a chamber 10, two points on an outermost periphery of a wafer 32 which does not have a pattern to form marks 34a and 34b for alignment are irradiated with a laser beam. Thereafter, according to a method similar to a wafer defect inspection method using prior art defect inspection apparatus, the non-pattern wafer 32 is inspected with respect to a defect. At this time, in place of a pattern used for alignment at the time of inspecting a defect in a patterned wafer, the alignment marks 34a and 34b are used to perform alignment and to accurately position an inspection location.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a defect inspection apparatus, and more particularly to a defect inspection apparatus for detecting a defect on a semiconductor wafer.

[0002]

2. Description of the Related Art Semiconductor wafers (hereinafter simply referred to as "wafers") used in a conventional semiconductor device manufacturing process.
), For example, dust, pattern defects, color unevenness, etc., will be described with reference to the schematic configuration diagram of FIG. 2 and the schematic plan view of FIG. As shown in FIG. 2, in the conventional defect inspection apparatus, the chamber 1
Stage 1 on which wafer 12 to be inspected is placed
4 is installed, and above the stage 14, the stage 1
An Hg (mercury) -Xe (xenon) lamp 16 for irradiating predetermined light to the surface of the wafer 12 placed on the wafer 4 is provided. Further, a half mirror 18 is provided between the Hg-Xe lamp 16 and the stage 14 so as to reflect light reflected from the surface of the wafer 12. Further, there is provided an image sensor 20 for performing image processing by making the reflected light from the surface of the wafer 12 reflected by the half mirror 18 incident.

[0003] Further, as shown in FIG.
Two loaders 26 and 28 and a transfer arm 30 are provided around 0, and transfer the wafer 12 to be inspected onto the stage 14 in the chamber 10.

Next, a method of inspecting a wafer using a conventional defect inspection apparatus will be described. Here, a wafer with a pattern is used as the wafer 12 to be inspected. First, after a wafer with a pattern to be inspected is placed on the loader 26 or the loader 28, the wafer with the pattern is transferred onto the stage 14 in the chamber 10 using the transfer arm 30. Then, after performing orientation flat alignment of the patterned wafer on the stage 14, alignment is performed using a part of the pattern.

Subsequently, the wafer with the pattern is inspected for defects. At this time, for example, in the case of inspecting a wafer for a pattern defect, the pattern of an adjacent chip or the pattern of an adjacent cell is compared on the assumption that chips or cells of the same pattern exist on both sides of the inspection location. That is, the image sensor 20 performs image processing on a predetermined inspection location and an adjacent location, and measures the luminance of each pixel (Pixel; minimum inspection area). Thereafter, a difference between the luminance of the pixel at the inspection location and the luminance of the pixel at the same coordinates on both sides is obtained, and two pseudo images are created. Further, these two pseudo images are compared, and if both of the luminances of the same coordinates are higher than a predetermined setting sensitivity, it is determined as a defect. Judge the noise.

As described above, in the conventional defect inspection apparatus 10, when a wafer with a pattern is to be inspected, it is possible to perform alignment using a part of the pattern. Defects can be detected with high accuracy and reliability by accurately determining the difference between the luminance and the luminance of the pixel at the same coordinates on both sides thereof.

[0007] Even if the patterned wafer 12 is once unloaded from the stage 14, it is aligned so that the coordinates of a predetermined inspection point do not shift at the next load on the stage 14. Can be inspected continuously and can be reviewed collectively later.

[0008]

By the way, the wafer 1
In the case of inspecting the defect No. 2, for example, when detecting a defect of an epitaxial layer grown on the entire surface of the wafer 12 or a defect of an oxide film formed on the entire surface of the wafer 12 in an initial step of a semiconductor device manufacturing process, there is no pattern. Wafers may be inspected. Further, for example, when investigating the generation of dust and its contents in each step, a wafer without a pattern may be an inspection target.

When such an unpatterned wafer is to be inspected, once the unpatterned wafer to be inspected is unloaded from the stage 14, a part of the pattern is used at the next loading on the stage 14. Since alignment cannot be performed and positioning must be performed only on the orientation flat of a wafer without a pattern, the coordinates of the inspection location are inevitably shifted. Therefore, it is not possible to perform the review at once after the continuous inspection, and the inspection and the review must be performed one by one. Therefore, there arises a problem that the working efficiency is greatly deteriorated.

Accordingly, the present invention has been made in view of the above-mentioned problems, and when inspecting a wafer for defects, even if a non-patterned wafer is to be inspected, a continuous inspection is possible. It is an object of the present invention to provide a defect inspection device capable of preventing a decrease in efficiency.

[0011]

The above object is achieved by the following defect inspection apparatus according to the present invention. That is, the defect inspection apparatus according to claim 1 is a defect inspection apparatus for detecting a defect in a semiconductor wafer, wherein a marking portion for forming an alignment mark is provided at a predetermined position on the semiconductor wafer. It is characterized by.

As described above, in the defect inspection apparatus according to the first aspect, since the alignment portion is formed at a predetermined position on the semiconductor wafer by the marking portion, even when a wafer without a pattern is to be inspected. ,
Since alignment can be performed using the alignment mark, the accuracy of positioning of a predetermined inspection location is improved. Therefore, even if the unpatterned wafer to be inspected is once unloaded from the stage,
At the next loading on the stage, alignment can be performed using the alignment marks so that the coordinates of the predetermined inspection location do not shift, so that it is possible to perform a batch review after continuous inspection . Therefore,
Work efficiency is prevented from deteriorating.

According to a second aspect of the present invention, in the defect inspection apparatus according to the first aspect, the marking section forms a mark for alignment by irradiating a predetermined position on the semiconductor wafer with a laser beam. By doing so, for example, without causing contamination due to scattering of ink, such as in the case of marking using ink, the alignment mark is accurately formed at a desired position with high accuracy,
The accuracy of alignment of inspection points using such alignment marks is improved.

In the defect inspection apparatus according to the first aspect of the present invention, it is preferable that the alignment mark is formed at at least two positions on the outermost peripheral portion of the semiconductor wafer. That is, in order to perform high-precision alignment of an inspection location using an alignment mark formed by a marking portion with an unpatterned wafer as an inspection target, alignment marks must be provided at least at two locations on the semiconductor wafer. In order to prevent these alignment marks from interfering with the defect inspection, it is desirable that the alignment marks be located at the outermost periphery of the semiconductor wafer.

[0015]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
An embodiment of the present invention will be described. FIG. 1A is a schematic plan view showing a defect inspection apparatus according to an embodiment of the present invention.
FIG. 2B is a plan view showing a wafer without a pattern on which an alignment mark is formed in the defect inspection apparatus of FIG. The schematic configuration diagram showing the defect inspection apparatus according to the present embodiment is the same as that in FIG.

The defect inspection apparatus according to the present embodiment is similar to the conventional defect inspection apparatus shown in FIG.
0, a stage 14 installed in the chamber 10 for mounting the wafer 12 to be inspected, and a stage 14
And an Hg-Xe lamp 16 for irradiating the surface of the wafer 12 mounted on the stage 14 with predetermined light.
And a half mirror 18 installed between the Hg-Xe lamp 16 and the stage 14 to reflect light reflected from the surface of the wafer 12, and receive reflected light from the surface of the wafer 12 reflected by the half mirror 18. And an image sensor 20 that performs image processing as main components.

As shown in FIG. 1A, a marking portion 22 for forming an alignment mark at a predetermined position on the wafer 12 to be inspected is installed in the chamber 10. This is a feature of the defect inspection apparatus according to the present embodiment. Also, this marking part 2
A transfer arm 24 is installed in the vicinity of 2 to transfer the wafer 12 to be inspected from the marking unit 22 onto the stage 14. Further, two loaders 26 and 28 and a transfer arm 30 are installed around the chamber 10 so as to transfer the wafer 12 to be inspected to the marking unit 22 in the chamber 10.

Next, a method of inspecting the wafer 12 using the defect inspection apparatus according to the present embodiment will be described. In addition,
Here, a wafer 32 without a pattern is used as the wafer 12 to be inspected. First, the wafer 32 without pattern to be inspected is placed on the loader 26 or the loader 28, and then the wafer 32 without pattern is transported to the marking section 22 in the chamber 10 by using the transport arm 30.

Subsequently, in the marking section 22,
By irradiating the laser beam to the two outermost peripheral portions opposing each other with the center of the non-patterned wafer 32 interposed therebetween, alignment marks 34a and 34b are formed as shown in FIG. 1B.

Here, the pattern-less wafer 32
The reason why the alignment marks 34a and 34b are formed at two positions opposed to each other with the center of the center is to perform high-precision alignment of inspection points. That is, in order to perform high-precision alignment of a predetermined inspection location using the alignment mark, alignment marks are required at least at two locations far away from the non-patterned wafer 32. In addition, these two alignment marks 34a and 34b are
The reason is that the alignment marks 34a and 34b do not hinder the defect inspection of the wafer 32 without a pattern.

Although not shown here, as a laser device used for irradiating a laser beam on the marking section 22, a laser device usually used for laser marking on a wafer may be used (Japanese Patent Laid-Open No. 54-5
No. 9698, JP-A-61-263234).

Subsequently, using the transfer arm 24 installed near the marking section 22, the pattern-free wafer 32 having the alignment marks 34a and 34b formed thereon is used.
From the marking section 22 onto the stage 14. After aligning the orientation flat of the non-patterned wafer 32 on the stage 14, the alignment is performed using the alignment marks 34a and 34b at the two outermost peripheral portions.

Subsequently, the defect of the non-patterned wafer 32 is inspected by using a method basically similar to the case of inspecting the defect of the wafer by the above-described conventional defect inspection apparatus. However, when inspecting a defect of a patterned wafer by the above-described conventional defect inspection apparatus, alignment of a predetermined inspection position is performed by alignment using a part of the pattern, whereas the defect according to the present embodiment is In the case of the inspection apparatus, a difference is that a predetermined inspection position is aligned by alignment using alignment marks 34a and 34b instead of a part of the pattern.

As described above, according to the defect inspection apparatus according to the present embodiment, even if the inspection target wafer 12 is the non-patterned wafer 32, the marking 3
The alignment marks 34a and 34b are formed at two locations on the outermost periphery opposed to each other with the center of the center 2 in place, and these two alignment marks 34a and 34b are used instead of the pattern in the case of a patterned wafer. Can be used to perform alignment, thereby improving the accuracy of positioning of a predetermined inspection location, and performing highly accurate and reliable defect detection.

Even if the unpatterned wafer 32 to be inspected is once unloaded from the stage 14, two alignment marks 34 on the unpatterned wafer 32 will be obtained at the next loading on the stage 14.
Since the alignment can be performed using the a and 34b so that the coordinates of the predetermined inspection portion do not shift, it is possible to perform a review after performing the continuous inspection, thereby preventing the work efficiency from deteriorating. it can.

In the marking section 22, as a means for forming alignment marks 34a and 34b on the unpatterned wafer 32 to be inspected, a method of irradiating a laser beam is employed, for example, such as marking using ink. Since the alignment marks 34a and 34b can be accurately formed at a desired position with high accuracy without causing contamination due to ink scattering or the like, these alignment marks 34a and 34b were used. It is possible to improve the accuracy of the alignment of the inspection point.

In the above-described embodiment, the alignment marks 34a and 34b are formed at the two outermost peripheral portions opposing each other with the center of the non-patterned wafer 32 interposed therebetween by the marking portion 22. It is not necessary to limit the places where the marks are formed to the two outermost peripheral parts that face each other across the center of the non-patterned wafer 32. For example, in the case where the type of defect to be inspected does not hinder the inspection, etc. May be formed at any position not limited to the outermost peripheral portion of the non-patterned wafer 32, or may be formed at three or more positions as necessary.

Further, in the above embodiment, the case where the unpatterned wafer 32 is to be inspected has been described. However, when the patterned wafer is to be inspected, the inspected patterned wafer is loaded into the loader 26 or the loader 26. After being placed on the loader 28 and directly transferred onto the stage 14 in the chamber 10 using the transfer arm 30, the wafer with the pattern is formed using the same method as the conventional method for inspecting a wafer using a defect inspection apparatus. May be inspected for defects.

[0029]

As described above, according to the defect inspection apparatus of the present invention, the following effects can be obtained. That is, according to the defect inspection apparatus of the first aspect, the marking portion for forming the alignment mark is provided at a predetermined position of the wafer to be inspected, so that the wafer without a pattern is regarded as the inspection target. Even in the case of performing, since it becomes possible to perform alignment using the alignment mark formed at a predetermined position of the semiconductor wafer by the marking portion,
It is possible to improve the accuracy of positioning of a predetermined inspection location. Therefore, even if the unpatterned wafer to be inspected is once unloaded from the stage, alignment is performed using the alignment marks so that the coordinates of the predetermined inspection location do not shift when the wafer is loaded onto the next stage. Since it is possible to perform the inspection, it is possible to perform a continuous inspection and then review it collectively. Therefore, deterioration of work efficiency can be prevented.

According to the defect inspection apparatus of the second aspect, the marking section irradiates a predetermined position on the semiconductor wafer with a laser beam to form an alignment mark, so that the desired position can be formed with high accuracy. Since the alignment mark can be accurately formed, the accuracy of the alignment of the inspection point using the alignment mark can be improved.

[Brief description of the drawings]

1A is a schematic plan view showing a defect inspection apparatus according to an embodiment of the present invention, and FIG. 1B is a pattern-free wafer on which an alignment mark is formed in the defect inspection apparatus shown in FIG. FIG.

FIG. 2 is a schematic configuration diagram showing a conventional defect inspection apparatus.

FIG. 3 is a schematic plan view showing a conventional defect inspection apparatus.

[Description of Signs] 10: chamber, 12: wafer, 14: stage, 1
6 Hg-Xe lamp, 18 half mirror, 20 image sensor, 22 marking part, 24 transfer arm, 26, 28 loader, 30 transfer arm, 32 unpatterned wafer, 34a, 34b alignment Mark.

Claims (3)

[Claims] 1. A defect inspection apparatus for detecting a defect in a semiconductor wafer, wherein a marking portion for forming an alignment mark is provided at a predetermined position on the semiconductor wafer. apparatus. 2. The defect inspection apparatus according to claim 1, wherein the marking section irradiates a predetermined position of the semiconductor wafer with laser light to form the alignment mark. . 3. The defect inspection apparatus according to claim 1, wherein the alignment mark is formed at least at two positions on an outermost peripheral portion of the semiconductor wafer.