JP2000124256A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which allows downsizing to be attained, and can be manufactured advantageously in cost. SOLUTION: In this semiconductor device 1, comprising a semiconductor chip 3 having a plurality of bump-like terminals 31, etc., formed on one surface 30, a substrate 2 having a plurality of longitudinal inner terminals 21, etc., formed on one surface 20 and a plurality of through-holes 23, and outer terminals 24 which are formed on the other surface of the substrate 2 and connected to corresponding inner terminals 21 via the through-holes 23, wherein each inner terminal 21 mutually faces the opposite bump-like terminal 31 corresponding thereto and electrically connected thereto, each outer terminal 24 is connected conductively to one end 21a of corresponding inner terminal 21 thereto and formed on a region directly below the semiconductor chip 3, and each bump-like terminal 31 is connected conductively to the other end 21b of corresponding inner terminal 21 thereto.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a structure in which a semiconductor chip is mounted on a substrate on which an external terminal is formed so as to be electrically connected to the external terminal.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a conventional semiconductor device. In the semiconductor device 1, the other surface 2 of the substrate 2 on which the plurality of internal terminal portions 21,.
A plurality of external terminal portions 24,... Electrically connected to the internal terminal portions 21 through the through holes 23 are formed on the second side.
The semiconductor chip 3 is mounted on one surface 20 of the substrate 2 by a so-called face-up method, and a wire 4 is provided between an internal terminal 21 of the substrate 2 and a terminal (not shown) of the semiconductor chip 3. Are electrically connected via That is, each external terminal portion 24 and the corresponding terminal portion of the semiconductor chip 3 correspond to the wire 4 and the internal terminal portion 2.
It is electrically connected to 1. A resin package 5 is formed on one surface 20 of the substrate 2 so as to seal the semiconductor chip 3 and the wires 4.

[0003]

However, the semiconductor device 1 is configured to connect between the terminal portion of the semiconductor chip 3 and the internal terminal portion 21 of the substrate 2 using the wire 4.
Then, the following problems occur.

That is, first, in order to connect between the terminal portion of the semiconductor chip 3 and the internal terminal portion 21 of the substrate 2 using the wire 4, a wire is provided in a side region of the semiconductor chip 3 on the substrate 2. It is necessary to secure a bonding area. Therefore, in order to secure a wire bonding area, the area of the substrate 2 in plan view must be larger than that of the semiconductor chip 3 by a certain amount or more. Therefore, in the semiconductor device 1 using the wires 4, there is a limit in reducing the area of the substrate 2 in a plan view, and the semiconductor device 1 cannot be made smaller than a certain size.

Second, if the wire 4 is left bare, it is easily broken when an external force acts on the wire 4.
Further, since the circuit elements are generally integrally formed on the terminal portion forming surface 30 of the semiconductor chip 3, the wires 4 and the semiconductor chip 3 are sealed in the resin package 5, for example. It is necessary to protect circuit elements. In this case, a resin packaging step is required, so that the working efficiency is poor and the cost is disadvantageous.

The present invention has been conceived in view of the above circumstances, and it is an object of the present invention to provide a semiconductor device which can be miniaturized and which can be manufactured at a low cost.

[0007]

DISCLOSURE OF THE INVENTION In order to solve the above problems, the present invention employs the following technical means. That is, the semiconductor device provided by the present invention includes a semiconductor chip having a plurality of bump-shaped terminal portions formed on one surface side, a plurality of elongated internal terminal portions formed on one surface side, and a plurality of through-holes. A hole is formed on the substrate, and formed on the other surface of the substrate,
And an external terminal portion connected to the corresponding internal terminal portion via the through hole, wherein each of the internal terminal portions and the corresponding bump-shaped terminal portion face each other, and Wherein each of the external terminal portions is electrically connected to one end of the corresponding internal terminal portion, and is formed in a region immediately below the semiconductor chip. The bump-shaped terminal portion is electrically connected to the other end of the corresponding internal terminal portion. In addition, each of the above external terminals is
For example, it is formed in a ball shape by solder.

Since the bump-shaped terminal portion is formed on one surface side of the semiconductor chip, the other end portion of the internal terminal portion of the substrate connected to the bump-shaped terminal portion is located in a region directly below the semiconductor chip. Will be located. Therefore, in the present invention, the semiconductor chip is mounted on a substrate having a larger area in plan view than the semiconductor chip, such as a configuration in which the semiconductor chip and the internal terminal portion are connected using wires, It is not necessary to secure a wire bonding area in a side area of the semiconductor chip in the above. Further, since each external terminal is also formed in the region directly below the semiconductor chip, one end of the internal terminal connected to the external terminal is also located in the region directly below the semiconductor chip.

As described above, according to the present invention, since the internal terminal portion and the external terminal portion are located in the region directly below the semiconductor chip, the area of the substrate in plan view can be made as close as possible to that of the semiconductor chip. . In a configuration in which a semiconductor chip and an internal terminal are connected by using a wire, there is a limit in reducing a planar area of the substrate, and this is one of the factors that hinder miniaturization of a semiconductor device. If the area of the substrate in plan view can be made as close as possible to that of the semiconductor chip as in the present invention, the size of the semiconductor device can be reduced.

By the way, in the semiconductor device having the above structure, an internal terminal portion is formed on one surface side of a substrate and a bump-shaped terminal portion is formed on one surface side of a semiconductor chip in advance, and these terminal portions are opposed to each other. After the semiconductor chip is mounted on the substrate by the method described above, the semiconductor device is manufactured by filling the inside of the through hole and forming the external terminal portion. In this method, no external terminal is formed at the stage of mounting the semiconductor chip on the substrate, and the internal terminal covers the upper opening of the through hole. Therefore, if the bump-shaped terminal portion is connected to the internal terminal portion directly above the through hole, the bump-shaped terminal portion is connected to the extremely unstable internal terminal portion having no support on the back side. Must. This may cause a problem in terms of the connectivity between the internal terminal and the bump-shaped terminal.

On the other hand, in the present invention, an external terminal portion is connected to the internal terminal portion of the substrate via a through hole at one end side, and a bump-shaped terminal portion of the substrate is connected to the other end side. That is, the external terminal portion and the bump-shaped terminal portion are displaced from each other while sandwiching the internal terminal portion, and the internal terminal portion and the bump-shaped terminal portion are connected to each other while avoiding a region immediately above the through hole in the internal terminal portion. Have been. With this configuration, there is no need to worry about the connectivity problem described above.

In the present invention, since the terminal portion (bump-shaped terminal portion) of the semiconductor chip and the internal terminal portion of the substrate are connected without using wires, the bump-shaped terminal portion and the internal terminal portion are connected. It is not necessary to positively form the resin package in the sense of avoiding disconnection between the resin package. When the resin package is not formed, a semiconductor device can be manufactured efficiently and cost-effectively.

The connection between the bump-shaped terminal portions of the semiconductor chip and the internal terminal portions of the substrate may be made, for example, in a state where the semiconductor chip is mounted on the substrate so that each bump-shaped terminal portion corresponds to each internal terminal portion. Then, by applying ultrasonic vibration between the bump-shaped terminal portion and the internal terminal portion, the connection portion of each terminal portion can be alloyed. Of course, it may be performed using a conductive paste such as solder or an anisotropic conductive adhesive having a structure in which a conductive component is dispersed in a resin component, but an anisotropic conductive adhesive is preferably used.

That is, in a preferred embodiment of the present invention, the semiconductor chip and the substrate are mechanically joined by a resin component of the anisotropic conductive adhesive interposed between the respective surfaces. At the same time, they are electrically connected by the conductive component interposed between each of the bump-shaped terminal portions and the corresponding internal terminal portion.

In the above configuration, the mechanical and electrical connection between the semiconductor chip and the substrate is realized only by the anisotropic conductive adhesive. That is, when manufacturing the semiconductor device having the above configuration, a step of mounting a semiconductor chip on a substrate (mechanical connection step) and a step of conducting between the semiconductor chip and the substrate (electrical connection step). And need not be separate steps, and these steps can be performed in one step. As a result, work efficiency is improved, and a semiconductor device can be provided in an advantageous manner in terms of cost.

Since a circuit element that normally conducts with each bump-shaped terminal portion is formed on one surface of the semiconductor chip on which the bump-shaped terminal portion is formed, a circuit element is formed between each surface of the semiconductor chip and the substrate. When the resin component of the anisotropic conductive adhesive is interposed, there is obtained an advantage that the circuit element of the semiconductor chip is protected by the resin component.

Further, in a preferred embodiment, the plurality of external terminal portions are arranged in a grid at a central portion on the other surface side of the substrate. That is, even in a semiconductor device in a form called a so-called BGA (ball grid array), the above-described effects can be obtained by applying the technical idea of the present invention. Since the BGA is developed to cope with the increase in the number of pins and the miniaturization of the semiconductor chip without increasing the size of the semiconductor device, the advantage of applying the present invention, which can realize the miniaturization of the semiconductor device, to the BGA. Is big.

[0018] Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 is an overall perspective view showing an example of a semiconductor device according to the present invention, and FIG.
1 is an overall perspective view of the semiconductor device of FIG. 1 as viewed from the back side, FIG. 3 is a cross-sectional view along the line III-III of FIG. 1, and FIG. 4 is an overall view of the semiconductor chip of the semiconductor device as viewed from the back side. FIG. 5 is an overall perspective view of the substrate of the semiconductor device, FIG.
FIG. 6 is an overall perspective view of the substrate of FIG. 5 as viewed from the back side. In these drawings, the same reference numerals are given to members and elements equivalent to those shown in the drawings referred to for describing the conventional semiconductor device. Further, in the present embodiment, a semiconductor device configured as a BGA (ball grid array) in which a plurality of external terminal portions are arranged in a grid pattern as best seen in FIG. 2 will be described.

As shown in FIGS. 1 to 3, the semiconductor device 1 has a configuration in which a semiconductor chip 3 is mounted on a substrate 2 in a face-down manner via an anisotropic conductive adhesive 5. . The anisotropic conductive adhesive 5 has a configuration in which a conductive component 51 is dispersed in a resin component 50, and the surfaces 20 and 30 of the substrate 2 and the semiconductor chip 3 are mechanically connected to each other by the resin component 50. And board 2
The internal terminal portion 21 formed on the one surface 20 side and the bump-shaped terminal portion 31 of the semiconductor device 1 are electrically connected via a conductive component 51.

The semiconductor chip 3 is a bare chip such as an IC or an LSI, and has a plurality of bump-shaped terminal portions 31,... Arranged along the periphery of one surface 30 as shown in FIG.
Are formed. These bump-shaped terminal portions 31 are electrically connected to circuit elements (not shown) integrally formed on one surface 30 of the semiconductor chip 3. For example, terminal pads integrally formed at the same time as the circuit elements. It is bump-shaped by applying gold plating (not shown).

As shown in FIGS. 5 and 6, the substrate 2 has a plurality of through-holes 23 formed in a matrix on a base material 2a made of a polyimide resin or the like. The same number of internal terminal portions 21,... Are formed on one surface 20 of the base material 2a.

As shown in FIGS. 5 and 6, one end 21a of the internal terminal 21 closes the upper opening of the through hole 23. The one end 21a extends through the other surface 22 of the substrate 2. It faces through the hole 23. Internal terminal 2
As shown in FIG. 5, the other end 21b of the substrate 1 is provided so as to be aligned with the peripheral edge of the one surface 20 of the substrate 2 corresponding to the bump-shaped terminal 31 of the semiconductor chip 3. The internal terminal portion 21 is formed by sticking a copper foil on the one surface 20 of the base material 2a or forming a copper film by an appropriate means such as sputtering or vapor deposition and then etching the copper film. .

2 and 3 are provided on the other surface 22 side of the substrate 2.
, A plurality of external terminal portions 24 are formed. These external terminal portions 24,.
On the other surface 22 so as to fill the through hole 23,
In addition, they are arranged in a lattice so as to protrude in a hemispherical shape, and are arranged in a lattice corresponding to the arrangement of the through holes 23. Since the internal terminal 21 is formed so as to close the upper opening of the through hole 23 at one end 21a, the external terminal 24 is connected to the one end 2 of the internal terminal 21.
That is, conduction is made to 1a. The external terminal 24
After mounting the semiconductor chip 3 on the one surface 20 side of the substrate 2, turn over the semiconductor chip 3, place a ball-shaped solder or the like corresponding to the through hole 23, and re-melt the solder.
It is formed by solidification. When the solder is re-melted, the molten solder is filled in the through holes 23,
Due to the surface tension, the molten solder has a hemispherical shape.

As shown in FIG. 3, the bump-shaped terminal 31 is formed on one surface 30 of the semiconductor chip 3. The other end 21 b of the internal terminal 21 is located in a region immediately below the semiconductor chip 3. Therefore, in the present embodiment, the semiconductor chip 3 and the internal terminal 2
1, the semiconductor chip 3 is mounted on a substrate 2 having a larger area in plan view than the semiconductor chip 3, and a wire bonding area is provided on a side region of the semiconductor chip 3 on the substrate 2. There is no need to secure.
In addition, since each external terminal 24 is also located in the region directly below the semiconductor chip 3, one end 21a of the internal terminal 21 connected to the external terminal 24 is also formed in the region directly below the semiconductor chip. become.

As described above, in the present embodiment, each of the internal terminal portion 21 and the external terminal portion 24 is
, The area of the substrate 2 in plan view can be made as close as possible to that of the semiconductor chip 3. The semiconductor chip 3 and the internal terminal 2 using wires
1 has a limit in reducing the area of the substrate 2 in plan view, which is one of the factors that hinder the miniaturization of the semiconductor device 1. However, as in the present embodiment, If the area of the substrate 2 in plan view can be made as close as possible to that of the semiconductor chip 3, the size of the semiconductor device 1 can be reduced.

As described above, the anisotropic conductive adhesive 5 has a structure in which the conductive component 51 is dispersed in the resin component 50 (see FIG. 3). As the resin component 50, for example, a thermosetting resin such as an epoxy resin is suitably used, and may be in a viscous liquid state or a solid state before the heat curing. The conductive component 51 may have a ball shape as shown in the drawing, or a fibrous or needle shape (not shown). When the conductive component 51 is formed in a ball shape, a metal ball may be used as the conductive component 51, or a resin ball obtained by performing nickel plating, gold plating, or the like may be used as the conductive component 51.

The mechanical and electrical connection between the semiconductor chip 3 and the substrate 2 using the anisotropic conductive adhesive 5 is performed as follows. That is, first, the substrate 2 is placed on a pre-heated support table in which a heater or the like is incorporated, and a viscous anisotropic conductive adhesive is formed in a region of the substrate 2 where the internal terminal portions 21 are formed. 5 or a solid anisotropic conductive adhesive 5 is placed.
Then, the semiconductor chip 3 is pressed onto the anisotropic conductive adhesive 5 so that each bump-shaped terminal portion 31 faces the corresponding internal terminal portion 21.

At this time, since the substrate 2 is heated, the resin component 50 of the anisotropic conductive adhesive 5 is also heated. When the resin component 50 is not viscous and is in a viscous liquid state, the mucous state is maintained. When the resin component 50 is in a solid state, it is softened by heating. For this reason, when the semiconductor chip 3 is pressed on the anisotropic conductive adhesive 5,
Bump-shaped terminal 31 and internal terminal 2 facing each other
1 and the resin component 50 interposed therebetween is pressed away. That is, the conductive component 51 is selectively interposed between the bump-shaped terminal portion 31 and the internal terminal portion 21, and the terminals 21 and 31 are electrically connected. On the other hand, regions other than the terminal portions 21 and 31 facing each other are the resin component 5
Since the conductive component 51 is kept dispersed in 0, the insulating property is maintained. Then, the resin component 5 of the anisotropic conductive adhesive 5
The substrate 2 and the semiconductor chip 3 are mechanically connected to each other by heat shrinkage due to the subsequent heating of the 0.

As described above, when the anisotropic conductive adhesive 5 is used, the mechanical and electrical connection between the substrate 2 and the semiconductor chip 3 is realized at the same time. That is, when manufacturing the semiconductor device 1 having the above configuration, a step of mounting the semiconductor chip 3 on the substrate 2 (mechanical connection step) and a step of conducting between the semiconductor chip 3 and the substrate 2 (electrical connection). It is not necessary to separate these steps into separate steps, and these steps can be performed in one step. As a result, the working efficiency is improved, and the semiconductor device 1 can be provided in a cost-effective manner.

Further, the bump-shaped terminal portion 3 of the semiconductor chip 3
As described above, a circuit element that is normally connected to each of the bump-shaped terminal portions 31 is formed on the surface 30 on which the surface 1 is formed. In between resin component 5 of anisotropic conductive adhesive 5
When 0 is interposed, there is an advantage that the circuit element of the semiconductor chip 3 is protected by the resin component 50.

Further, in this embodiment, since the terminals (bump-shaped terminal portions 31) of the semiconductor chip 3 and the internal terminal portions 21 of the substrate 2 are connected without using wires, the bump-shaped terminals are not used. It is not necessary to positively form a resin package in the sense that disconnection between the portion 31 and the internal terminal portion 21 is avoided. When the resin package is not formed, the semiconductor device 1 is advantageously operated efficiently and cost-effectively.
Can be manufactured.

By the way, when the semiconductor chip 3 is mounted on the substrate 2, the external terminal portions 24 are not formed, and the internal terminal portions 21 cover the upper openings of the through holes 23. For this reason, if the bump-shaped terminal portion 31 is configured to be connected directly above the through hole 23, the internal terminal portion 2 which is in an extremely unstable state without support on the back surface side is provided.
1, the bump-shaped terminal 31 must be connected.
This may cause a problem in the connectivity between the internal terminal portion 21 and the bump-shaped terminal portion 31.

On the other hand, in the present embodiment, the external terminal 24 is connected to one end 21a of the internal terminal 21 of the substrate 2 through the through hole 23, and the bump-like terminal of the substrate 2 is connected to the other end 21b. 31 are connected. That is, as best seen in FIG. 3, the external terminal portion 24 and the bump-shaped terminal portion 31 are formed.
Are shifted from each other with the internal terminal portion 21 interposed therebetween, and the internal terminal portion 21 and the bump-shaped terminal portion 31 are connected to each other while avoiding a region immediately above the through hole 23 in the internal terminal portion 21. With this configuration, there is no need to worry about the connectivity problem described above.

The bump-shaped terminal 3 of the semiconductor chip 3
The connection between the first terminal 1 and the internal terminal portion 21 of the substrate 2 is performed, for example, in a state where the semiconductor chip 3 is mounted on the substrate 2 with the bump-shaped terminal portion 31 corresponding to the internal terminal portion 21. The connection may be made by alloying the connection portion of each of the terminal portions 21 and 31 by supplying ultrasonic vibration between the terminal portion and the internal terminal portion 21.

The number of the internal terminal portions 21 and the number of the external terminal portions 24 of the substrate 2 are defined by the number of the bump-shaped terminal portions 31 of the semiconductor chip 3, and the number of the bump-shaped terminal portions 31 is relatively small. When the number of the external terminals 24 is small, it is not always necessary to form the external terminal portions 24 in a grid pattern to form a BGA, and it is needless to say that the technical idea of the present invention can be applied to the semiconductor device 1 other than the BGA. .

[Brief description of the drawings]

FIG. 1 is an overall perspective view illustrating an example of a semiconductor device according to the present invention.

FIG. 2 is an overall perspective view of the semiconductor device of FIG. 1 as viewed from the back side.

FIG. 3 is a sectional view taken along line III-III in FIG.

FIG. 4 is an overall perspective view of the semiconductor chip as viewed from the back side.

FIG. 5 is an overall perspective view of a substrate.

FIG. 6 is an overall perspective view of the substrate of FIG. 5 as viewed from the back side.

FIG. 7 is a cross-sectional view illustrating an example of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 semiconductor device 2 substrate 3 semiconductor chip 5 anisotropic conductive adhesive 20 one surface (of substrate) 21 internal terminal 21a one end (of internal terminal) 21b other end (of internal terminal) 22 other surface (of substrate) ) 23 through hole 24 external terminal part 30 one surface (of semiconductor chip) 50 resin component 51 conductive component

Claims (4)

[Claims] A semiconductor chip having a plurality of bump-shaped terminal portions formed on one surface side; and a substrate having a plurality of elongated internal terminal portions formed on one surface side and having a plurality of through holes formed therein. External terminal portions formed on the other surface side of the substrate and connected to the corresponding internal terminal portions via the through holes, respectively, and the internal terminal portions and the bumps corresponding thereto. A semiconductor device in which the external terminal portions face each other and are electrically connected to each other, wherein each of the external terminal portions is conductively connected to one end of the corresponding internal terminal portion, and the semiconductor chip A semiconductor device, wherein each of the bump-shaped terminal portions is electrically connected to the other end of the corresponding internal terminal portion. 2. The semiconductor chip and the substrate are mechanically connected to each other by interposing the resin component of the anisotropic conductive adhesive having a structure in which a conductor component is dispersed in a resin component between the respective surfaces. 2. The semiconductor device according to claim 1, wherein the semiconductor component is joined to the bump-shaped terminal portions and the corresponding internal terminal portions are electrically connected to each other by interposing the conductive component. 3. . 3. The semiconductor device according to claim 1, wherein the plurality of external terminal portions are arranged in a grid at a central portion on the other surface side of the substrate. 4. The semiconductor device according to claim 1, wherein each of said external terminal portions is formed in a ball shape by solder.