JP2000124155A - Al THIN-FILM FORMING METHOD - Google Patents

Al THIN-FILM FORMING METHOD

Info

Publication number
JP2000124155A
JP2000124155A JP10291246A JP29124698A JP2000124155A JP 2000124155 A JP2000124155 A JP 2000124155A JP 10291246 A JP10291246 A JP 10291246A JP 29124698 A JP29124698 A JP 29124698A JP 2000124155 A JP2000124155 A JP 2000124155A
Authority
JP
Japan
Prior art keywords
thin film
substrate
gas
sputtering
processing chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10291246A
Other languages
Japanese (ja)
Other versions
JP3986178B2 (en
Inventor
Akira Ishibashi
暁 石橋
Junya Kiyota
淳也 清田
Makoto Arai
新井  真
Isao Sugiura
功 杉浦
Hajime Nakamura
肇 中村
Takahide Hori
隆英 堀
Shimei Hayashi
志銘 林
Yoshifumi Ota
賀文 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ulvac Inc
Original Assignee
Ulvac Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ulvac Inc filed Critical Ulvac Inc
Priority to JP29124698A priority Critical patent/JP3986178B2/en
Publication of JP2000124155A publication Critical patent/JP2000124155A/en
Application granted granted Critical
Publication of JP3986178B2 publication Critical patent/JP3986178B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a technique that is capable of reducing hillocks in an Al thin film. SOLUTION: A substrate 5 is introduced into a processing chamber 2, the processing chamber 2 is made into a state of evacuated atmosphere, then sputtering gas is introduced into the processing chamber 2 to sputter a target 3 that contains Al, and a reducing gas is introduced into the processing chamber 2, when Al thin films 5a and 5c are formed on the substrate 5. Since no oxide film is formed on the surfaces of Al crystal grains, the Al crystal grains get large in grain diameter and are improved in orientation, hillocks are produced less, even when heat treatment is carried out after the Al thin films 5a and 5c are formed. Hydrogen gas or methane gas can be used as reducing gas.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、液晶等の表示素子
や半導体素子に用いられるAl薄膜或いはAlを主成分
とする合金薄膜から成る薄膜配線の製造方法にかかり、
特に、薄膜配線のヒロックを低減させる技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film wiring made of an Al thin film or an alloy thin film containing Al as a main component, which is used for a display device such as a liquid crystal device or a semiconductor device.
In particular, the present invention relates to a technique for reducing hillocks in thin film wiring.

【0002】[0002]

【従来の技術】従来より、半導体素子では、薄膜配線の
材料として純粋なAl、或いはAlを主成分とする合金
が一般的に用いられている。一方、薄膜トランジスタ
(以下TFTと称す)を駆動素子として用いる液晶表示装
置(以下LCDと称す)では、薄膜配線の材料としてCr
やMo等が用いられてきた。
2. Description of the Related Art Conventionally, in a semiconductor device, pure Al or an alloy containing Al as a main component has been generally used as a material of a thin film wiring. Meanwhile, thin film transistor
(Hereinafter referred to as TFT) as a driving element in a liquid crystal display device (hereinafter referred to as LCD), a thin film wiring material such as Cr
And Mo have been used.

【0003】しかしながら、CrやMo等は抵抗が比較
的高いため、LCDの大型化や高精細化が要求されると
ともに、薄膜配線の抵抗成分による信号遅延や画素への
書き込み不足という問題が顕著になってきた。そこでC
rやMo等に代えて、より低抵抗なAl或いはAlを主
成分とする合金を薄膜配線の材料に用いようとする試み
がなされている。
However, since the resistance of Cr, Mo, and the like is relatively high, the LCD is required to have a large size and high definition, and the problems of signal delay and insufficient writing to pixels due to the resistance component of the thin film wiring are remarkable. It has become. So C
Attempts have been made to use lower resistance Al or an alloy containing Al as a main component instead of r, Mo, or the like, as a material for the thin film wiring.

【0004】ところで、半導体素子やTFTで用いられ
るAl或いはAlを主成分とする薄膜(本明細書では、
Alを主成分とする薄膜をAl薄膜と呼ぶ。)は、一般
的に直流(DC)マグネトロンスパッタ法で製造されてい
るが、ガラス基板やSiウエハー基板上にAl薄膜を形
成し、薄膜配線を構成させた場合、その後のプロセスに
おける熱処理の際に、Al薄膜配線上にヒロック(突起
物)が発生してしまい、Al薄膜配線上の絶縁膜を突き
破ると、絶縁膜上に形成された上層の薄膜配線と短絡し
てしまうという問題が生じていた。
By the way, Al or a thin film containing Al as a main component used in a semiconductor element or a TFT (in this specification,
A thin film containing Al as a main component is called an Al thin film. ) Is generally manufactured by a direct current (DC) magnetron sputtering method, but when an Al thin film is formed on a glass substrate or a Si wafer substrate and a thin film wiring is formed, the heat treatment in a subsequent process is performed. Hillocks (projections) are generated on the Al thin film wiring, and if the insulating film on the Al thin film wiring is pierced, a short circuit occurs with the upper thin film wiring formed on the insulating film. .

【0005】このようなヒロックの発生を防止するため
に、Cu、SiやTi、Ta、Nd、Mo、Zr等の高
融点金属を薄膜配線の材料に添加しておく方法がある
が、その効果を高めるため、高融点金属の添加量を増加
させると、薄膜配線の抵抗値が大きくなってしまうとい
う問題がある。
In order to prevent the generation of such hillocks, there is a method in which a high melting point metal such as Cu, Si, Ti, Ta, Nd, Mo, or Zr is added to the material of the thin film wiring. When the amount of the high-melting-point metal added is increased to increase the resistance, there is a problem that the resistance value of the thin-film wiring increases.

【0006】[0006]

【発明が解決しようとする課題】本発明は、このような
従来の技術の課題を解決するために創作されたもので、
その目的は、Al薄膜配線の抵抗値を増加させずにヒロ
ック発生を防止できる技術を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in order to solve such problems of the prior art.
An object of the present invention is to provide a technique capable of preventing hillocks from occurring without increasing the resistance value of an Al thin film wiring.

【0007】[0007]

【課題を解決するための手段】図1(a),(b)に、スパ
ッタ法を用いて形成したAl薄膜配線10、20の結晶
粒の状態を示す。符号11a〜11c,21a〜21fは、
Al薄膜配線10、20を構成する結晶粒を示してい
る。
FIGS. 1A and 1B show the state of crystal grains of Al thin film wirings 10 and 20 formed by using a sputtering method. Symbols 11a to 11c and 21a to 21f are:
The crystal grains constituting the Al thin film wirings 10 and 20 are shown.

【0008】このようなAl薄膜配線10、20が形成
された後は、更にその表面上に層間絶縁膜や上層の薄膜
配線が形成されるが、Al薄膜配線10、20の熱膨張
係数と、下地となる基板の熱膨張係数とには差があるた
め、Al薄膜配線10、20を形成した後のプロセス中
の熱処理により、低温状態と高温状態とが繰り返される
と、Al薄膜配線10、20内に圧縮応力が発生し、そ
の際、結晶粒11a〜11c、21a〜21fの粒界に沿っ
てAl原子が移動し、粒界の交点でヒロックが形成され
てしまう。
After the Al thin film wirings 10 and 20 are formed, an interlayer insulating film and an upper thin film wiring are further formed on the surface thereof. Since there is a difference in the coefficient of thermal expansion of the substrate serving as the base, if the low-temperature state and the high-temperature state are repeated by the heat treatment during the process after the formation of the Al thin-film wirings 10, 20, the Al thin-film wirings 10, 20 Compressive stress is generated inside, and at that time, Al atoms move along the grain boundaries of the crystal grains 11a to 11c and 21a to 21f, and hillocks are formed at intersections of the grain boundaries.

【0009】このとき、図1(a)に示すように、結晶粒
11a〜11cの粒径が大きいAl薄膜配線10では、粒
界の総面積や粒界の交点が少ないため、ヒロックが発生
しにくいのに対し、図1(b)に示すように、結晶粒21
a〜21fが小さいAl薄膜配線20では、粒界の総面積
が大きく、また粒界の交点22a〜22dが多数存在する
ため、それだけヒロックが発生しやすくなる。
At this time, as shown in FIG. 1A, in the Al thin film wiring 10 in which the crystal grains 11a to 11c have a large grain size, hillocks are generated because the total area of the grain boundaries and the intersections of the grain boundaries are small. However, as shown in FIG.
In the Al thin film wiring 20 having small a to 21f, the total area of the grain boundaries is large, and there are many intersections 22a to 22d of the grain boundaries, so that hillocks are easily generated.

【0010】また、ヒロックによる短絡の発生は、結晶
粒の大きさだけで決まるものではなく、結晶粒の配向性
にも影響されることが知られており、Al薄膜配線の結
晶粒が均一であれば、結晶粒が不均一な場合に比べて、
Al薄膜配線内に局所的に大きな圧縮応力が発生するこ
とが少ないため、ヒロックが生じた場合でもそのサイズ
は小さい。従って、ヒロックが層間絶縁膜を突き破るこ
とがなく、短絡が発生しにくくなる。
It is known that the occurrence of a short circuit due to a hillock is not determined only by the size of crystal grains, but is also affected by the orientation of crystal grains. If there is, compared to the case where the crystal grains are uneven,
Since a large compressive stress rarely occurs locally in the Al thin film wiring, even if a hillock occurs, its size is small. Therefore, the hillock does not break through the interlayer insulating film, and a short circuit is less likely to occur.

【0011】本発明の発明者等は、Al薄膜配線を構成
する結晶粒が酸化されている場合に、結晶粒の粒径が小
さくなり、また、配向性が不均一になることを見出し
た。従って、結晶粒の酸化を防止すれば、ヒロック発生
を防止できることになる。
The inventors of the present invention have found that, when the crystal grains constituting the Al thin-film wiring are oxidized, the crystal grains have a small particle size and the orientation becomes non-uniform. Therefore, if oxidation of crystal grains is prevented, hillocks can be prevented from being generated.

【0012】特に、スパッタの場合は、酸素や水などの
酸化性ガスがスパッタ雰囲気内に存在すると、Al薄膜
の結晶粒表面に酸化膜が形成されてしまい、結晶粒の成
長が妨げられ、また、配向性も不均一になると考えられ
る。
In particular, in the case of sputtering, if an oxidizing gas such as oxygen or water is present in the sputtering atmosphere, an oxide film is formed on the crystal grain surface of the Al thin film, and the growth of crystal grains is hindered. It is also considered that the orientation becomes non-uniform.

【0013】本発明は、上記知見に基いて創作されたも
のであり、Al薄膜配線を形成するためのAl薄膜を基
板上に形成するために、処理室内に基板を配置し、真空
雰囲気にした状態でスパッタガスを導入し、Alを含む
ターゲットをスパッタし、前記基板上にAlを主成分と
する薄膜を形成するAl薄膜形成方法を用いる場合に
は、請求項1記載の発明のように、前記スパッタガス中
に、還元性ガスを添加し、結晶粒の酸化を防止すればよ
いことになる。
The present invention has been made based on the above findings. In order to form an Al thin film for forming an Al thin film wiring on a substrate, the substrate is placed in a processing chamber and a vacuum atmosphere is formed. In the case where an Al thin film forming method of introducing a sputtering gas in a state, sputtering an Al-containing target, and forming a thin film containing Al as a main component on the substrate is used, as in the invention according to claim 1, It suffices to add a reducing gas to the sputtering gas to prevent oxidation of the crystal grains.

【0014】この請求項1記載のAl薄膜形成方法につ
いては、請求項2記載の発明のように、前記ターゲット
をスパッタする際の前記処理室内の圧力を0.2〜2.
0Paの範囲とする場合には、前記還元性ガスの分圧を
1×10-4〜2×10-2Paの範囲になるようにすると
効果的である。
According to the first aspect of the present invention, as in the second aspect of the present invention, the pressure in the processing chamber at the time of sputtering the target is set to 0.2 to 2.
When the pressure is in the range of 0 Pa, it is effective to set the partial pressure of the reducing gas in the range of 1 × 10 −4 to 2 × 10 −2 Pa.

【0015】また、Al薄膜に加えられる圧縮応力を緩
和するために、先ず基板表面にAl薄膜の熱膨張係数に
近い金属薄膜を形成し、その金属薄膜上にAl薄膜を形
成すると、結晶粒径やその配向性を一層向上させること
ができる。
In order to alleviate the compressive stress applied to the Al thin film, first, a metal thin film having a thermal expansion coefficient close to that of the Al thin film is formed on the substrate surface, and the Al thin film is formed on the metal thin film. And its orientation can be further improved.

【0016】従って、請求項1又は請求項2のいずれか
1項記載のAl薄膜形成方法については、請求項3記載
の発明のように、前記基板上にTi薄膜を形成した後、
該Ti薄膜上に前記Alを主成分とする薄膜を形成する
とよい。
Therefore, in the method of forming an Al thin film according to any one of claims 1 and 2, after forming a Ti thin film on the substrate, as in the invention of claim 3,
It is preferable to form a thin film containing Al as a main component on the Ti thin film.

【0017】なお、上記請求項1乃至請求項3のいずれ
か1項記載のAl薄膜形成方法は、請求項4記載の発明
のように、基板がガラス基板又はシリコン基板である場
合に、特に有用である。
The method for forming an Al thin film according to any one of claims 1 to 3 is particularly useful when the substrate is a glass substrate or a silicon substrate as in the invention according to claim 4. It is.

【0018】[0018]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照しながら説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0019】図2(a)を参照し、符号1は本発明のAl
薄膜形成方法に用いられるスパッタリング装置である。
このスパッタ成膜装置1は、真空排気可能なチャンバー
2を有しており、該チャンバー2の底部には載置台4が
設けられ、天井側にはターゲット3が設けられている。
Referring to FIG. 2A, reference numeral 1 denotes Al of the present invention.
This is a sputtering apparatus used for a thin film forming method.
The sputtering film forming apparatus 1 has a chamber 2 that can be evacuated, a mounting table 4 is provided at the bottom of the chamber 2, and a target 3 is provided at the ceiling side.

【0020】チャンバー2には、ガス導入口6と排気口
7とが設けられており、ガス導入口6は不図示のガス導
入系に接続され、排気口7は不図示の真空ポンプに接続
されている。
The chamber 2 is provided with a gas introduction port 6 and an exhaust port 7. The gas introduction port 6 is connected to a gas introduction system (not shown), and the exhaust port 7 is connected to a vacuum pump (not shown). ing.

【0021】このようなスパッタ成膜装置1を用い、基
板(300×400×1.1mmのコーニング社製#70
59ガラス基板)5上に直接Al薄膜を成膜する場合に
は、予め不図示の真空ポンプによってチャンバー2内を
真空排気した後、その真空状態を維持したまま、表面が
露出した基板5をチャンバー2内に搬入し、成膜面をタ
ーゲット3に向け、載置台4上に載置する。
A substrate (300 × 400 × 1.1 mm # 70 manufactured by Corning Incorporated) is used by using such a sputtering film forming apparatus 1.
In the case where an Al thin film is directly formed on the (59 glass substrate) 5, the inside of the chamber 2 is evacuated in advance by a vacuum pump (not shown), and the substrate 5 having the exposed surface is removed while maintaining the vacuum state. 2, and is placed on a mounting table 4 with the film formation surface facing the target 3.

【0022】次に、チャンバー1内に、スパッタガス
(Arガス)と還元性ガス(水素ガス)をガス導入口6から
導入し、チャンバー2内部が0.4Paの圧力で安定し
たところでターゲット3に直流電圧を印加してスパッタ
した。このときの還元性ガスの分圧は1×10-4Paで
あった。スパッタの際は、基板5の温度が100℃にな
るようにし、その状態で基板5表面にAl薄膜を形成し
た。
Next, a sputtering gas is placed in the chamber 1.
(Ar gas) and a reducing gas (hydrogen gas) were introduced from the gas inlet 6, and when the inside of the chamber 2 was stabilized at a pressure of 0.4 Pa, a DC voltage was applied to the target 3 to perform sputtering. At this time, the partial pressure of the reducing gas was 1 × 10 −4 Pa. At the time of sputtering, the temperature of the substrate 5 was set to 100 ° C., and an Al thin film was formed on the surface of the substrate 5 in that state.

【0023】Al薄膜の膜厚が3000Åに達したとこ
ろで、直流電圧の印加及びスパッタガスの導入を終了さ
せ、基板5をチャンバー2外に搬出した。その基板5の
断面図を図2(a)に示す。基板5表面にAl薄膜5aが
直接形成されている。
When the thickness of the Al thin film reached 3000 ° C., the application of the DC voltage and the introduction of the sputtering gas were terminated, and the substrate 5 was carried out of the chamber 2. FIG. 2A is a sectional view of the substrate 5. An Al thin film 5a is directly formed on the surface of the substrate 5.

【0024】次に、オーブンにより、その基板5を大気
圧・窒素ガス雰囲気下で加熱し、350℃1時間の熱処
理を行った。そのAl薄膜5aの表面をSEM(Scanning
electron microscope:走査型電子顕微鏡)で観察し、
ヒロックの個数をカウントした。
Next, the substrate 5 was heated in an oven under atmospheric pressure and nitrogen gas atmosphere, and heat treatment was performed at 350 ° C. for 1 hour. The surface of the Al thin film 5a is SEM (Scanning
electron microscope: scanning electron microscope)
The number of hillocks was counted.

【0025】なお、熱処理の温度を350℃にしたの
は、TFTのゲートバスラインを形成した後に、ゲート
絶縁膜を成膜する際のCVD法における温度条件が35
0℃程度であることによる。
The reason why the temperature of the heat treatment is set to 350 ° C. is that the temperature condition in the CVD method for forming the gate insulating film after forming the gate bus line of the TFT is 35 ° C.
This is because the temperature is about 0 ° C.

【0026】その後、他の条件は上記条件と変えずに、
スパッタガスに添加する還元性ガスの圧力を1×10-4
〜2×10-2Paの範囲の所定値にし、基板5上に30
00ÅのAl薄膜5aを形成し、上記と同じ条件で熱処
理をし、ヒロックの個数をカウントした。
After that, other conditions are not changed from the above conditions,
The pressure of the reducing gas added to the sputtering gas is 1 × 10 -4
To a predetermined value in the range of 2 × 10 −2 Pa, and 30
An Al thin film 5a having a thickness of 00 ° was formed, heat-treated under the same conditions as above, and the number of hillocks was counted.

【0027】以上の結果、還元性ガスの添加量が2×1
-3Paのときに、Al薄膜表面の1μm2あたりのヒ
ロックの個数が最も少なくなり(0.001個)、還元性
ガスを添加しない場合の1μm2あたりの個数(0.18
個)に比べ、ヒロック密度は大幅に低減された。
As a result, the amount of the reducing gas added was 2 × 1
At 0 -3 Pa, the number of hillocks per 1 μm 2 on the surface of the Al thin film was the smallest (0.001), and the number per 1 μm 2 when no reducing gas was added (0.18).
Hillock density was significantly reduced as compared to

【0028】ヒロック密度と還元性ガスの添加量との関
係を図3のグラフに示す。横軸は添加ガスの分圧、縦軸
はヒロック密度である。このグラフから、スパッタ雰囲
気が0.4Paの場合は、添加ガス量が2×10-3Pa
付近で最小値をとることが分かる。
The relationship between the hillock density and the amount of the reducing gas added is shown in the graph of FIG. The horizontal axis represents the partial pressure of the additive gas, and the vertical axis represents the hillock density. From this graph, when the sputtering atmosphere is 0.4 Pa, the added gas amount is 2 × 10 −3 Pa.
It can be seen that the minimum value is obtained in the vicinity.

【0029】次に、図2(c)に示すように、スパッタ法
により基板5上に膜厚500ÅのTi薄膜5bを形成し
た後、上記と同じ条件でターゲット3のスパッタを行
い、3000ÅのAl薄膜5aを形成し、上記と同じ条
件で熱処理し、Ti薄膜5b上のAl薄膜5c表面をSE
Mによって観察し、ヒロックの個数をカウントした。
Next, as shown in FIG. 2 (c), after forming a 500 .mu.m thick Ti thin film 5b on the substrate 5 by the sputtering method, the target 3 is sputtered under the same conditions as above, and the 3000 .ANG. A thin film 5a is formed and heat-treated under the same conditions as above, and the surface of the Al thin film 5c on the Ti thin film 5b is subjected to SE.
Observed by M, the number of hillocks was counted.

【0030】還元性ガスの添加量とヒロック密度の関係
を図4のグラフに示す。図3のグラフと比較すると、ヒ
ロック密度が全体的に少なくなっていることがわかる。
特に、還元性ガスの添加量が5×10-4〜5×10-3
aの範囲では、ヒロックの発生は全くみられなかった。
FIG. 4 is a graph showing the relationship between the amount of reducing gas added and the hillock density. It can be seen from the comparison with the graph of FIG. 3 that the hillock density is reduced as a whole.
In particular, when the amount of the reducing gas added is 5 × 10 −4 to 5 × 10 −3 P
No hillocks were observed in the range of a.

【0031】なお、Al薄膜5a、5cの比抵抗は、水素
添加量が1×10-4〜2×10-2Paの範囲では変化せ
ず、特に、ガラス基板5上に直接形成したAl薄膜5a
では、3.1μΩcmという低い比抵抗値を得ることがで
きた。
The specific resistance of the Al thin films 5a and 5c does not change when the amount of hydrogen added is in the range of 1 × 10 −4 to 2 × 10 −2 Pa. In particular, the Al thin films formed directly on the glass substrate 5 5a
As a result, a specific resistance value as low as 3.1 μΩcm could be obtained.

【0032】上記実施形態では、還元性ガスとして水素
ガスを用いたが、本発明はそれに限定されるものではな
く、例えばメタンガスやエタンガスなどのような還元性
ガスを用いてもよい。
In the above embodiment, hydrogen gas is used as the reducing gas. However, the present invention is not limited to this. For example, a reducing gas such as methane gas or ethane gas may be used.

【0033】また、上記Al薄膜5aは、純Al薄膜で
あったが、本発明はそれに限定されるものではなく、A
lが主成分となったAl薄膜に広く効果がある。例え
ば、Alと、Cu、Si、Ti、Ta、Nd、Mo、Z
r等とが合金化したターゲットを用いてAl薄膜を形成
する場合にも効果がある。
Although the Al thin film 5a is a pure Al thin film, the present invention is not limited to this.
It is widely effective for Al thin films containing l as a main component. For example, Al, Cu, Si, Ti, Ta, Nd, Mo, Z
This is also effective when an Al thin film is formed using a target alloyed with r or the like.

【0034】上記実施形態では、スパッタガスの圧力を
0.4Paとしたが、本発明はそれに限定されるもので
はなく、スパッタガスの圧力を0.2〜2Pa程度の範
囲内で上下させてもよい。基板5にはガラス基板を用い
たが、本発明はそれに限られるものではなく、シリコン
などの半導体ウエハーを基板とする場合にも適用するこ
とができる。
In the above embodiment, the pressure of the sputtering gas was set to 0.4 Pa. However, the present invention is not limited to this, and the pressure of the sputtering gas may be raised or lowered within a range of about 0.2 to 2 Pa. Good. Although a glass substrate is used as the substrate 5, the present invention is not limited to this, and can be applied to a case where a semiconductor wafer such as silicon is used as the substrate.

【0035】[0035]

【発明の効果】Al薄膜上のヒロック発生を低減するこ
とができる。その結果、ヒロックによる短絡が発生しな
くなる。
As described above, the generation of hillocks on the Al thin film can be reduced. As a result, a short circuit due to a hillock does not occur.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a):結晶粒径が大きい場合のAl薄膜配線の
平面図 (b):結晶粒径が小さい場合のAl薄膜配線の平面図
FIG. 1A is a plan view of an Al thin film wiring when the crystal grain size is large. FIG. 1B is a plan view of an Al thin film wiring when the crystal grain size is small.

【図2】(a):本発明に用いることができるスパッタ成
膜装置の一例 (b):基板表面に直接Al薄膜を形成した場合の断面図 (c):Ti薄膜上にAl薄膜を形成した場合の断面図
FIG. 2 (a): an example of a sputtering film forming apparatus that can be used in the present invention (b): cross-sectional view when an Al thin film is formed directly on a substrate surface (c): forming an Al thin film on a Ti thin film Sectional view

【図3】水素ガスを還元性ガスとし、基板表面にAl薄
膜を直接形成した場合の添加量とヒロック密度の関係を
示すグラフ
FIG. 3 is a graph showing the relationship between the added amount and the hillock density when an Al thin film is directly formed on a substrate surface using hydrogen gas as a reducing gas.

【図4】水素ガスを還元性ガスとし、Ti薄膜表面にA
l薄膜を形成した場合の添加量とヒロック密度の関係を
示すグラフ
FIG. 4 shows a method in which hydrogen gas is used as a reducing gas, and A
Graph showing the relationship between the amount of addition and the hillock density when a thin film is formed

【符号の説明】[Explanation of symbols]

1…スパッタ成膜装置 2…チャンバー(処理室)
3…ターゲット 5…基板 5a,5c…Al薄膜
5b…Ti薄膜
1. Sputter film forming apparatus 2. Chamber (processing chamber)
3 Target 5 Substrate 5a, 5c Al thin film
5b ... Ti thin film

───────────────────────────────────────────────────── フロントページの続き (72)発明者 新井 真 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 (72)発明者 杉浦 功 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 (72)発明者 中村 肇 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 (72)発明者 堀 隆英 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 (72)発明者 林 志銘 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 (72)発明者 太田 賀文 千葉県山武郡山武町横田523番地 日本真 空技術株式会社千葉超材料研究所内 Fターム(参考) 4K029 AA06 AA09 BA03 BA17 BA23 BB02 BD01 CA05 EA03 EA05 4M104 AA01 AA10 BB02 DD42 HH03 5F033 GG04 HH08 PP16 WW05  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Makoto Arai 523 Yokota, Yamatake-cho, Yamatake-gun, Chiba Japan Nippon Makoto Technology Co., Ltd. Nippon Masaki Technology Co., Ltd. (72) Inside the Chiba Super Materials Research Laboratory (72) Inventor Hajime Nakamura 523 Yamatake-cho, Yamatake-gun, Chiba Prefecture Inside Japan Chiku Technology Co., Ltd.Chiba Super Materials Research Laboratory (72) Inventor Takahide Hori 523, Yokota-cho, Japan, Japan Sky Technology Co., Ltd.Chiba Super Materials Research Institute (72) Inventor Shiname Hayashi, 523, Yamatake-cho, Yamatake-gun, Chiba Pref. Statement 523 Yokota, Sanmu-cho, Sanmu-gun, Chiba Prefecture F-term (reference) 4K029 AA06 AA09 BA03 BA17 BA23 BB02 BD01 CA05 EA03 EA05 4M104 AA01 AA10 BB02 DD42 HH03 5F033 GG04 HH08 PP16 WW05

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】処理室内に基板を配置し、真空雰囲気にし
た状態でスパッタガスを導入し、Alを含むターゲット
をスパッタし、前記基板上にAlを主成分とする薄膜を
形成するAl薄膜形成方法であって、 前記スパッタガス中に、還元性ガスを添加することを特
徴とするAl薄膜形成方法。
An Al thin film is formed by placing a substrate in a processing chamber, introducing a sputtering gas in a vacuum atmosphere, sputtering an Al-containing target, and forming a thin film containing Al as a main component on the substrate. A method for forming an Al thin film, comprising adding a reducing gas to the sputtering gas.
【請求項2】前記ターゲットをスパッタする際の前記処
理室内の圧力を0.2〜2.0Paの範囲とする場合
に、前記還元性ガスの分圧を1×10-4〜2×10-2
aの範囲になるようにすることを特徴とする請求項1記
載のAl薄膜形成方法。
2. A partial pressure of said reducing gas is 1 × 10 −4 to 2 × 10 when a pressure in said processing chamber when said target is sputtered is in a range of 0.2 to 2.0 Pa. 2 P
2. The method for forming an Al thin film according to claim 1, wherein the range is set to a.
【請求項3】前記基板上にTi薄膜を形成した後、該T
i薄膜上に前記Alを主成分とする薄膜を形成すること
を特徴とする請求項1又は請求項2のいずれか1項記載
のAl薄膜形成方法。
3. After forming a Ti thin film on the substrate, the T
3. The method of forming an Al thin film according to claim 1, wherein a thin film containing Al as a main component is formed on the i thin film.
【請求項4】前記基板には、ガラス基板又はシリコン基
板を用いることを特徴とする請求項1,請求項2又は請
求項3記載のAl薄膜形成方法。
4. The method according to claim 1, wherein the substrate is a glass substrate or a silicon substrate.
JP29124698A 1998-10-14 1998-10-14 Al thin film forming method Expired - Fee Related JP3986178B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29124698A JP3986178B2 (en) 1998-10-14 1998-10-14 Al thin film forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29124698A JP3986178B2 (en) 1998-10-14 1998-10-14 Al thin film forming method

Publications (2)

Publication Number Publication Date
JP2000124155A true JP2000124155A (en) 2000-04-28
JP3986178B2 JP3986178B2 (en) 2007-10-03

Family

ID=17766385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29124698A Expired - Fee Related JP3986178B2 (en) 1998-10-14 1998-10-14 Al thin film forming method

Country Status (1)

Country Link
JP (1) JP3986178B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457372B1 (en) * 2001-12-06 2004-11-16 치 메이 옵토일렉트로닉스 코포레이션 Hillock-free aluminum wiring layer and method of forming the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100457372B1 (en) * 2001-12-06 2004-11-16 치 메이 옵토일렉트로닉스 코포레이션 Hillock-free aluminum wiring layer and method of forming the same

Also Published As

Publication number Publication date
JP3986178B2 (en) 2007-10-03

Similar Documents

Publication Publication Date Title
US5913100A (en) Mo-W material for formation of wiring, Mo-W target and method for production thereof, and Mo-W wiring thin film
US7944056B2 (en) Hillock-free aluminum layer and method of forming the same
US6110598A (en) Low resistive tantalum thin film structure and method for forming the same
JP2007081385A (en) Source drain electrode, transistor substrate and method for manufacturing the same, and display device
US6686661B1 (en) Thin film transistor having a copper alloy wire
US6140701A (en) Suppression of hillock formation in thin aluminum films
JP2000124155A (en) Al THIN-FILM FORMING METHOD
JP3938437B2 (en) Thin film formation method
JP3276446B2 (en) Al alloy thin film, method for producing the same, and sputtering target for forming an aluminum alloy thin film
US6312833B1 (en) Multilayered wiring layer
US6091151A (en) Wiring layer and method of forming the wiring layer
JP2522924B2 (en) Method for forming metal silicide film
JPH08162531A (en) Wiring formation
JP3282204B2 (en) Method of forming aluminum-based alloy film
JP3913694B2 (en) Mo-W target for wiring formation, Mo-W wiring thin film and liquid crystal display device using the same
JPH0282578A (en) Manufacture of thin film transistor
JPH07225395A (en) Liquid crystal display device and its production
JP3973838B2 (en) Method using hydrogen and oxygen gas in sputter deposition of aluminum-containing film and aluminum-containing film obtained thereby
JP2866228B2 (en) Method of manufacturing semiconductor device for liquid crystal display
US20040140490A1 (en) Hillock-free gate layer and method of manufacturing the same
JPH05259108A (en) Oxygen-doped titanium nitride film and its manufacture
JPH04333566A (en) Formation of thin film
JP3214024B2 (en) Thin film transistor and manufacturing method thereof
JPH05167075A (en) Thin film transistor and formation of its protective insulating film
JPH05251707A (en) Thin-film transistor and its manufacture

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050622

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061201

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20061226

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070223

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20070223

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070320

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20070521

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070521

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070612

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070614

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20070614

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070710

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070710

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100720

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100720

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130720

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees