JP2000101132A - Semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer for semiconductor light emitting elements, from which electrodes are hardly stripped in a semiconductor light emitting element manufacturing process, by suppressing crystal defects from occurring and reducing the irregularities of an electrode forming surface to planarizing. SOLUTION: This element 100 comprises a semiconductor substrate 1, and at least a first clad layer 2 of a III-V compd. semiconductor crystal, a light emitting layer 3, a second clad layer 4 having a reverse conductivity-type to the first clad layer and a window layer 5 laminated in this order. A lower electrode 7 is formed on the substrate 1, an upper electrode 6 is formed on the window layer 5, having at least a first window layer 11 near the light emitting layer 3 and a second window layer 12 far from the light emitting layer 3, the second window layer 12 is semiconductor layer, having an impurity concn. higher than that of the first window layer 11, and a first intermediate layer, in which the compsn. ratio of the III element varies, is disposed near the interface between the first and second window layers 11, 12. As a result, a wafer with few hillocks can be obtd.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device formed by laminating a compound semiconductor crystal on a substrate, and more particularly, to a technique for reducing crystal defects on the surface of the lamination and making it flat.

[0002]

2. Description of the Related Art A semiconductor light emitting device formed by laminating a compound semiconductor crystal on a substrate has a crystal lattice length of 0.5.
Since the availability of lattice mismatched crystals differing by more than%, it has been possible to emit light with high luminance in a wide wavelength range from blue to infrared.

For example, a semiconductor light emitting device that emits green light described in US Pat. No. 5,008,718 has a structure as shown in FIG. 11 (hereinafter, referred to as “conventional example 1”). The semiconductor light emitting device 1100 is manufactured by the following procedure.

In FIG. 11, an n-type InAlG lattice-matched to a temporary n-type GaAs substrate (not shown) is provided.
aP first cladding layer 102, non-doped InAlGaP
Light emitting layer 103, p-type InAlGaP second cladding layer 10
4, and a p-type GaP window layer 105 is grown. GaAs
After removing the temporary substrate (not shown), a transparent substrate layer 109 is grown on the n-type first cladding layer 102 to obtain a semiconductor light emitting device wafer.

Next, an n-side electrode 1 is formed on the transparent substrate layer 109.
07 is provided. A circular p-side electrode 106 is provided at the center of the electrode forming surface 105a of the window layer 105. 3 for the wafer
The semiconductor light emitting device 1100 shown in FIG. Both electrodes 106 and 107 are electrically connected to an external conductor. For example, the p-side electrode 106
Is bonded to a metal wire (not shown) having a diameter of about 30 μm connected to an external conductor (not shown).

[0006] GaP is used for the window layer 105 in order to increase the luminance of the semiconductor light emitting device. GaP has a crystal lattice value about 3.4% smaller than that of the GaAs crystal of the temporary substrate and is a lattice-mismatched crystal. However, since the band gap is sufficiently larger than the band gap of the InAlGaP crystal of the light emitting layer 103, GaP is emitted. The transmittance of the window layer 105 can be kept sufficiently high for light having a wavelength close to the band gap of the light-emitting layer 103 generated in the layer 103. As a result, absorption of light emitted from the light emitting layer 103 by the window layer 105 can be reduced, and the luminance of the semiconductor light emitting element can be increased.

It is also important to lower the resistance of the window layer 105 to increase the brightness of the semiconductor light emitting device. Both electrodes 1
When a current is injected from 06 and 107, green light having a wavelength of 560 nm is generated in the light emitting layer 103. When the resistance value of the window layer 105 is high, the current injected from the p-side electrode 106 spreads little in the lateral direction, so that the p-side electrode 10
Light emission is concentrated at a portion facing 6. Of the light generated in the light emitting layer 3, light that is incident substantially perpendicular to the boundary between the semiconductor light emitting element and the outside is efficiently output to the outside of the semiconductor light emitting element, but other light is reflected at the boundary, It does not contribute to the brightness of the semiconductor light emitting device. Therefore, the light emitting layer 1
In the case where light emission occurs at a portion opposing the p-side electrode 106 of No. 03, light incident perpendicularly to the boundary surface also
And the brightness of the semiconductor light emitting device is reduced.

As a method for lowering the resistance value, the p of the window layer 105 is reduced.
A method of increasing the type impurity concentration is well known. However, typical p-type impurities such as Zn (zinc) and Mg
(Magnesium), Be (beryllium), and the like are substances that easily diffuse in the crystal. When the p-type impurity concentration of the window layer 105 is increased, the p-type impurity is diffused to the light emitting layer 3, and the light of the current in the light emitting layer 3 The conversion efficiency itself decreases, and the luminance of the semiconductor light emitting device decreases.

To solve such a problem, Japanese Patent Laid-Open Publication No.
In JP-A-333519, the window layer has a two-layer structure, the p-type impurity concentration in the window layer near the active layer is low, and the p-type impurity concentration in the window layer far from the active layer is high. There is disclosed a technique for preventing the p-type impurity from diffusing to the light emitting layer and preventing the luminance of the semiconductor light emitting element from lowering (hereinafter referred to as “conventional example 2”).

FIG. 12 shows a conventional semiconductor light emitting device 12 of the second example.
FIG. The window layer 10 is provided on the semiconductor substrate 101.
5 has a two-layer structure, and a first window layer 111 close to the active layer and a second window layer 112 far from the active layer constitute a window layer 105.

In the semiconductor light emitting device of Conventional Example 2, the window layer 10
5, GaAlAs is used, but GaAlAs has a narrow band gap and low transmittance for green light. The present inventors have confirmed that the same effect can be obtained even when the window layer is made of GaP having a large band gap (hereinafter, referred to as a “conventional semiconductor light emitting device”).

[0012]

However, when the p-type impurity concentration of GaP used for the window layer is increased, a large number of crystal defects are generated on the surface on which the p-side electrode is formed.
Irregularities occur on the side electrode formation surface. Since the area of the p-side electrode 106 is as small as about 100 μm in diameter, the p-side electrode formation surface 1
If there is unevenness in the wafer 05a, the wafer is divided and the p-side electrode 10
In the process of fabricating the semiconductor light emitting device by bonding a wire to 6, there is a problem that the p-side electrode 106 is easily peeled off from the window layer 105.

Among the above crystal defects, hillock (hill)
-Rock) is most important. The hillock defect is a protruding defect generated due to generation of a crystal plane having a different plane orientation from the substrate. Once a hillock defect occurs, it is not flattened by the crystal grown thereon, and the crystal grows while maintaining the protruding shape. The present inventors have found that hillock defects occur at an early stage of growing a layer having a higher p-type impurity concentration than that of a base, and that the higher the p-type impurity concentration of a grown layer, the more hillock defects occur.

The reason for the occurrence of hillock defects is that when the impurity material is rapidly increased in order to increase the impurity concentration, the movement of Ga and P, which are the main constituent elements of GaP, is temporarily hindered by the impurity material. This is considered to be due to the fact that it cannot be uniformly dispersed over the entire crystal surface during growth. Particularly, group V elements such as P, As, N, and Sb are difficult to move, and II
II used simultaneously with group I elements to move
The type of group I element has a large relationship with the presence or absence of crystal defects. For example, when the group III element is Ga, the bonding with the group V element is weak, so that the group V element is likely to come off. As a result, it is considered that the group V element is not uniformly dispersed in the initial stage of the growth of the layer having a higher impurity concentration than the base, and hillocks are generated.

According to the present invention, a group III element and a group V element, which are main constituent elements of a group III-V compound semiconductor crystal, are uniformly dispersed throughout the crystal surface during the crystal growth process, so that crystal defects such as hillocks are eliminated. It is an object of the present invention to provide a semiconductor light emitting device wafer in which generation is suppressed, the unevenness of an electrode formation surface is reduced, and the surface is flattened.

[0016]

According to a first aspect of the present invention, there is provided a semiconductor light emitting device, comprising: a substrate; a first cladding layer and a light emitting layer comprising at least a group III-V compound semiconductor crystal; A second cladding layer of a conductivity type and a window layer are laminated in this order, a lower electrode is formed on the substrate, and an upper electrode is formed on the window layer, and the window layer is at least a third electrode close to the light emitting layer. A first window layer and a second window layer farther from the light emitting layer, wherein the second window layer is a semiconductor layer having a higher impurity concentration than the first window layer, In the vicinity of the interface, the first group in which the composition ratio of the group III element is changed
Characterized by having an intervening layer of

Further, each semiconductor layer of the semiconductor light emitting device according to the second aspect has the following structure.

Semiconductor substrate: GaAs, first cladding layer: In _0.5 (Ga _x1 Al _{1 -x1} ) _0.5 P (where 0 ≦ x1 ≦ 1), active layer: In _0.5 (Ga _x2 Al _{1 -x2} ) _0.5 P (However, 0 ≦
x2 <1), _{or, Ga y Al 1-y As} ( where, 0 ≦ y
≦ 1) or In _z Ga _1-z As (where 0 ≦ z <
1), second cladding layer: In _0.5 (Ga _x3 Al _1-x3 ) _0.5 P (where 0 ≦ x3 ≦ 1), window layer: In _w Ga _x4 Al _1-w-x4 P (where 0 ≦ w) ≤
1, 0 ≦ x4 ≦ 1).

Further, the semiconductor light emitting device according to claim 3 is
The group III element of the first intermediate layer is In (indium).
And the composition ratio is higher than the composition ratio of the In element in the first window layer and the second window layer.

The semiconductor light emitting device according to claim 4 is
Near the interface between the second cladding layer and the first window layer, II
It has a second intervening layer in which the composition ratio of the group I element is changed, and is characterized by being higher than the composition ratio of In of the group III element in the first window layer.

The semiconductor light emitting device according to claim 5 is
A substrate, a first cladding layer made of at least a group III-V compound semiconductor crystal, a light emitting layer, a second cladding layer of a conductivity type opposite to the first cladding layer, and a window layer are laminated in this order; An electrode is formed on one side of the substrate and the window layer, respectively, and the window layer is at least a first layer close to the light emitting layer.
A window layer and a second window layer farther from the light emitting layer, wherein the second window layer is a semiconductor layer having a higher impurity concentration than the first window layer, and an interface between the first window layer and the second window layer. In the vicinity, the impurity concentration in the second window layer is gradually increased.

The semiconductor light emitting device according to claim 6 is
The impurity concentration in the first cladding layer near the interface between the second cladding layer and the first window layer is gradually increased.

The semiconductor light emitting device according to claim 7 is
The In composition ratio in the second window layer near the interface between the first window layer and the second window layer is gradually increased almost in proportion to an increase in impurity concentration.

The semiconductor light emitting device according to claim 8 is
A current blocking layer is provided on the interface between the second cladding layer and the first window layer, and the shape of the current blocking layer is substantially similar to the shape of the upper electrode. is there.

The semiconductor light emitting device according to claim 9 is
The current blocking layer has the following configuration. Current blocking layer: In _v Al _x6 Ga _1-v-x6 P (where 0 ≦ v
≦ 1, 0 ≦ x6 ≦ 1).

Further, in the semiconductor light emitting device according to a tenth aspect, the current blocking layer is provided at a central portion or a peripheral portion of the semiconductor light emitting device.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings. Embodiment 1 FIG. 1 shows Embodiment 1 according to the present invention.
FIG. 1A is a diagram illustrating a semiconductor light emitting device of FIG.
FIG. 1B is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 1B is a diagram illustrating a distribution of an In composition ratio in the thickness direction of the window layer 5.

Semiconductor light emitting device 1 according to Embodiment 1 of the present invention
The crystal growth of 00 is performed under reduced pressure MOVPE (low pressure MOCVD).
Method), and each layer of the semiconductor light emitting device 100 has the following configuration. 1 is an n-type GaAs substrate, 2 is an n-type In
_{A 0.5} Al _0.5 P cladding layer, the impurity is Si, the impurity concentration is 5 × 10 ¹⁷ cm ⁻³ , the thickness is about 1 μm, 3 is an undoped In _0.5 (Ga _0.55 Al _0.45 ) _0.5 P light emitting layer, and the thickness is about 0.1 μm. 5 μm, 4 is an n-type In _0.5 Al _0.5 P cladding layer, the impurity is Zn, the impurity concentration is 5 × 10 ¹⁷ cm ⁻³ , and the thickness is about 1
μm, 11 is a p-type GaP first window layer, the impurity is Zn and the impurity concentration is 1 × 10 ¹⁸ cm ⁻³ , the thickness is about 1 μm, 12 is the p-type GaP second window layer, the impurity is Zn and the impurity concentration is 1 × 10
¹⁹ cm ⁻³ , about 5 μm in thickness, the first window layer 11 and the second
The window layer 5 is formed by the window layer 12.

After stacking the above layers, an n-side electrode 7 is formed on one side of the n-type GaAs substrate 1 and a p-side electrode 6 is formed on one side of the electrode forming surface 5a of the p-type window layer 12, and the semiconductor light emitting device wafer ( Hereinafter, referred to as a “wafer according to the first embodiment”). The n-side electrode 7 is formed on the entire surface of the substrate 1, while the p-side electrode 6 has, for example, a circular shape with a diameter of about 100 μm in order to extract light. This wafer was divided into a size of about 300 μm square to produce a semiconductor light emitting device 100.

The p-type GaP first window layer 11 and the p-type GaP
The impurity concentration of Zn in the window layer 12 is 1 × 10 ¹⁸
Since there is a large drop in the impurity concentration distribution at the interface between cm ⁻³ and 1 × 10 ¹⁹ cm ⁻³ , it has been found that this causes a rise in the hillock defect density of the second window layer 12. As shown in FIG. 1B, near the interface between the p-type GaP first window layer 11 and the p-type GaP second window layer 12, III
The structure has an intervening layer to which In of a group element is added and an InGaP layer (first intervening layer).

In the first embodiment, a thickness of about 0.1 mm is set near the interface between the first window layer 11 and the p-type GaP second window layer 12.
μm In _0.01 Ga _0.99 P layer (Zn impurity concentration 1 × 1
0 ¹⁸ cm ^-3 ) and about 0.1 μm thick In _0.01 Ga _0.99 P
The structure has an intervening layer of a layer (Zn impurity concentration: 1 × 10 ¹⁹ cm ⁻³ ).

This is because In moves easily on the crystal surface like Ga, and the bond between In and the V group element is stronger than the bond between Ga and the V group element. , In and V elements (eg, P, As, N, S
b) is hardly dissociated, so that the group V element is In
It is considered that the impurity Zn can be uniformly dispersed on the crystal surface by moving in combination with the impurity.

The ratio of a specific Group III element to the total Group III element in the crystal is referred to as the composition ratio of the Group III element.
If the In composition ratio in the region of 0.1 μm thickness in the first window layer 11 and the second window layer 12 near the interface between the two window layers 11 and 12 is about 0.01, the uniformity of the group V element can be improved. Dispersion could be realized.

In the semiconductor light emitting device of the first embodiment,
In summary, each layer of the semiconductor has the following configuration. Semiconductor substrate: GaAs, first cladding layer: In _0.5 (Ga _x1 Al _1-x1 ) _0.5 P (however, 0 ≦ x1 ≦ 1), active layer: In _0.5 (Ga _x2 Al _1-x2 ) _0.5 P (however, 0 ≦
x2 <1), _{or, Ga y Al 1-y As} ( where, 0 ≦ y
≦ 1) or In _z Ga _1-z As (where 0 ≦ z <
1), second cladding layer: In _0.5 (Ga _x3 Al _1-x3 ) _0.5 P (where 0 ≦ x3 ≦ 1), window layer: In _w Al _x4 Ga _1-w-x4 P (where 0 ≦ w) ≤
1, 0 ≦ x4 ≦ 1).

FIG. 2 shows the hillock defect density on the vertical axis and the In composition ratio on the horizontal axis, and shows the measurement results of the hillock defect density with respect to the In composition ratio of the intervening layer between the first window layer and the second window layer. An example is shown.

In FIG. 2, the In composition ratio is about 5
The hillock defect density was about 1000, 1 × 10 ⁻⁴ , 9 × 10 ⁻⁴ , 4 × 10 ⁻³ , and 4 × 10 ⁻² , respectively.
It can be seen that the hillock defect density is greatly reduced only by slightly increasing the In composition ratio from 00, 10, 5 (number / cm ² ) to 0. FIG. 2 shows the results measured for a GaP single layer. In the case of a semiconductor light emitting device wafer,
The hillock defect density decreased slightly more when the n composition ratio was increased. When the In composition ratio is further increased, the hillock defect density also decreases, but does not decrease as sharply as when slightly added.

On the other hand, when the In composition ratio of the window layer 5 is increased, the semiconductor is an indirect transition semiconductor up to the In composition ratio of 0.23, which is almost the same as the band gap value of the GaP semiconductor. Due to the improvement of the performance, the current diffusion increases, and the luminance improves. However, when the In composition ratio of the window layer 5 further increases, the transmittance of the window layer 5 for green light decreases, and the luminance of the semiconductor light emitting device decreases. This is because the band gap of the window layer 5 becomes small.

A wafer for fabricating a conventional semiconductor light emitting device (hereinafter, referred to as a “conventional wafer”) has a defect density of about 1000 defects / cm ² , whereas a wafer of the first embodiment has a defect density of about 1000 defects / cm ^2. The number was reduced to 1/5, that is, 100 pieces / cm ² . The yield when semiconductor light emitting devices are manufactured using the wafer of Embodiment 1 is improved by about 30% as compared with the case where a conventional wafer is used. Emission wavelength is 560
nm, and the luminance could be increased by about 20% as compared with the conventional semiconductor light emitting device.

[Embodiment 2] FIG. 3 is a diagram illustrating a semiconductor light emitting device according to a second embodiment of the present invention. FIG. 3A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 4 is a diagram showing the distribution of the In composition ratio in the thickness direction of the window layer 5.

Semiconductor light emitting device 2 according to Embodiment 2 of the present invention
00, as in the first embodiment,
This is performed using a PE method (low-pressure MOCVD method).

Semiconductor light emitting device 200 of the second embodiment
_Means that the entire window layer 5 is made of In _0.01 Ga _0.99 P and the p-type In
_0.01 Ga _0.99 P first window layer (impurity is Zn, impurity concentration is 1 × 10 ¹⁸ cm ⁻³ , thickness is about 1 μm) 21, p-type In _0.01
Ga _0.99 P second window layer (impurity is Zn and impurity concentration is 1 ×
10 ¹⁹ cm ⁻³ , thickness of about 5 μm) 22,
Is formed.

Then, in the vicinity of the interface between the first window layer 21 and the p-type GaP second window layer 22, In _0.05 G having a thickness of about 0.1 μm is formed.
Structure having an intervening layer of an a _0.95 P layer (Zn impurity concentration 1 × 10 ¹⁸ cm ⁻³ ) and an In _0.05 Ga _0.95 P layer (Zn impurity concentration 1 × 10 ¹⁹ cm ⁻³ ) having a thickness of about 0.1 μm. The other layers are the same as those of the semiconductor light emitting device of the first embodiment. Thus, it can be seen that the defect density is reduced even when the entire window layer 5 is made of InGaP.

The defect density of the wafer having the semiconductor light emitting device configuration of the second embodiment (hereinafter referred to as “wafer of the second embodiment”) is about 10 defects / cm ^2, which is 1/1/2 of the conventional wafer. Reduced to 100. The yield when a semiconductor light emitting device is fabricated using the wafer of the second embodiment is about 40% higher than that when a semiconductor light emitting device is fabricated using a conventional wafer, and the luminance is about 20% higher than that of the conventional semiconductor light emitting device. % Increased.

Third Embodiment FIG. 4 is a diagram illustrating a semiconductor light emitting device according to a third embodiment of the present invention. FIG. 4A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 4 is a diagram showing the distribution of the In composition ratio in the thickness direction of the window layer 5.

Semiconductor light emitting device 300 of the third embodiment
Is the same as the semiconductor light emitting device of the second embodiment except that the entire window layer 5 is formed of an In _0.01 (Ga _0.8 Al _0.2 ) _0.99 P layer and a compound semiconductor layer containing Al.

That is, the p-type In _0.01 Al _0.2 Ga _0.79 P first window layer (the impurity is Zn and the impurity concentration is 1 × 10 ¹⁸ c
m ^-3 , thickness about 1 μm) 31, p-type In _0.01 Al _0.2 Ga
_0.79 P second window layer (impurity is Zn and impurity concentration is 1 × 10
¹⁹ cm ⁻³ , thickness of about 5 μm) 32 to form the window layer 5.

Then, in the vicinity of the interface between the first window layer 31 and the p-type GaP second window layer 32, In _0.01 A having a thickness of about 0.1 μm is formed.
l _0.2 Ga _0.79 P layer (Zn impurity concentration 1 × 10 ¹⁸ cm
^-3 ) and about _0.01 μm thick In _0.01 Al _0.2 Ga _0.79 P
The structure has an intervening layer of a layer (Zn impurity concentration: 1 × 10 ¹⁹ cm ⁻³ ). Thus, the entire window layer 5 is made of InA.
It can be seen that 1GaP also reduces the defect density.
By adding Al to the group III element constituting the window layer 5, the band gap of the window layer 5 can be prevented from being reduced.

Although the group III element Al has an effect of widening the band gap of the window layer, it has a weak bonding force with a group V element (for example, P, As, N, Sb, etc.) similarly to Ga, so that crystal defects are reduced. There is no reduction effect. Furthermore, since the speed of moving the crystal surface is slow, the effect of suppressing crystal defects due to In tends to be lost. For this reason, in the semiconductor light emitting device that emits green light, the first window layer 31 and the second window layer 3
2 in the first window layer 31 and the second window layer 32 near the interface of
It was difficult to make the n composition ratio 0.2 or more.

The wafer having the semiconductor light emitting device configuration of the third embodiment (hereinafter referred to as “wafer of the third embodiment”) has a defect density of 30 / cm ^2, which is smaller than that of the wafer of the second embodiment. The density has tripled. But,
The defect density is about 1/30 as compared with the conventional wafer. The brightness of the semiconductor light emitting device of the third embodiment is increased by about 30% as compared with the conventional semiconductor light emitting device i.

In the semiconductor light emitting device of the third embodiment,
In summary, each layer of the semiconductor has the following configuration. Semiconductor substrate: GaAs, first cladding layer: In _0.5 (Ga _x1 Al _1-x1 ) _0.5 P (however, 0 ≦ x1 ≦ 1), active layer: In _0.5 (Ga _x2 Al _1-x2 ) _0.5 P (however, 0 ≦
x2 <1), _{or, Ga y Al 1-y As} ( where, 0 ≦ y
≦ 1) or In _z Ga _1-z As (where 0 ≦ z <
1), second cladding layer: In _0.5 (Ga _x3 Al _1-x3 ) _0.5 P (0 ≦ x3 ≦ 1), window layer: In _w Al _x4 Ga _1-x4 P (0 ≦ w ≦ 1) ,
0 ≦ x4 ≦ 1).

Fourth Embodiment FIG. 5 is a diagram illustrating a semiconductor light emitting device according to a fourth embodiment of the present invention. FIG. 5A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 4 is a diagram showing the distribution of the In composition ratio in the thickness direction of the window layer 5.

Semiconductor light emitting device 4 according to Embodiment 4 of the present invention
The crystal growth of 00 is performed by a reduced pressure MOVPE method (a reduced pressure MOCVD method).
In addition, as shown in FIG. 5B, In is also added to the first window layer 41 near the interface between the second cladding layer 4 and the first window layer 41 to form In _0.01 Ga _0.99 P Layered point, second
This is the same as the semiconductor light emitting device 100 of the first embodiment except that an intervening layer is provided. The first window layer 41 and the second window layer 12 constitute the window layer 5.

The wafer having the semiconductor light emitting device configuration of the fourth embodiment (hereinafter referred to as “wafer of the fourth embodiment”) has a defect density of about 80 defects / cm ² , and the wafer of the fourth embodiment is used. The yield when semiconductor light emitting devices are manufactured by using a conventional wafer is
It improved about 40%.

[Fifth Embodiment] FIG. 6 is a diagram illustrating a semiconductor light emitting device according to a fifth embodiment of the present invention. FIG. 6A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 3 is a diagram showing a distribution of a p-type impurity concentration in a thickness direction of a window layer 5.

The semiconductor light emitting device 500 according to the fifth embodiment has
Second window layer 52 near the interface between first window layer 11 and second window layer 52
Except that the p-type (Zn) impurity concentration is gradually increased by one digit from 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ¹⁹ cm ^{−3 in} a region having a thickness of 1 μm. Same as the light emitting element.

The wafer having the semiconductor light emitting device configuration of the fifth embodiment (hereinafter referred to as “wafer of the fifth embodiment”) has a defect density of about 1000 in the conventional wafer.
The number of pieces / cm ² was reduced to about 500 pieces / cm ² by half. The yield in the case where a semiconductor light emitting device is manufactured using the wafer of the fifth embodiment is improved by about 7% as compared with the case where a conventional wafer is used.

[Embodiment 6] FIG. 7 is a diagram illustrating a semiconductor light emitting device according to a sixth embodiment of the present invention. FIG. 7A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 5 is a diagram showing a distribution of an In composition ratio in a thickness direction of the window layer 5 and a distribution of a p-type impurity concentration of the first window layer 61 and the second window layer 62.

Semiconductor light emitting device 600 of the sixth embodiment
Is to set the p-type impurity concentration in the region of 0.2 μm thickness in the first window layer 61 near the interface between the first window layer 61 and the second cladding layer 4 from 5 × 10 ¹⁷ cm ⁻³ to 1 × 10 5 It is the same as the semiconductor light emitting device of the fifth embodiment except that it is gradually increased to ¹⁸ cm ^-3 by a half digit.

The defect density of the wafer of the fifth embodiment is about 5
Although the number of defects was 00 / cm ² , the defect density of a wafer having the semiconductor light emitting element configuration of the sixth embodiment (hereinafter referred to as “wafer of the sixth embodiment”) was about 300 / cm ^2.
And could be further reduced. The yield when the semiconductor light emitting device is manufactured using the wafer of the sixth embodiment is higher than the yield when the conventional wafer is used.
It improved about 10%.

[Embodiment 7] FIG. 8 is a diagram illustrating a semiconductor light emitting device according to a seventh embodiment of the present invention. FIG. 8A is a schematic sectional view of the semiconductor light emitting device. b)
FIG. 8C is a view showing the distribution of the In composition ratio in the thickness direction of the window layer 5, and FIG. 8C is a view showing the first window layer 61 and the second window layer 62.
FIG. 7 is a diagram showing a distribution of a p-type impurity concentration of a second cladding layer.

Semiconductor Light Emitting Element 700 of Seventh Embodiment
Is that the composition of the first window layer 71 is an In _0.01 Ga _0.99 P layer, and in a region having a thickness of about 1 μm in the first window layer 71 near the interface between the first window layer 71 and the second window layer 72, By gradually increasing the In composition ratio from 0.01 to 0.05, the In _0.05 G
a _0.95 P layer and p-type impurity concentration of 1 × 10
^This is the same as the semiconductor light emitting device of the first embodiment except that the In composition ratio is gradually increased from ¹⁸ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ almost in proportion to the increase of the In composition ratio.

In the wafer having the semiconductor light emitting device configuration of the seventh embodiment (hereinafter referred to as “wafer of the seventh embodiment”), the defect density may be approximately 0 to 5 defects / cm ² and substantially defect-free. did it. The yield when semiconductor light emitting devices are manufactured using the wafer of the seventh embodiment is improved by about 50% as compared with the case where a conventional wafer is used.

[Eighth Embodiment] FIG. 9 is a schematic sectional view illustrating a semiconductor light emitting device 800 according to an eighth embodiment of the present invention. Semiconductor light emitting device 100 of the first embodiment
The difference is that an n-type current blocking layer 8 is provided on the second cladding layer 4 between the second cladding layer 4 and the first window layer 11 and at a position facing the p-side electrode 6. It is.

Light generated in a portion of the light emitting layer 3 located below the p-side electrode 6 is reflected by the p-side electrode 6 and is hardly radiated to the outside. That is, the light emitting current flowing through the region of the light emitting layer 3 located below the p-side electrode 6 is a reactive current that does not significantly contribute to the external light emitting output. The n-type current blocking layer 8 forms an n-p junction at the interface with the p-type second cladding layer 4. When a forward bias voltage is applied to both electrodes 6 and 7 in order to cause a current to flow through the semiconductor light emitting element, the junction becomes reverse biased and blocks the flow of current. Therefore, all the current injected into the semiconductor light-emitting element flows to a portion of the light-emitting layer 3 that is not opposed to the p-side electrode 6, and almost no reactive current is generated. In this case, the shape of the current blocking layer 8 is substantially similar to the shape of the upper p-type electrode 6.

The composition of the n-type current blocking layer 8 is generally
In _v Al _x6 Ga _1-v-x6 P (however, 0 ≦ v ≦ 1, 0 ≦ x
6 ≦ 1) is used. As an example of a desirable composition, In
_{There is 0.01} Al _0.01 Ga _0.98 P.

In the semiconductor light emitting device according to the eighth embodiment, the p-side electrode 6 and the n-type current blocking layer 8 have a diameter of about 10
It was a 0 μm circular shape. This is because the area of the p-side electrode 6 is set to the minimum necessary size for bonding a wire to be applied to flow a current, and the reduction in luminance due to the p-side electrode 6 is minimized. The p-side electrode 6 and the n-type current blocking layer 8 are provided at the center of the device. Therefore, a current can be uniformly applied to the entire surface of the light emitting layer 3, and the brightness of the semiconductor light emitting device can be increased by about 40% as compared with the conventional example.
This semiconductor light emitting device can be used for applications such as outdoor display panels.

[Ninth Embodiment] FIG. 10 is a schematic sectional view of a semiconductor light emitting device 900 according to a ninth embodiment of the present invention. Similarly to the semiconductor light emitting device 800 of the eighth embodiment, an n-type current blocking layer 8 is provided between the second cladding layer 4 and the first window layer at a position facing the p-side electrode 6 on the second cladding layer 4. . Semiconductor light emitting device 900 according to the ninth embodiment
In the above, the p-side electrode 6 and the n-type current blocking layer 8 were provided in the peripheral portion of the device except for a circular portion having a diameter of about 100 μm in the central portion of the device. When the current is about 100
Since the light is concentrated on a narrow portion of μm, the response speed of the light ON / OFF with respect to the current ON / OFF can be increased, so that it can be used as a light source for optical communication.

The area S of the portion where the p-side electrode 6 and the n-type current blocking layer 8 are not formed is determined by the required luminance and the value of the response speed. That is, when the response speed may be slow but high luminance is required, S is increased. Conversely, when the luminance may be low but the response speed needs to be increased, S is increased.
Smaller.

Regarding the relationship between the area S and the luminance B, even if the area S is increased, the luminance B does not change much. This is because, when the area S is increased, the current density decreases and the brightness B
Is proportional to the amount of current.

On the other hand, regarding the relationship between the area S and the response speed τ, when the area S is reduced, the response speed τ is improved.
However, if it is too small, the adverse effect of increasing the resistance occurs. As an example, when the area S = 100 μmφ, the current I = 20 mA, and the forward voltage V _F = 1.95 V
When S = 50 μmφ, I = 20 mA, the forward voltage V _F = 2.2 V, and the response speed τ is improved by about 20%. However, since the forward voltage V _F increases 0.25 V, the present invention is often used area S = 100μmφ. As an example of a specific numerical value of the response speed τ, the area S =
By setting it to 100 μmφ, the response speed τ17.1 μ
s could be improved to 4.4 μs.

By setting the light emitting layer to In _0.1 Ga _0.9 As, a semiconductor light emitting device having an emission wavelength of 950 nm can be obtained.
It is effective as a light source for wireless communication using infrared light. On the other hand, when the light emitting layer is made of Ga _0.9 Al _0.1 As, a semiconductor light emitting device having an emission wavelength of 850 nm can be obtained. By using two semiconductor light emitting elements having different emission wavelengths as light sources, wavelength multiplex wireless communication using infrared light can be performed. Further, by changing the emission wavelength between the upstream signal and the downstream signal, full-duplex wireless communication using infrared light can be performed.

Further, since the light emitting area is small, it is easy to make the light emitted from the semiconductor light emitting element enter the optical fiber. Particularly, when a plastic optical fiber (APF) having a core is used as the optical fiber, the light emitting layer 3 is made of In.
_By setting _0.5 (Ga _x Al _{1 -x} ) _0.5 P and adjusting the Al composition ratio x between 0 and 1, a semiconductor light emitting device having an emission wavelength of 550 nm to 680 nm with a small APF transmission loss can be obtained. Can be This semiconductor light-emitting device has an AP
It is effective as a light source for optical fiber communication using F.

In the above description, the case where the crystal thin film lattice-matched to the substrate is used for the first cladding layer, the light emitting layer, and the second cladding layer, but the effect is not changed even if the lattice mismatched crystal thin film is used. Is clear.

Although the description has been given of the case where GaAs is used as the substrate, insulating crystals such as sapphire and Si
(Silicon), IV such as SiC (silicon carbide)
It may be a group II semiconductor or a II-VI group compound semiconductor such as ZnSe.

Although the case where P is used as the group V element has been described, similar effects can be obtained by using other group V elements such as As, N, and Sb.

In summary, when a plurality of window layers having different impurity concentrations are stacked, the main constituent elements constituting the window layers move quickly on the crystal surface during the crystal growth process as a group III element. It is important to add In, which has a strong bond. However, since In reduces the band gap of the semiconductor, the amount of addition needs to be in a range that keeps the transmittance of light generated in the light emitting layer high.

[0077]

According to the semiconductor light emitting device of the first aspect of the present invention, the substrate, the first cladding layer and the light emitting layer made of at least a group III-V compound semiconductor crystal, and of the opposite conductivity type to the first cladding layer. A second cladding layer and a window layer are laminated in this order, a lower electrode is formed on the substrate, and an upper electrode is formed on the window layer, wherein the window layer is at least a first window layer close to the light emitting layer. And a second window layer farther from the light emitting layer,
The second window layer is a semiconductor layer having a higher impurity concentration than the first window layer. The first window layer has a composition ratio of a group III element changed near an interface between the first window layer and the second window layer. It is characterized by having an intervening layer.

Therefore, a crystal defect (a hillock (hi) on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting element configuration is obtained.
Crystal defects referred to as "ll-rock") can be greatly reduced. As a result, the occurrence of defective products due to electrode peeling during the production of a semiconductor light emitting device using this wafer is reduced, and the production yield of the semiconductor light emitting device is increased. can do.

Further, according to the semiconductor light emitting device of the second aspect, each layer of the semiconductor has the following structure. Semiconductor substrate: GaAs, first cladding layer: In _0.5 (Ga _x1 Al _1-x1 ) _0.5 P (however, 0 ≦ x1 ≦ 1), active layer: In _0.5 (Ga _x2 Al _1-x2 ) _0.5 P (however, 0 ≦
x2 <1), _{or, Ga y Al 1-y As} ( where, 0 ≦ y
≦ 1) or In _z Ga _1-z As (where 0 ≦ z <
1), second cladding layer: In _0.5 (Ga _x3 Al _1-x3 ) _0.5 P (where 0 ≦ x3 ≦ 1), window layer: In _w Ga _x4 Al _1-w-x4 P (where 0 ≦ w) ≤
1, 0 ≦ x4 ≦ 1).

Therefore, compared to the conventional GaP, In and A
By adding l, it is possible to provide a wafer structure capable of reducing crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting element structure.

According to the semiconductor light emitting device of the third aspect, the group III element of the first intervening layer is an In (indium) element, and the In group of the first window layer and the second window layer is In.
It is characterized by having a higher composition ratio of the elements.
Therefore, it is possible to provide a wafer manufacturing means capable of reducing crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting element configuration. If too much In is added to the window layer, the resistivity increases and the operating voltage (forward voltage V _F ) increases compared to the conventional GaP, but the composition ratio of the In element is increased only in the second window layer. By doing so, the crystal defects are reduced and the composition ratio of the In element in the first window layer is low, so that the operating voltage can be lowered.

Further, in the semiconductor light emitting device according to any one of claims 1 to 3, the substrate, the first cladding layer made of a group III-V compound semiconductor crystal, the light emitting layer, the second cladding layer of the opposite conductivity type, and the window layer Are grown in this order,
An electrode is formed on each of the substrate and the window layer. The window layer has at least a first window layer near the light emitting layer and a second window layer farther from the light emitting layer, and the second window layer is the first window layer. A semiconductor light emitting device having a higher impurity concentration, wherein a composition ratio of a main constituent element of the III-V compound semiconductor crystal in the first window layer and the second window layer or an impurity concentration in the second window layer is By changing the density near the interface between the first window layer and the second window layer to uniformly disperse the main constituent elements in the crystal growth process, crystal defects on the electrode forming surface of the window layer can be reduced. In particular, as a means for uniformly dispersing the main constituent elements in the crystal growth process, the In composition ratio in the first window layer and the second window layer in the vicinity of the interface between the first window layer and the second window layer is determined by the interface. It is characterized in that it is higher than the In composition ratio in each layer away from the vicinity.

Further, according to the semiconductor light emitting device of the fourth aspect, in the vicinity of the interface between the second cladding layer and the first window layer,
It has a second intervening layer in which the composition ratio of the group III element is changed, and is higher than the composition ratio of In of the group III element in the first window layer.

Accordingly, it is possible to provide a wafer manufacturing means capable of further reducing the crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting element structure as compared with the means of the third aspect. Further, since there are many crystal defects near the interface between the second cladding layer and the first window layer (about 0.1 μm thick), the operating voltage is increased by increasing the In composition ratio only near this interface. And crystal defects can be reduced.

In the semiconductor light emitting device according to the present invention, as a means for uniformly dispersing the main constituent elements in the crystal growth process, in addition to the vicinity of the interface between the first window layer and the second window layer, Wherein the In composition ratio in the first window layer near the interface between the light emitting layer and the first window layer is higher than the In composition ratio in the first window layer away from the vicinity of the interface. It is.

According to the semiconductor light emitting device of the fifth aspect, the substrate, the first cladding layer and the light emitting layer made of at least a group III-V compound semiconductor crystal, and the second cladding of the opposite conductivity type to the first cladding layer. Layers and a window layer are laminated in this order, electrodes are formed on one surface of the substrate and the window layer, respectively, and the window layer is at least a first window layer close to the light emitting layer and a first window layer far from the light emitting layer. A second window layer, the second window layer being a semiconductor layer having a higher impurity concentration than the first window layer, wherein the second window layer is provided near an interface between the first window layer and the second window layer. The feature is that the impurity concentration in the inside is gradually increased.

Therefore, it is possible to provide a wafer manufacturing means for reducing crystal defects on the electrode forming surface of the window layer without reducing the transmittance of the window layer of the wafer having the semiconductor light emitting element structure with respect to the emission wavelength. In the conventional example, crystal defects were easily generated in the vicinity of the interface where the impurity concentration was sharply changed.However, by gradually increasing the impurity concentration, the transmittance and the resistivity were not different from those of the conventional example, so the operating voltage was also low. As a result, the effect was slightly smaller than the case where In was added, but the crystal defects could be reduced to about 1/2 and the yield could be improved by about 7%.

According to a sixth aspect of the present invention, the impurity concentration in the first cladding layer near the interface between the second cladding layer and the first window layer is gradually increased. Things.

Therefore, the crystal defects on the electrode forming surface of the window layer can be further reduced as compared with the means of claim 5 without reducing the transmittance of the window layer of the wafer having the semiconductor light emitting element structure with respect to the emission wavelength. Wafer preparation means can be provided. Near the interface between the cladding layer and the window layer,
Although crystal defects are likely to occur, the effect is slightly smaller than in the case where the transmittance and operating voltage are increased by gradually increasing the impurity concentration near the interface, but the crystal defects are reduced to about 3/10. We were able to.

Further, according to the semiconductor light emitting device of the present invention, the second light emitting element near the interface between the first window layer and the second window layer.
It is characterized in that the In composition ratio in the window layer is gradually increased almost in proportion to the increase in the impurity concentration.

Therefore, it is possible to provide a wafer manufacturing means capable of further reducing the crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting element structure as compared with the means of the fourth and sixth aspects. As a result, the yield could be improved by about 50%.

According to the semiconductor light emitting device of the present invention, a current blocking layer is provided on the interface between the second cladding layer and the first window layer, and the shape of the current blocking layer is an upper portion. The shape is substantially similar to the shape of the electrode.

Therefore, it is possible to provide a semiconductor light emitting device having few crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting device structure, good yield, and low reactive current. As a result, the brightness of the semiconductor light emitting device could be increased by about 40%.

According to the semiconductor light emitting device of the ninth aspect, the current blocking layer has the following configuration. Current blocking layer: In _v Al _x6 Ga _1-v-x6 P (where 0 ≦ v
≦ 1, 0 ≦ x6 ≦ 1).

Therefore, it is possible to provide a semiconductor light emitting device having few crystal defects on the electrode forming surface of the window layer of the wafer having the semiconductor light emitting device structure, a good yield, and a small reactive current. Since an InAlGaP current blocking layer containing In and Al is provided between the cladding layer and the window layer, crystal defects can be further reduced.
３3 / cm ² .

Further, according to the semiconductor light emitting device of the tenth aspect, the current blocking layer is provided at a central portion or a peripheral portion of the semiconductor light emitting device.

Therefore, there are few crystal defects on the electrode formation surface of the window layer, the yield is high, and the response of light ON / OFF to the semiconductor light emitting element or the current ON / OFF with high luminance is fast (the modulation speed is fast). A semiconductor light emitting device can be provided. Further, when the current blocking layer is provided in the peripheral portion of the semiconductor light emitting element, the current is concentrated in the central portion, and the current density of the light emitting portion increases, so that it is possible to select a small operating current. The response speed is area S = 1
The light emitting response speed τ of the semiconductor light emitting device according to claim 10 of the present invention is changed from the light emitting response speed τ of 17.1 μs of the semiconductor light emitting device according to claims 1 to 9 of the present invention to the light emitting response speed τ Was improved to 4.4 μs.

[Brief description of the drawings]

1A and 1B are diagrams illustrating a semiconductor light emitting device according to a first embodiment of the present invention, wherein FIG. 1A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 1B is an In composition ratio in a thickness direction of a window layer. FIG.

FIG. 2 is a diagram illustrating the dependency of the hillock density on the In composition ratio in a GaP single layer on a GaAs substrate according to the present invention.

3A and 3B are diagrams illustrating a semiconductor light emitting device according to a second embodiment of the present invention, wherein FIG. 3A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 3B is an In composition ratio in a thickness direction of a window layer. FIG.

4A and 4B are diagrams illustrating a semiconductor light emitting device according to Embodiment 3 of the present invention, wherein FIG. 4A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 4B is an In composition ratio in a thickness direction of a window layer. FIG.

5A and 5B are diagrams illustrating a semiconductor light emitting device according to Embodiment 4 of the present invention, wherein FIG. 5A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 5B is an In composition ratio in the thickness direction of the window layer. FIG.

FIGS. 6A and 6B are diagrams illustrating a semiconductor light emitting device according to a fifth embodiment of the present invention, wherein FIG. 6A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. It is a figure which shows distribution of density.

FIGS. 7A and 7B are diagrams illustrating a semiconductor light emitting device according to Embodiment 6 of the present invention, wherein FIG. 7A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 7B is an In composition ratio in the thickness direction of the window layer. FIG. 6 is a diagram showing a distribution of the p-type impurity concentration of the first window layer 61 and the second window layer 62.

8A and 8B are diagrams illustrating a semiconductor light emitting device according to Embodiment 7 of the present invention, wherein FIG. 8A is a schematic cross-sectional view of the semiconductor light emitting device, and FIG. 8B is an In composition ratio in the thickness direction of the window layer. FIG. 4C is a diagram showing the distribution of the p-type impurity concentration in the first window layer, the second window layer, and the second cladding layer.

FIG. 9 is a schematic sectional view illustrating a semiconductor light emitting device according to an eighth embodiment of the present invention.

FIG. 10 is a schematic sectional view illustrating a semiconductor light emitting device according to a ninth embodiment of the present invention.

FIG. 11 is a schematic sectional view of a semiconductor light emitting device of Conventional Example 1.

FIG. 12 is a schematic sectional view of a semiconductor light emitting device of Conventional Example 2.

[Explanation of symbols]

Reference Signs List 100 semiconductor light emitting device according to first embodiment of the present invention 200 semiconductor light emitting device according to the second embodiment of the present invention 300 semiconductor light emitting device according to the third embodiment of the present invention 400 semiconductor light emitting device 500 according to the fourth embodiment of the present invention Semiconductor light emitting device according to Embodiment 5 of the present invention 600 Semiconductor light emitting device according to Embodiment 6 of the present invention 700 Semiconductor light emitting device according to Embodiment 7 of the present invention 800 Semiconductor light emitting device according to Embodiment 8 of the present invention 900 Semiconductor light emitting device of embodiment 9 1 n-type GaAs substrate 2 n-type In _0.5 Al _0.5 P clad layer 3 undoped In _0.5 (Ga _0.55 Al _0.45 ) _0.5 P light-emitting layer 4 n-type In _0.5 Al _0.5 P clad layer 5 window layer 5a electrode formation surface 6 p-side electrode (upper electrode) 7 n-side electrode (lower electrode) 8 n-type current blocking layer 11 p-type GaP first window layer 12 p-type GaP second window layer 21 p-type In _0.01 Ga _0.99 P first window layer 22 p-type In _0.01 Ga _0.99 P second window layer 31 p-type In _0.01 Al _0.2 Ga _0.79 P first window layer 32 p-type In _0.01 Al _0.2 Ga _0.79 P second window Layer 41 First window layer 61 First window layer 62 Second window layer 71 p-type In _0.01 Ga _0.99 P first window layer 72 Second window layer

Claims (10)

[Claims] 1. A substrate, a first cladding layer made of at least a group III-V compound semiconductor crystal, a light emitting layer, and the first cladding layer.
A second cladding layer of the opposite conductivity type to the cladding layer, and a window layer,
Are laminated in this order, a lower electrode is formed on the substrate, and an upper electrode is formed on the window layer. The window layer is at least a first window layer close to the light emitting layer and a second window layer farther from the light emitting layer. Wherein the second window layer is a semiconductor layer having a higher impurity concentration than the first window layer, and changes a composition ratio of a group III element near an interface between the first window layer and the second window layer. A semiconductor light emitting device having a first intervening layer formed thereon. 2. The semiconductor light emitting device according to claim 1, wherein each layer of the semiconductor has the following structure. Semiconductor substrate: GaAs, first cladding layer: In _0.5 (Ga _x1 Al _1-x1 ) _0.5 P (however, 0 ≦ x1 ≦ 1), active layer: In _0.5 (Ga _x2 Al _1-x2 ) _0.5 P (however, 0 ≦
x2 <1), _{or, Ga y Al 1-y As} ( where, 0 ≦ y ≦ 1), _{or, In z Ga 1-z As} ( where, 0 ≦ z <1), the second cladding layer: an In _0.5 (Ga _x3 Al _1-x3 ) _0.5 P (0 ≦ x3 ≦ 1), window layer: In _w Ga _x4 Al _1-w-x4 P (0 ≦ w ≦
1, 0 ≦ x4 ≦ 1). 3. The semiconductor light emitting device according to claim 1, wherein the group III element of the first intervening layer is In (indium).
A semiconductor light-emitting device, which is an element and has a higher composition ratio of In element in the first window layer and the second window layer. 4. The semiconductor light emitting device according to claim 1, wherein an interface between the second clad layer and the first window layer is provided near the interface.
A semiconductor light emitting device having a second intervening layer in which the composition ratio of a group III element is changed, and having a higher composition ratio of In of a group III element in a first window layer. 5. A substrate, a first cladding layer made of at least a group III-V compound semiconductor crystal, a light emitting layer, and the first cladding layer.
A second cladding layer of the opposite conductivity type to the cladding layer, and a window layer,
Are laminated in this order, electrodes are formed on one side of the substrate and the window layer, respectively, and the window layer has at least a first window layer near the light emitting layer and a second window layer far from the light emitting layer. The second window layer is a semiconductor layer having a higher impurity concentration than the first window layer, and the second window layer is provided near the interface between the first window layer and the second window layer.
A semiconductor light emitting device wherein the impurity concentration in a window layer is gradually increased. 6. The semiconductor light emitting device according to claim 5, wherein an impurity concentration in said first cladding layer near an interface between said second cladding layer and said first window layer is gradually increased. Light emitting element. 7. The semiconductor light emitting device according to claim 5, wherein an In composition ratio in the second window layer near an interface between the first window layer and the second window layer is gradually increased substantially in proportion to an increase in impurity concentration. A semiconductor light emitting device characterized by having increased. 8. The semiconductor light emitting device according to claim 1, wherein a current blocking layer is provided on an interface between the second cladding layer and the first window layer, and the shape of the current blocking layer is an upper electrode. A semiconductor light emitting device having a shape substantially similar to the shape of the semiconductor light emitting device. 9. The semiconductor light emitting device according to claim 8, wherein said current blocking layer has the following structure. Current blocking layer: In _v Al _x6 Ga _1-v-x6 P (where 0 ≦ v
≦ 1, 0 ≦ x6 ≦ 1). 10. The semiconductor light emitting device according to claim 8, wherein the current blocking layer is provided at a central portion or a peripheral portion of the semiconductor light emitting device.