JP2000101079A - Semiconductor device with titanium silicide film and fabrication thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with titanium silicide film, and fabrication method thereof, in which generation of thin wire effect is suppressed even when the gate length or the wiring width is reduced. SOLUTION: The method for fabricating a semiconductor device with titanium silicide film comprises a step for forming a metal film 11 on a gate electrode 14 and an impurity layer 18 by sputtering titanium, a step for forming a protective film 15 on the metal film 15 by sputtering cobalt, and a step for forming a titanium silicide film 13 by heat treating the protective film 15, the titanium metal film 11, the gate electrode 14 and the impurity layer 18 to cause silicidizing reaction among them. According to the method, generation of thin wire is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having a titanium silicide film and a method of manufacturing the same. In particular, the present invention relates to a semiconductor device having a titanium silicide film on a single crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer, such as a gate electrode and a silicon substrate impurity of a semiconductor device, and a method of manufacturing the same.

[0002]

2. Description of the Related Art As means for increasing the speed and integration of a semiconductor device, so-called salicide (Self-Aligned-Sil
icide) technology. This is, for example, FIG.
A metal silicide layer 26 is formed in a self-aligned manner on the surface of a gate electrode 22 and on an impurity region 24 formed on a silicon substrate 20 in a MOS type semiconductor device as shown in FIG. Such a metal silicide layer 26
It is desirable to reduce the resistance of the circuit to increase the speed of the circuit.

Conventionally, as this metal silicide film, a titanium silicide film 26 manufactured by using a titanium nitride film as a protective film 25 as shown in FIG. 9A has been used.
This manufacturing method is as follows. As shown in FIG. 9A, a titanium film 23 is formed on the entire surface of the gate electrode 22, the impurity region 24 and the field oxide film 27, and thereafter, a protection film made of titanium nitride is continuously formed on the titanium film 23. Membrane 2
5 is formed. Next, a titanium silicide film 26 is formed on the surface of each of the gate electrode 22 and the impurity region 24 by heat-treating the titanium film 23, the protective film 25, the impurity region 24, and the gate electrode 22.

[0004]

However, it has been found that the technique using the above-mentioned titanium silicide film causes a problem called a fine line effect when the wiring is made thin.

In other words, when the width of the gate electrode is reduced in order to achieve high integration, the dispersion of the resistance in the titanium silicide layer increases, and the average value of the resistance increases. Problems arise.

The cause is considered as follows.
Titanium silicide has two crystal structures: a high resistance (about 100 Ω · cm) crystal structure (C49) and a low resistance (about 15 Ω · cm) crystal structure (C54). Usually, the wiring width is 1μ
m, the high-resistance crystal structure (C49) is 400
Crystal structure formed at a low temperature of about ℃ and low resistance (C54)
Are formed at a high temperature of about 700 ° C. On the other hand, as the wiring becomes thinner, the layer transition temperature from the high-resistance crystal structure (C49) to the low-resistance crystal structure (C54) increases. When the wiring width is, for example, 0.25 μm, the layer transition temperature is about 800 ° C. As described above, as the wiring becomes thinner, a layer transition from a high-resistance crystal structure to a low-resistance crystal structure is inhibited, and the ratio of high-resistance crystals increases. Further, as the wiring becomes thinner, the variation in the ratio between the low-resistance crystal and the high-resistance crystal increases. From such a thing, it is considered that the above problem occurs.

In addition, as a cause of the inhibition of the layer transition from the high-resistance crystal structure to the low-resistance crystal structure in the titanium silicide layer, it is considered that oxygen is mixed into the titanium silicide film. That is, when oxygen is mixed in the titanium silicide film, the layer transition is considered to be inhibited by the oxygen.

In order to prevent oxygen from being mixed into the titanium silicide film, the following manufacturing method has been considered. This manufacturing method will be described with reference to FIG.

As shown in FIG. 8, a field oxide film 119 is formed on a silicon substrate 110, and a gate oxide film 112 is formed on the silicon substrate 110 between the field oxide films 119. A gate electrode 114 made of polysilicon is formed on gate oxide film 112, and impurity ions are implanted into silicon substrate 110 using gate electrode 114 as a mask. As a result, the low-concentration impurity layer 117 is formed on the silicon substrate 110 in a self-aligned manner.

Thereafter, a side wall material 116 made of a silicon oxide film or a silicon nitride film is formed on the side wall of the gate electrode 114, and impurity ions are implanted into the silicon substrate 110 using the side wall material 116 and the gate electrode 114 as a mask.
As a result, a high-concentration impurity layer 118 is formed on the silicon substrate 110 in a self-aligned manner. Next, the impurity layer 11
Heat treatment is performed on the layers 7 and 118 so as to have an appropriate bonding depth. Thus, the LDD structure of the MOS transistor is formed.

Next, the gate electrode 114, the side wall material 116,
Titanium is sputtered on the entire surface of the impurity layers 117 and 118 and the field oxide film 119 to form a metal film 111. Thereafter, titanium is sputtered on the metal film 111 in a nitrogen atmosphere to form a protective film (Cap) 115 made of a titanium nitride film. Next, heat treatment is performed,
The silicon in the impurity layer 118 and the gate electrode 114 reacts with the titanium in the metal film 111 to form a titanium silicide film 113 on the surface of each of the gate electrode 114 and the impurity layer 118. After that, the unnecessary protection film and metal film that are not silicided are removed by etching.

However, in the semiconductor device manufactured by such a method, the protective film 11 made of titanium nitride is used.
No. 5 cannot completely avoid mixing of oxygen into the titanium silicide film. Therefore, when the wiring width of the gate electrode or the like is about 0.3 μm or less, it is possible to sufficiently solve the two problems that the dispersion of the resistance in the titanium silicide layer becomes large and that the average value of the resistance becomes large. Can not.

The present invention has been made in consideration of the above circumstances, and has as its object to reduce the variation in resistance even when the wiring width of a gate electrode or the like becomes smaller than about 0.3 μm, and to reduce the resistance. It is an object of the present invention to provide a semiconductor device provided with a titanium silicide film having a small average value of and a method for manufacturing the same. Another object of the present invention is to provide a semiconductor device provided with a titanium silicide film in which a thin line effect is suppressed even when a gate length or a wiring width is reduced, and a method for manufacturing the same.

[0014]

In order to solve the above-mentioned problems, a method for manufacturing a semiconductor device according to a first aspect of the present invention comprises:
The method includes the following steps.

(A) forming a field oxide film, a gate oxide film, a gate electrode, a side wall, and an impurity layer on a silicon substrate; and (b) forming the silicon substrate, the gate electrode, the side wall, and the impurity layer. Forming a metal film by sputtering titanium on the impurity layer and the field oxide film; and (c) forming a protective film by sputtering cobalt on the titanium film following the sputtering of titanium. And (d) heat-treating the metal film, the protective film, the impurity layer on the silicon substrate, and the gate electrode to mainly include titanium silicide on the impurity layer on the silicon substrate and the gate electrode. (E) removing the metal film and the protective film remaining on the side walls and the field oxide film by etching; The step of.

As a result, a titanium silicide layer having no thin wire effect, a small variation in resistance, and a small average value of resistance can be used as a wiring layer, and a semiconductor device with high speed and high integration is manufactured. be able to.

A semiconductor device according to a second aspect of the present invention has the following structure.

(A) a gate oxide film, a side wall, an impurity layer, and a field oxide film disposed on a silicon substrate;
(B) a gate electrode disposed on the gate oxide film;
(C) Titanium disposed on the impurity layer and produced by heating a metal film formed by sputtering titanium on the impurity layer and a protective film made of cobalt sputtered continuously thereon. A silicide film having the same composition as a silicide film containing silicide as a main component; (d) a metal film formed on the gate electrode by sputtering titanium on the gate electrode; A silicide film having the same composition as a silicide film containing titanium silicide as a main component, which is produced when a protective film made of cobalt is heat-treated.

As a result, a titanium silicide layer having no thin wire effect, a small variation in resistance and a small average value of resistance can be used as a wiring layer, and a semiconductor device with high speed and high integration is manufactured. be able to.

A method of manufacturing a semiconductor device having a titanium silicide film according to a third aspect of the present invention includes the following steps.

(A) a step of forming a metal film by sputtering titanium on a single crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer; and (b) the titanium film A step of forming a protective film by sputtering cobalt on the
(C) a step of heating the metal film and the protective film to produce a silicide film containing titanium silicide as a main component on the single crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer; A step of removing, by etching, the metal film and the protection film remaining without being silicided among the film and the protection film.

Thus, not only the above semiconductor but also a semiconductor device having a titanium silicide layer can be manufactured.

According to a fourth aspect of the present invention, there is provided a semiconductor device comprising: a single-crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer; and a single-crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer. Sputtering titanium on the single crystal silicon layer, polycrystalline silicon layer or amorphous silicon layer to form a metal film, and then successively sputtering cobalt to form a protection film, the protection film, the metal film and the A single-crystal silicon layer, a polycrystalline silicon layer or a silicide film containing titanium silicide as a main component produced on the polycrystalline silicon layer or the amorphous silicon layer when the polycrystalline silicon layer or the amorphous silicon layer is subjected to heat treatment; And a silicide film having the same composition.

Thus, not only the semiconductor described above, but also a semiconductor device having a titanium silicide layer can be provided.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a titanium silicide film, comprising: forming a titanium metal film on a single crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer; Forming a cobalt protective film on the titanium metal film, and the cobalt protective film;
The titanium metal film and the single crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer are subjected to a heat treatment so that the single crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer reacts with the titanium metal film to form a silicide. And a step of forming Further, the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer may be a gate electrode made of polysilicon formed on a silicon substrate or an impurity layer formed on a silicon substrate.

In the method of manufacturing a semiconductor device provided with a titanium silicide film according to the fifth aspect, the use of cobalt as the protective film makes it possible to suppress the incorporation of oxygen into the silicide film during silicidation. This makes it possible to obtain titanium silicide in which a layer transition from a high-resistance crystal structure (C49) to a low-resistance crystal structure (C54) easily occurs. For this reason, even if the gate length or the wiring is reduced, it is possible to suppress the occurrence of the fine line effect.

Preferably, the thickness of the protective film is smaller than the thickness of the metal film. Thereby, the occurrence of the thin line effect can be reliably suppressed.

It is preferable that the surface of the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer is not pre-amorphized before the step of forming the titanium metal film. This is because the effect of pre-amorphization that has been conventionally considered does not exist.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

1 to 6 are sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG.
On the silicon substrate 10 between the field oxide films 19, a gate oxide film 1 is formed.
Form 2 A gate electrode 14 made of polysilicon is formed on the gate oxide film 12, and impurity ions are implanted into the silicon substrate 10 using the gate electrode 14 as a mask. Thus, the low-concentration impurity layer 17 is formed on the silicon substrate 10 in a self-aligned manner.

Thereafter, a sidewall material 16 made of a silicon oxide film or a silicon nitride film is formed on the sidewall of the gate electrode 14, and impurity ions are implanted into the silicon substrate 10 using the sidewall material 16 and the gate electrode 14 as a mask. Thus, the high-concentration impurity layer 18 is formed on the silicon substrate 10 in a self-aligned manner. Next, heat treatment is performed to make the impurity layers 17 and 18 have an appropriate junction depth. Thus M
An LDD structure of the OS transistor is formed.

Next, as shown in FIG.
4, sidewall material 16, impurity layer 18, and field oxide film 1
A metal film 11 is formed by sputtering titanium on the entire surface of the substrate 9. At this time, the thickness of the metal film 11 is, for example, 30 nm.
It is about. The thickness of the metal film 11 can be calculated by dividing the desired thickness of the titanium silicide film by a certain constant. In the present embodiment, this constant is about 2.5. Note that the natural oxide film on the gate electrode 14 and the impurity layer 18 is completely removed before sputtering the titanium.

Thereafter, as shown in FIG. 3, cobalt is sputtered on the metal film 11 to form a protective film (C).
ap) 15 is formed. At this time, the thickness of the protective film 15 is
It is preferable that the thickness is smaller than the metal film 11, for example, 20 n
m.

Next, as shown in FIG. 4, the metal film 11, the protective film 15, the impurity layer 18, and the gate electrode 14 are
Heat treatment at 00 ° C. for 30 seconds. By this heat treatment, silicon in the impurity layer 18 and the gate electrode 14 and the metal film 1
By reacting the titanium in 1, a titanium silicide film 13 having a thickness of about 75 nm is formed on each surface of the gate electrode 14 and the impurity layer 18.

Thereafter, as shown in FIG. 5, the metal film 11 and the protection film 15 remaining without being silicided on the field oxide film 19 and the side walls 16 are removed by etching. At this time, for example, an etching solution obtained by adding aqueous hydrogen peroxide to aqueous ammonia is used. Next, an annealing process of heating the titanium silicide film 13 at, for example, 800 ° C. to 900 ° C. for about 30 seconds is performed. This is for the purpose of activating the semiconductor element and changing the layer of the titanium silicide film 13 from a high-resistance crystal structure (C49) to a low-resistance crystal structure (C54).

Next, as shown in FIG. 6, a wiring as a semiconductor element and a protective film called passivation are formed. For this, a known technique can be used.
That is, the interlayer insulating film 8 made of SiO ₂ is formed on the entire surface of the titanium silicide film 13, the field oxide film 19, and the side wall 16. Next, a contact hole located on the titanium silicide film 13 is formed in the interlayer insulating film 8,
An Al wiring 9 for electrically connecting to the titanium silicide film 13 is formed in the contact hole.

According to the above embodiment, at the time of silicidation, the titanium silicide film 1 is formed by using cobalt instead of titanium nitride as the protective film (Cap) 15.
3 can be prevented from being mixed with oxygen. This is because cobalt is a pure metal compared to titanium nitride, so that the cobalt protective film is a dense film, and thus has higher oxygen blocking properties than titanium nitride. Thereby, a high-resistance crystal structure (C
49) to a low-resistance crystal structure (C54). For this reason, even if the gate length or the wiring is reduced, it is possible to suppress the occurrence of the fine line effect. As a result, high speed and high integration of a semiconductor device (particularly, a MOS type semiconductor device) can be achieved.

FIG. 7 is a graph showing the relationship between the wiring width (or gate length) L of the titanium silicide film manufactured by the above manufacturing method and the sheet resistance R of the titanium silicide film. That is, it is a graph showing the results of measuring the sheet resistance of these wirings by forming wirings of various widths using two kinds of titanium silicide films, and showing the wiring width dependence of the sheet resistance.

Here, the two types of titanium silicide films are:
A titanium silicide film formed by a titanium metal film having a thickness of 20 nm and a cobalt protective film having a thickness of 10 nm;
This is a titanium silicide film formed by a titanium metal film having a thickness of 50 nm and a titanium nitride protective film having a thickness of 50 nm.

FIG. 7 shows that the sheet resistance of the titanium silicide film using titanium nitride as the protective film sharply increases when the wiring width L becomes 0.25 μm or less. On the other hand, the titanium silicide film using cobalt having a thickness of 10 nm as the protective film was able to lower the sheet resistance even when the wiring width L was 0.18 μm or less.

From these results, it was confirmed that the effect of the present embodiment as described above, that is, the effect of suppressing the occurrence of the thin line effect even when the gate length or the wiring was reduced was confirmed.

Also, it was confirmed that even if the surfaces of the gate electrode and the impurity layer were made to be pre-amorphous, the effect of reducing the resistance of silicide as conventionally considered could not be obtained.

That is, before the metal film 11 is formed in the step shown in FIG. 2, the surfaces of the gate electrode 14 and the impurity layer 18 are each subjected to Ar sputtering to make the surfaces amorphous in advance. Conventionally, it has been considered that forming the silicide film 13 on the surface can reduce the resistance of the silicide film.

However, the sheet resistance of a wiring made of a titanium silicide film formed using a cobalt protective film with PRA-ION (pre-amorphization) is reduced by PRA-ION.
When compared with the sheet resistance of the wiring made of the titanium silicide film formed using the cobalt protective film without ION, it was found that the resistance value was almost the same. From this result, it was confirmed that the step of performing Ar sputtering on the surfaces of the gate electrode 14 and the impurity layer 18 to make the surfaces amorphous was unnecessary.

The above-described embodiment does not limit the present invention, and other embodiments can be adopted without departing from the principle of the present invention.

[0047]

As described above, according to the present invention, a titanium silicide film having a small resistance variation and a small average resistance even when the wiring width of a gate electrode or the like becomes thinner than about 0.3 μm. And a method of manufacturing the same.

According to the present invention, the impurity-containing layer is silicided using the cobalt protective film. Therefore, it is possible to provide a semiconductor device provided with a titanium silicide film in which the generation of the fine line effect is suppressed even when the gate length or the wiring width is reduced, and a method for manufacturing the same.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 1;

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 2;

FIG. 4 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, which shows the step subsequent to FIG. 3;

FIG. 5 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the embodiment of the present invention, which shows the step subsequent to FIG. 4;

FIG. 6 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention, which illustrates the next step of FIG. 5;

FIG. 7 is a graph showing a relationship between a wiring width L of a titanium silicide film manufactured by a manufacturing method according to an embodiment of the present invention and a sheet resistance R of the titanium silicide film.

FIG. 8 is a cross-sectional view illustrating a method for manufacturing a conventional semiconductor device.

FIGS. 9A and 9B are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device having a titanium silicide film.

[Explanation of symbols]

Reference Signs List 8 interlayer insulating film 9 Al wiring 10 silicon substrate 11 metal film 12 gate oxide film 13 titanium silicide film 14 gate electrode 15 protective film 16 sidewall material 17 low concentration impurity layer 18 high concentration impurity layer 19 field oxide film 20 silicon substrate 22 gate electrode Reference Signs List 23 titanium film 24 impurity region 25 protective film 26 metal silicide layer (titanium silicide film) 27 field oxide film 110 silicon substrate 111 metal film 112 gate oxide film 113 titanium silicide film 114 gate electrode 115 protective film 117 low concentration impurity layer 118 high concentration Impurity layer 119 Field oxide film

Claims (8)

[Claims] 1. A method for manufacturing a semiconductor device, comprising the following steps. (A) forming a field oxide film, a gate oxide film, a gate electrode, a sidewall, and an impurity layer on a silicon substrate; and (b) forming the silicon substrate, the gate electrode, the sidewall,
Forming a metal film by further sputtering titanium on the impurity layer and the field oxide film; and (c) continuously sputtering titanium, cobalt is sputtered on the titanium film to form a protective film. (D) heat-treating the metal film, the protective film, the impurity layer on the silicon substrate, and the gate electrode to form titanium silicide on the impurity layer on the silicon substrate and the gate electrode. (E) removing the metal film and the protective film remaining on the side wall and the field oxide film by etching; 2. A semiconductor device having the following structure. (A) a gate oxide film, a sidewall, an impurity layer, and a field oxide film disposed on a silicon substrate; (b) a gate electrode disposed on the gate oxide film; and (c) a gate electrode disposed on the impurity layer. Disposed, a silicide film containing titanium silicide as a main component produced when a metal film formed by sputtering titanium on the impurity layer and a protective film made of cobalt sputtered continuously thereon are heated. (D) heating a metal film disposed on the gate electrode and formed by sputtering titanium on the gate electrode, and a protective film made of cobalt sputtered continuously thereon; A silicide film having the same composition as a silicide film containing titanium silicide as a main component, which is manufactured when the treatment is performed. 3. A method for manufacturing a semiconductor device having a titanium silicide film, comprising the following steps. (A) a step of forming a metal film by sputtering titanium on a single-crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer; and (b) forming a cobalt film on the titanium film following the sputtering of titanium. (C) heat-treating the metal film and the protective film to make titanium silicide as a main component on the single-crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer. Manufacturing a silicide film; and (d) removing the metal film and the protection film remaining without being silicided from the metal film and the protection film by etching. 4. A single crystal silicon layer, a polycrystalline silicon layer or an amorphous silicon layer, and the single crystal silicon layer,
Disposed on a polycrystalline silicon layer or an amorphous silicon layer, a titanium film is formed on the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer to form a metal film, and then cobalt is sputtered continuously. When a protective film is formed and the protective film, the metal film and the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer are subjected to heat treatment, the protective film is formed on the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer. And a silicide film having the same composition as a silicide film to be manufactured containing titanium silicide as a main component. 5. A step of forming a titanium metal film on a single-crystal silicon layer, a polycrystalline silicon layer, or an amorphous silicon layer, a step of forming a cobalt protective film on the titanium metal film, The titanium metal film and the single crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer are subjected to a heat treatment so that the single crystal silicon layer, the polycrystalline silicon layer, or the amorphous silicon layer reacts with the titanium metal film to form a silicide. A method for manufacturing a semiconductor device comprising a titanium silicide film, comprising the steps of: 6. A method according to claim 1, wherein said single-crystal silicon layer, polycrystalline silicon layer or amorphous silicon layer is a gate electrode made of polysilicon formed on a silicon substrate or an impurity layer formed on a silicon substrate. A method for manufacturing a semiconductor device comprising the titanium silicide film according to claim 5. 7. The method for manufacturing a semiconductor device having a titanium silicide film according to claim 5, wherein the thickness of the protective film is smaller than the thickness of the metal film. 8. The method according to claim 5, wherein the surface of the single crystal silicon layer, the polycrystalline silicon layer or the amorphous silicon layer is not pre-amorphized before the step of forming the titanium metal film. A method for manufacturing a semiconductor device comprising the titanium silicide film according to any one of the preceding claims.