JP2000050651A - Inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the occurrence of input current pause interval by providing a circuit compensating for decrease in the amplitude of charging/discharging current and voltage of a capacitor, when the resonance current of an inverter circuit decreases as the output decreased through increase of frequency thereby suppressing decrease in the voltage amplitude of the capacitor. SOLUTION: This inverter improves harmonics of input current through boost chopper action for storing energy in an inductance component with the discharge current of a capacitor C3 which is charged/discharged with a resonance circuit current, in response to turn on/off of switching elements Q1, Q2 in the inverter circuit and the power supply voltage obtained by rectifying an AC power supply Vs and discharging the stored energy to an electrolytic capacitor C1. The inductance component is connected in parallel with an amplitude correcting circuit Z (e.g., a series circuit of an inductor L2 and a capacitor C4) which supplies a current compensating for current decrease of the inductance component, when the output is controlled to decrease.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device for converting a DC voltage obtained by rectifying and smoothing an AC power into a high-frequency voltage and supplying it to a load.

[0002]

2. Description of the Related Art FIG. 12 shows a conventional example (Japanese Patent Application No. 9-88526).
FIG. In this conventional example, when the output of the inverter is narrowed down, there is a problem that a pause period occurs in the input current and the input current harmonics increase. The cause will be described below. FIG. 13 shows the input voltage Vin, the input current Iin, and the capacitor C in the fully lit state.
3 is a waveform of the voltage Vc3. Voltage V of capacitor C3
As shown, c3 is a waveform oscillating at a high frequency, the amplitude of which varies in accordance with the input voltage Vin, and the minimum value of the amplitude in the high frequency cycle is almost equal to the input voltage Vi.
It is the absolute value of n.

FIG. 14 shows a waveform of the voltage Vc3 of the capacitor C3 near the power supply voltage zero. As shown, the voltage Vc3 of the capacitor C3 is divided into a period during which charging and discharging are performed and a period during which the voltage is fixed to a power supply voltage (here, zero volt). While the capacitor C3 is charged, the switching element Q1 is on, and the capacitor C1 → the switching element Q1 → the primary winding of the transformer T and the capacitor C
2 → Current flows in the loop of the capacitor C3. Next, during the period when the capacitor C3 is discharged, the switching element Q2
Is on, and a current flows through a loop of the capacitor C3 → the primary winding of the transformer T and the capacitor C2 → the switching element Q2. During this period, when the voltage of the capacitor C3 decreases and falls to a voltage equal to the power supply voltage (here, zero volt), the capacitor C3 is clamped at the power supply voltage,
Full-wave rectifier DB → Primary winding of transformer T and capacitor C
2 → Current flows in the loop of the switching element Q2. At this time, a step-up chopper having the primary winding of the transformer T as an inductance component is configured. Thereafter, the switching element Q2 is turned off, and the induced electromotive force generated in the primary winding of the transformer T is superimposed on the power supply voltage, and the switching element Q2 is turned off.
The capacitor C1 is charged via the diode D1 in parallel with the capacitor C1. When the charging current of the capacitor C1 becomes zero, the operation shifts to the charging period of the capacitor C3 again. As described above, in this circuit, after discharging the capacitor C3 and clamping the capacitor C3 to the power supply voltage, the power supply voltage causes the inductance component of the inverter circuit to accumulate energy, and the capacitor C3 is stored with the stored energy.
Also acts as a boost chopper for charging 1.

However, when the output is reduced by dimming, a pause occurs in the input current. FIG. 15 shows waveforms of the input voltage Vin, the input current Iin, and the voltage Vc3 of the capacitor C3 in the dimming state. FIG. 16 shows a waveform of the voltage Vc3 of the capacitor C3 near the power supply zero crossing at the time of dimming.
When dimming is performed, the resonance current is reduced, and accordingly, the charge / discharge current of the capacitor C3 is also reduced. Then, the voltage amplitude due to charging / discharging of the capacitor C3 decreases, and the voltage of the capacitor C3 does not decrease to the power supply voltage during the period when the power supply voltage is low as illustrated. Since the voltage of the capacitor C3 does not drop to the power supply voltage due to the discharge, a current does not flow from the power supply through the primary winding of the transformer T, and a pause occurs in the input current Iin.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to reduce the input current when the inverter output, which is a problem in the conventional example, is reduced. An object of the present invention is to solve the problem that a pause period occurs and the input current harmonics increase.

[0006]

According to the present invention, in order to solve the above-mentioned problems, as shown in FIG.
s, a first capacitor C1 for smoothing, and a first and second switching element Q1, connected in parallel with the first capacitor C1 and alternately turned on and off at a high frequency. The series circuit of Q2 and the first
And second diodes D1 and D2 connected in anti-parallel with second and second switching elements Q1 and Q2, respectively.
An inductance component connected between a connection point between the first and second switching elements Q1 and Q2 and one DC output terminal of the rectifier DB, and an inverter load circuit connected in parallel to the inductance component. One end is connected to the connection point between the inductance component and the DC output terminal of the rectifier DB, the other end is connected to one terminal of the first capacitor C1, and the first and second switching elements Q1, Q2 are connected. And a second capacitor C3 forming a resonance circuit in accordance with the on / off state of the first capacitor C1. The DC output terminal of the rectifier DB is connected to the first capacitor C1.
Of the pair of terminals from the AC power supply Vs to the terminal on the side where a current flow path is formed via the inductance component, one of the first and second diodes D1 and D2, and the first capacitor C1. In an inverter device that is connected and includes a control circuit that varies the drive frequency of the first and second switching elements Q1 and Q2 to vary the output, when the output is controlled to decrease, the current of the inductance component is reduced. Characterized in that an amplitude correction circuit Z for flowing a current for compensating for the decrease of the resistance is connected in parallel to the inductance component. Here, it is preferable that the amplitude correction circuit Z includes, for example, a series circuit of an inductor L2 and a capacitor C4.

[0007]

(Embodiment 1) FIG. 1 shows a circuit diagram of Embodiment 1 of the present invention. The feature of this circuit is that the inductor L2 and the capacitor are connected in parallel with the primary winding n1 of the transformer T between the connection point of the full-wave rectifier DB and the capacitor C3 and the connection point of the switching elements Q1 and Q2, as compared with the conventional circuit of FIG. That is, a series circuit of C4 is connected. This series circuit of the inductor L2 and the capacitor C4 forms a capacitor C3
At the same time. Other circuit configuration is shown in FIG.
The conventional circuit without the amplitude correction circuit Z has the same circuit constant as that of the conventional circuit 2, and is designed so that a pause period occurs in the input current in the dimming state, as shown in the conventional example. In the figure, load is a load.

In the configuration of the present embodiment, the degree of occurrence of the pause period of the input current is reduced by the operation of the amplitude correction circuit Z even when dimming is performed, and therefore, the generation of the input current harmonic is suppressed. Hereinafter, the operation of the amplitude correction circuit Z will be described. FIG. 2 shows the resonance current of the inverter and the amplitude correction circuit Z.
2 shows the frequency characteristics of the current. Frequency f1 is the entire lighting frequency, and f2 is the lowest frequency of dimming. The resonance current of the inverter decreases as the frequency increases from f1 to f2. In the conventional example, since the inverter resonance current decreases when dimming, the amplitude of the capacitor C3 decreases, and the voltage of the capacitor C3 does not decrease to the power supply voltage during a period when the power supply voltage is low, and the full-wave rectifier DB does not turn on. The current stops flowing.

Therefore, in the present invention, as shown in FIG.
, The constant of the amplitude correction circuit Z is selected such that the current of the capacitor C3 increases. In such a setting, the amplitude correction circuit Z includes the inductor L2 and the capacitor C4.
, The natural resonance frequency f0 of the inductor L2 and the capacitor C4 (= 1 / 2π√ (L2C
This can be realized by selecting 4)) higher than f2.

In this case, even if the dimming causes the inverter resonance current to decrease, the current in the amplitude correction circuit Z increases, so that the decrease in the charge / discharge current of the capacitor C3 decreases, and the amplitude of the capacitor C3 decreases. Therefore, even if the power supply voltage is low, the voltage of the capacitor C3 drops to the power supply voltage, and the full-wave rectifier DB can be turned on. Therefore,
The input current starts to flow, and the idle period is reduced.

FIG. 2 shows a case where the natural resonance frequency f0 of the inductor L2 and the capacitor C4 is set to a value close to the frequency f2 at the time of maximum dimming. In this case, although the current of the amplitude correction circuit Z depends on how to select the value of the inductor L2, when the frequency is f2, the amplitude correction circuit Z is close to the resonance point, and thus may have a considerably large current value. In such a state, the current of the amplitude correction circuit Z becomes larger than the inverter resonance current, and the combined current is advanced, which may give a stress when the switching elements Q1 and Q2 are turned on and off.

FIG. 3 is a characteristic diagram when the natural resonance frequency f0 of the inductor L2 and the capacitor C4 is set sufficiently higher than the frequency f2 at the time of maximum dimming. in this case,
The current value of the amplitude correction circuit Z is smaller than in the case of FIG. However, FIGS. 2 and 3 show a relative comparison between the magnitude of the inverter resonance current and the current of the amplitude correction circuit Z, and show that it is sometimes preferable that the current of the amplitude correction circuit Z is small as shown in FIG. It's just that.

In any case, if the amplitude correction circuit Z having such a characteristic that the current of the capacitor C3 increases so as to compensate for the decrease of the inverter resonance current as the frequency rises, the above-described situation can be obtained. The effect is obtained.

(Embodiment 2) FIG. 4 shows a circuit diagram of Embodiment 2 of the present invention. The feature of this circuit is that the transformer T is changed from a leakage transformer to a normal transformer and an inductor L1 is connected in series to a primary winding n1 of the transformer T as compared with the first embodiment of FIG. There is no essential difference in the operation itself, and what has been described in the previous embodiment similarly holds.

(Embodiment 3) FIG. 5 shows a circuit diagram of Embodiment 3 of the present invention. The feature of this circuit is that the connection of the full-wave rectifier DB, the capacitor C3, the inverter resonance circuit, and the amplitude compensation circuit Z of the capacitor C3 is changed from the switching element Q2 to the switching element Q1 as compared with the second embodiment of FIG. Things. The operation itself is not different except that the functions of the switching elements Q1 and Q2 are interchanged, and the same holds true for the description of the previous embodiment.

(Embodiment 4) FIG. 6 shows a circuit diagram of Embodiment 4 of the present invention. The feature of this circuit is that the connection position of the capacitor C3 is different from that of the first embodiment of FIG. 1, and one end of the output of the full-wave rectifier DB and one end of the capacitor C1 (the other end of the output of the full-wave rectifier DB (The terminal on the other side of the connection).

The operation of this embodiment is the same as that of the first embodiment shown in FIG.
Will be the same as The reason is that the full-wave rectifier D
The capacitance components connected to B are equal. Considering the capacitance connected to the output terminal of the full-wave rectifier DB, the capacitor C3 in FIG. 1 can be regarded as a series circuit of the capacitor C3 and the capacitor C1 in the present circuit. Here, C1 is an electrolytic capacitor, which has an extremely large capacity as compared with the capacitor C3, and the combined capacitance in series is almost equal to the capacitor C3. Therefore, although the connection position of the capacitor C3 changes, it can be regarded as the same in operation, and the same effect as in the previous embodiment can be obtained.

(Embodiment 5) FIG. 7 shows a circuit diagram of Embodiment 5 of the present invention. Compared with the first embodiment of FIG. 1, the feature of this circuit is that although the configuration of the power supply to which the capacitor C3 is connected is different, the operation is the same as that of the first embodiment.
That is, when the polarity of the AC power supply Vs is in the forward direction of the diode D4, the rectified power supply voltage
3, which is equivalent to FIG.
When the polarity of the AC power supply Vs is in the forward direction of the diode D3, a series circuit of the capacitor C3 and the rectified power supply is connected to both ends of the capacitor C1,
This is substantially equivalent to FIG. In each case,
Since the operation is the same as that of the previous embodiment, the effect of connecting the amplitude correction circuit Z of the capacitor C3 in parallel with the primary winding of the transformer T can be obtained in this circuit as well.

(Embodiments 6 to 8) FIGS. 8 to 10 show circuit diagrams of embodiments 6 to 8 of the present invention. In the previous examples,
An inductor L is used as the amplitude correction circuit Z for the capacitor C3.
2 and a capacitor C4 in series. Then, the resonance frequency f0 of the inductor L2 and the capacitor C4
Are set higher than the switching frequencies f1 and f2. In this case, the primary winding current of the transformer T becomes a lagging current at the switching frequency, whereas the current of the amplitude correction circuit Z of the capacitor C3 becomes a lagging current.

At the switching frequency, from the viewpoint of the leading current, the amplitude correction circuit Z of the capacitor C3 is used.
May be configured with only the capacitor C4 as shown in FIG. 8, or with the capacitor C4 and the resistor R as shown in FIG. FIG.
As shown in the figure, even when the amplitude correction circuit Z of the capacitor C3 is only the resistor R whose current does not decrease with respect to the increase in the frequency, the occurrence of the pause period of the input current is smaller than in the case where the amplitude correction circuit Z is not provided. The effect is as well. FIG.
10 shows the frequency characteristics of the resonance current of the inverter and the current of the amplitude correction circuit Z in the case of FIG.

[0021]

According to the present invention, energy is accumulated in an inductance component by a discharge current of a capacitor charged and discharged with a resonance circuit current according to the on / off of a switching element of an inverter circuit and a power supply voltage obtained by rectifying an AC power supply. And
When the resonance current of the inverter circuit becomes smaller as the frequency is increased and the output is decreased in an inverter device that improves the input current harmonics by boosting chopper action that releases the stored energy and charges the electrolytic capacitor. In addition, by providing a circuit for compensating for a decrease in the charge / discharge current and voltage amplitude of the capacitor, it is possible to suppress a decrease in the voltage amplitude of the capacitor, thereby suppressing a pause of the input current.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of the first embodiment of the present invention.

FIG. 3 is an operation explanatory diagram when the constant of the amplitude correction circuit according to the first embodiment of the present invention is changed.

FIG. 4 is a circuit diagram of a second embodiment of the present invention.

FIG. 5 is a circuit diagram of a third embodiment of the present invention.

FIG. 6 is a circuit diagram according to a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram of a fifth embodiment of the present invention.

FIG. 8 is a circuit diagram according to a sixth embodiment of the present invention.

FIG. 9 is a circuit diagram of a seventh embodiment of the present invention.

FIG. 10 is a circuit diagram of an eighth embodiment of the present invention.

FIG. 11 is an explanatory diagram of the operation of the eighth embodiment of the present invention.

FIG. 12 is a circuit diagram of a conventional example.

FIG. 13 is an operation waveform diagram of each section at the time of full lighting in the conventional example.

FIG. 14 is a waveform diagram showing voltage amplitudes of charging and discharging of a capacitor at the time of full lighting in a conventional example.

FIG. 15 is an operation waveform diagram of each section at the time of dimming lighting in a conventional example.

FIG. 16 is a waveform diagram showing a voltage amplitude of charging and discharging of a capacitor at the time of dimming lighting in a conventional example.

[Explanation of symbols]

 Z amplitude correction circuit L2 inductor C4 capacitor

Claims (3)

[Claims] 1. A rectifier for rectifying an AC output of an AC power supply, a first capacitor for smoothing, and first and second switching units connected in parallel with the first capacitor and alternately turned on and off at a high frequency. A series circuit of elements, first and second diodes connected in anti-parallel with the first and second switching elements, respectively, and a connection point between the first and second switching elements and one DC output terminal of the rectifier. And an inverter load circuit connected in parallel with the inductance component. One end is connected to a connection point between the inductance component and a DC output terminal of the rectifier, and the other end is connected to the first. And a resonance circuit is formed with the inductance component according to ON / OFF of the first and second switching elements. A DC output terminal of the rectifier, wherein the dc output terminal of the rectifier is connected between the AC power supply and one of the first and second diodes and the first capacitor from the AC power supply of the pair of terminals of the first capacitor. In the inverter device, which is connected to a terminal on the side where a current flow path is formed via the control circuit and varies the drive frequency of the first and second switching elements to vary the output, the output is reduced. An inverter device in which an amplitude correction circuit for flowing a current that compensates for a decrease in the current of the inductance component when controlled as described above is connected in parallel to the inductance component. 2. The apparatus according to claim 1, wherein said amplitude correction circuit comprises a series circuit of an inductor and a capacitor.
The inverter device as described. 3. The inverter device according to claim 1, wherein said amplitude correction circuit comprises a series circuit of a capacitor and a resistor.