JP2000049274A - Semiconductor device and lead frame - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a lead frame in which adverse effect of stored static electricity can be removed surely without causing any trouble in the high integration of semiconductor element. SOLUTION: The semiconductor device comprises a semiconductor element 40 having an inner circuit 41 operating as a semiconductor integrated circuit is arranged in the center and electrode terminals 42 arranged on the periphery, and leads 30 connected electrically with the electrode terminals and being led out to the outside of a package. Leads of NC pins 5, 7, 18 not connected electrically with the inner circuit 41 are removed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a read frame, and more particularly to a non-connect pin (hereinafter, referred to as an NC pin) which is not electrically connected to an internal circuit which performs an original operation of an integrated circuit. The present invention relates to a semiconductor device and a lead frame improved with respect to electrostatic breakdown.

[0002]

2. Description of the Related Art FIG. 7 is a plan view of a prior art showing a state where a semiconductor element is fixed to a lead frame and wire-bonded.

An internal circuit 41 which operates as a semiconductor integrated circuit is formed in the center, and a semiconductor element 40 having an array of electrode terminals (bonding pads) 42 formed in the periphery is fixed to an island 35 of a lead frame.

In the lead frame, the leads 30 of the 20 pins from pin 1 to pin 20 are formed from the outer frame 34 to the island 35, of which the pins 5, 7, and 18 are the internal circuit. The pin 6 is an input / output pin for sending a signal to an internal circuit or extracting a signal from the internal circuit.

The lead 30 of each pin is composed of an internal lead 31 existing inside the package and an external lead 32 led out of the package. The tip of the internal lead 31 and the electrode terminal 42 of the semiconductor element 40 are connected by a bonding wire 43. Connected and leads are tie bar 3
3 are connected.

Then, the inside of the tie bar 33 is resin-molded from the state shown in FIG.
FIG. 8 shows a DIP type semiconductor device obtained by bending the external leads 32 of the leads of each pin derived from the resin package 50.

In the prior art, since the leads of the NC pins are arranged in addition to the leads of the pins connected to the internal circuit, the static electricity (static charge) accumulated in the leads of the NC pins is transferred to the leads of the adjacent pins. There is a possibility that an internal circuit connected to an adjacent lead is electrostatically damaged.

For this purpose, Japanese Unexamined Patent Publication No. 2-119171 discloses that, as shown in FIG. 9, the lead of the NC pin is connected to a protection circuit provided at the periphery of the semiconductor element to discharge the static electricity of the lead of the NC pin. A technique for preventing a large amount of static electricity from accumulating in the lead by discharging is disclosed.

That is, in FIG. 9, which is an enlarged circuit diagram of a part of FIG. 7, the leads of the adjacent pins 6 and 8 are connected to the input section of the internal circuit 41 of the semiconductor element 40. In order to protect the internal circuit from a surge or static electricity applied to the adjacent pin from the outside, the peripheral portion 45 of the semiconductor element 40 between the electrode terminal to which the lead of the adjacent pin is connected and the internal circuit includes: Protection circuits 46, 46 each provided by a diode pair between Vcc and Vss are provided.

However, such protection circuits 46, 4
6 is not effective in preventing the lead of the NC pin 7 accumulated until mounted on the circuit board from being destroyed by static electricity, so that the protection circuit for the NC pin 7 is provided on the peripheral portion 45 of the semiconductor element 40. 47 is separately provided, and the tip of the lead of the NC pin 7 is connected to the protection circuit 47 by a diode pair between Vcc and Vss.

In this way, when the static electricity of the lead of the NC pin is accumulated to a certain extent, it is discharged to Vcc or Vss, and the accumulated electric charge of the static electricity of the lead of the NC pin can be suppressed to some extent.

[0012]

However, in the above-mentioned prior art, since a protection circuit 47 is required even for an NC pin which is not required as a product function, an extra mask layout area is required, and the height of the semiconductor element is accordingly increased. This will hinder integration.

The protection circuit 47 has a special purpose of discharging static electricity accumulated in the lead of the NC pin in a floating state after bonding in a manufacturing process and before mounting on a circuit board. The protection circuit 46 is different from the protection circuit 46 for protecting the internal circuit from an external surge or the like.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device and a lead frame capable of reliably eliminating the adverse effect of accumulated static electricity without hindering the high integration of semiconductor elements.

[0015]

A feature of the present invention is that a semiconductor element in which an internal circuit which operates as a semiconductor integrated circuit is formed in the center and electrode terminals are arranged in the periphery, a package, and an electric circuit which is electrically connected to the electrode terminals. And an arrangement of leads leading out of the package and connected to the internal circuit, wherein leads of NC pins that are not electrically connected to the internal circuit are removed.

Here, by removing all the leads of the NC pin, all of the existing leads can be electrically connected to the internal circuit.

Alternatively, the lead of the NC pin adjacent to the input / output pin among the leads of the plurality of NC pins can be selectively removed.

Furthermore, the leads of the NC pins may be entirely removed from internal leads inside the package to external leads derived from the package.

Alternatively, the NC pin lead may be formed by removing only the external lead out of the internal lead inside the package and the external lead derived from the package.

In this case, the remaining internal lead of the NC pin lead inside the package can be connected to the island on which the semiconductor element is mounted by a bonding wire.

In the arrangement of the tips of the internal leads in the package, the pitch of the removed portion may be an integral multiple of the pitch of the other portion.

In the arrangement of the external leads derived from the package, the pitch of the removed portion may be an integral multiple of the pitch of another portion.

Another feature of the present invention resides in a lead frame used for manufacturing the above-described semiconductor device.

[0024]

FIG. 1 is a plan view showing a state in which a semiconductor element is fixed to a lead frame and wire-bonded in a first embodiment of the present invention. In this embodiment, the lead corresponding to the NC pin is deleted at the design stage of the lead frame.
It can be carried out similarly to the manufacture of other semiconductor devices that do not make the existence of the C pin a problem.

In FIG. 1, a semiconductor element 40 in which an internal circuit 41 operating as a semiconductor integrated circuit is formed at the center and an electrode terminal (bonding pad) 42 is arranged and formed in a peripheral portion is fixed to an island 35 of a lead frame. .

For example, a 42 alloy (42% nickel, 58 iron)
% Alloy) and the lead frame formed by silver plating from the outer frame 34 toward the island 35.
Each lead 30 of the pin 20 is formed,
The pins 5 and 7 on both sides of the input / output pin 6 for sending a signal to or extracting a signal from the internal circuit are N
C pin. The pin 18 on the opposite side is also an NC pin.

Therefore, these NC pins 5, 7, 18
In the lead 30, both the internal lead 31 and the external lead 32 are removed.

That is, in this embodiment, all the NCs
The lead of the pin is removed from the internal lead to the external lead, and the tie bar 33 cut after resin sealing is provided there.
Only exists.

As described above, the leads of all the NC pins are removed, and the tips of the internal leads 31 of the pins 1 to 4, 6, 8 to 17, 19, and 20 are connected to the electrode terminals 42 by the bonding wires 43. The internal circuit 4 is connected to each of the electrode terminals by element internal wiring (not shown).
1 at predetermined positions. That is, all of the leads present are electrically connected to the internal circuitry and internal leads 31 prior to removal of the NC pin leads.
Are arranged at the pitch T, the pitch after the removal is such that the pitch 2T of the removed portion is an integral multiple of the pitch T of the other portion, here, twice.

Similarly, since the external leads 32 before removing the lead of the NC pin are all arranged at the pitch P, the arrangement after the removal is such that the pitch 2P of the removed portion is an integer of the pitch P of the other portion. That is, it is doubled. The pitch T of the internal leads 31 is equal to or less than the pitch P of the external leads 32. In particular, the present invention is effective when the pitch P of the external leads 32 is 1.78 mm or less.

FIG. 2 shows a state in which the inside of the tie bar 33 is resin-molded from the state of FIG.
4 shows a DIP type semiconductor device in which external leads 32 of leads of respective pins led out of a resin package 50 are bent. As described with reference to FIG. 1, all the leads of the NC pins have been removed.

It is also possible to use a method in which only the internal lead of the NC pin lead is removed in the state of FIG. 1 and the external lead of the NC pin lead is removed when cutting the tie bar after resin molding.

FIG. 3 is an enlarged circuit diagram of a part of FIG.
, Adjacent pins 6 and 8 are connected to respective protection circuits 4
Through the circuits 6 and 46, the semiconductor device 40 is connected to an internal circuit that performs an original integrated circuit operation. The protection circuit 46 provided in the peripheral portion 45 of the semiconductor element 40 protects the internal circuit from noise such as surges that enter during operation of the semiconductor device, and is constituted by a diode pair between Vcc and Vss.

However, N between the adjacent pin 6 and the adjacent pin 8
Since the lead of the C pin 7 has been removed, the protection circuit 47 shown in FIG. 8 is unnecessary.

FIG. 4 is a plan view showing a second embodiment of the present invention. Note that the same or similar portions as those in FIG. 1 are denoted by the same reference numerals, and thus redundant description will be omitted.

In FIG. 4, among the NC pins 5, 7, 18, the leads of the NC pins 5, 7 adjacent to the input / output pin 6 are removed, but the leads of other pins, for example, the NC pins 18 adjacent to the power supply pin, are removed. Is left. In the second embodiment, similarly to the first embodiment, at the design stage of the lead frame, among the leads corresponding to the NC pins, the leads that need to be removed are deleted.

This is because the leads of the input / output pins 6 are connected to an input circuit (an input section of an internal circuit) or an output circuit (an output section of an internal circuit) in which electrostatic breakdown is particularly likely to occur. Although it is necessary to prevent the transfer of static electricity from the lead 7, the power supply section of the internal circuit is resistant to electrostatic destruction, so that the lead of the NC pin 18 adjacent to the power supply pin remains and a protection circuit is provided there. This is a case in which there is substantially no problem even if it is not provided. By leaving the NC pins 18 in this manner, the flow of the resin during the resin sealing may be well balanced.

FIG. 5 is a plan view showing a third embodiment of the present invention. Note that the same or similar portions as those in FIG. 1 are denoted by the same reference numerals, and thus redundant description will be omitted.

In this embodiment, after the package 50 is formed by resin molding, the external leads 32 of the NC pins 5, 7, 18 or the leads of the NC pins 5, 7 derived from the package 50 are simultaneously removed when the tie bar is cut. I do.

In most cases, the accumulation of static charges in the leads of the NC pins is due to the external leads after resin molding. If there is no problem even if the internal leads remain, use such an embodiment. Can be.

That is, the internal lead 31 of the lead of the NC pin which is not connected to the semiconductor element 40 and is in a floating state remains but the external lead is removed, so that the accumulation of static charge is suppressed, and Since an array having a uniform pitch is formed together with the internal leads of other leads, uniform resin flow during molding can be expected.

By bending existing external leads, the external appearance becomes the same as that shown in FIG.

In the third embodiment, since the lead corresponding to the NC pin is cut at the time of cutting the tie bar, it is not necessary to specify the NC pin at the stage of designing the lead frame.
There is an advantage that the NC pin can be freely designed depending on the product while using the same lead frame, which is advantageous in terms of manufacturing cost.

FIG. 6 is a plan view showing a fourth embodiment of the present invention, which is a modification of the third embodiment shown in FIG. Note that the same or similar portions as those in FIG. 1 and FIG. 5 are denoted by the same reference numerals, and duplicate description will be omitted.

In the fourth embodiment, as shown in FIG. 6, since the tip of the internal lead 31 remaining in the package 50 and the island 35 on which the semiconductor element 40 is mounted are connected by the bonding wire 53, Even if a small amount of static electricity is generated in the remaining internal leads 31, the static electricity is immediately diverged and no accumulation of static electricity occurs. Since the external lead of the NC pin is removed and does not supply an external potential, in this embodiment, the back surface of the semiconductor element connected to the island is part of an internal circuit operating as a semiconductor integrated circuit. Not.

5 and 6, the NC pins 5 and
7 and 18, all of the NC pins 5, 7, and 18 in the third and fourth embodiments are different from the NC pins 5, 7, and 18, as in the second embodiment. Only the NC pins 5 and 7 adjacent to the pin 6 may be targeted.

Although the above embodiment has been described with reference to an example of a resin-molded package, the present invention can be similarly applied to a semiconductor device of another package such as ceramic sealing, glass sealing, or metal sealing. it can.

Although the embodiment has been described with respect to a DIP semiconductor device, the present invention is similarly applied to an insertion type such as SIP and ZIP other than DIP, or a surface mount type semiconductor device such as SOP, SOJ, QFP and PLCC. can do.

In the embodiment, the type in which the internal lead and the electrode terminal are connected by a bonding wire is exemplified. However, the type in which the internal lead is directly connected by using a bump electrode, and the type in which a lead-on-chip or a chip-on-chip is used. -The present invention can be similarly applied to a lead semiconductor device.

[0050]

As described above, according to the present invention, among the leads of the NC pins which are not required as a product function, the lead which causes a problem of electrostatic destruction due to the accumulated static electricity is removed, and the protection circuit for discharging the accumulated static electricity is removed. The mask layout area of the (discharge circuit) becomes unnecessary, and accordingly, high integration of the semiconductor element can be realized.

Further, since the above-mentioned accumulated static electricity is not generated at the removed lead portion at all, the inconvenience caused by this can be completely eliminated.

[Brief description of the drawings]

FIG. 1 is a plan view showing a state in which a semiconductor element is fixed to a lead frame and wire-bonded in a first embodiment of the present invention.

FIG. 2 is a perspective view showing a semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a part of an embodiment of the present invention.

FIG. 4 is a plan view showing a state where a semiconductor element is fixed to a lead frame and wire-bonded in a second embodiment of the present invention.

FIG. 5 is a plan view showing a state where a tie bar is cut after resin molding in a third embodiment of the present invention.

FIG. 6 is a plan view showing a state in which a tie bar is cut after resin molding in a fourth embodiment of the present invention.

FIG. 7 is a plan view showing a state in which a semiconductor element is fixed to a lead frame and wire-bonded in a conventional technique.

FIG. 8 is a perspective view showing a conventional semiconductor device.

FIG. 9 is a diagram showing a part of the prior art.

[Explanation of symbols]

1-4,6,8-17,19,20 Pins connected to internal circuit 5,7,18 NC pin 30 Lead 31 Internal lead 32 External lead 33 Tie bar 34 Outer frame 35 Island 40 Semiconductor element 41 Internal circuit 42 Electrode terminal 43, 53 Bonding wire 45 Peripheral part 46 Protective circuit for internal circuit 47 Protective circuit for discharging static electricity accumulated in lead of NC pin 50 Package

Claims (9)

[Claims] A semiconductor device having an internal circuit which operates as a semiconductor integrated circuit formed in the center and having electrode terminals arranged in the periphery, a package, and electrically connected to the electrode terminals and led out of the package. A lead of a non-connect pin which is not electrically connected to the internal circuit, is removed from the semiconductor device. 2. The semiconductor device according to claim 1, wherein all leads existing by removing all leads of said non-connect pin are electrically connected to said internal circuit. 3. The semiconductor device according to claim 1, wherein a lead of a non-connect pin adjacent to the input / output pin is selectively removed from a plurality of leads of the non-connect pin. 4. The semiconductor device according to claim 1, wherein the leads of the non-connect pins are entirely removed from internal leads inside the package to external leads derived from the package. 5. The semiconductor device according to claim 1, wherein only the external leads of the non-connect pins are removed from the internal leads inside the package and the external leads derived from the package. 6. The semiconductor device according to claim 5, wherein the remaining internal lead of the non-connect pin lead inside the package is connected to an island on which the semiconductor element is mounted by a bonding wire. 7. The semiconductor device according to claim 1, wherein the arrangement of the tips of the internal leads in the package is such that the pitch of the removed portion is an integral multiple of the pitch of the other portion. 8. The semiconductor device according to claim 1, wherein the arrangement of the external leads derived from the package is such that the pitch of the removed portion is an integral multiple of the pitch of the other portion. 9. A lead frame used for manufacturing the semiconductor device according to claim 1.