JP2000049089A - Method and device for treating resist - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the precision of the line width control of a resist pattern by detecting the reflectance of a base film and controlling at least one of the applying condition, exposing condition, and developing condition of a resist. SOLUTION: The data about the measured reflectance of each reflectance measuring equipment 34 of a resist applying and developing system are sent to a control section 35. The section 35 is connected to a storage section 36 storing the relations between reflectances and various conditions for obtaining resist patterns having desired line widths. The various conditions include the number of revolutions or acceleration of wafers when a resist applying device supplies a resist solution, the exposing time of an aligner 13 when the aligner 13 exposes the wafers, and the developing time of a developing device when the device develops the wafers. The control section 35 controls the number of revolutions or acceleration, exposing time, and developing time based on the various conditions corresponding to the measured reflectance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a resist processing method and a resist processing apparatus for forming a desired resist pattern on a surface of a substrate such as a CD substrate.

[0002]

2. Description of the Related Art For example, in a photolithography process in a semiconductor device manufacturing process, a resist coating process for forming a resist film on the surface of a semiconductor wafer (hereinafter, referred to as a "wafer") and an exposure of the wafer after the resist coating are performed. After the processing, a developing process of developing the wafer is performed.

Conventionally, the resist coating process and the developing process are carried out in a complex processing system in which various corresponding processing apparatuses are provided in one system, as is well known, for example, from Japanese Patent Publication No. 2-30194. It is performed according to a predetermined sequence with the process interposed.

In recent years, the demand for miniaturization of a resist pattern formed on a wafer surface has been increasing year by year, and strict control of the line width of the resist pattern has become essential.

[0005] Such management relating to the line width of the resist pattern is performed, for example, in such a manner that an operator determines the line width of the resist pattern on the wafer surface carried out of the resist coating and developing system.
SEM (Scanning Electron Mic)
(Roscope), and the determination is made based on whether or not the line width satisfies the range of the standard value.

[0006]

However, the above-described method has a problem in that an expensive SEM is required, and a great deal of labor and time are required for measuring a line width. Further, when measuring the line width using the SEM, the wafer must be once carried out and then carried into the vacuum sample chamber of the SEM, so that the wafer is contaminated.

Therefore, for example, the line width of the resist pattern is controlled more strictly by defining the conditions for forming the resist pattern (resist application conditions, exposure conditions, development conditions, etc.) more strictly, and the above-described measurement is not required. It is conceivable that However, according to the study of the present inventors, there is a problem that there is a limit in controlling the line width of the resist pattern even if the conditions for forming the resist pattern are strictly defined.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a resist processing method and a resist processing apparatus capable of controlling a line width of a resist pattern with high accuracy.

[0009]

According to the first aspect of the present invention,
In a resist processing method for forming a predetermined resist pattern on a substrate on which a base film is formed, (a) a step of detecting a reflectance of light of the base film; and (b) the substrate based on a first condition. Applying a resist thereon, (c)
Exposing the resist-coated substrate based on a second condition; (d) developing the exposed substrate based on a third condition; and (e) detecting the detected reflectance. And controlling at least one of the first condition, the second condition and the third condition based on the first condition, the second condition, and the third condition.

According to a second aspect of the present invention, in the resist processing method of the first aspect, a relationship between the reflectance and at least one of the first condition, the second condition, and the third condition is determined in advance. The method further includes the step (e), wherein the first condition and the second condition are based on the relationship.
And at least one of the third condition and the third condition is controlled.

According to a third aspect of the present invention, in the resist processing method of the first aspect, the step (b) includes a step of supplying a resist solution onto the substrate while rotating the substrate, wherein the first condition is satisfied. , The number of rotations or the acceleration when rotating the substrate.

According to a fourth aspect of the present invention, in the resist processing method of the first aspect, the second condition is an exposure time for exposing the substrate.

According to a fifth aspect of the present invention, in the resist processing method of the third aspect, the third condition is a developing time for developing the substrate.

According to a sixth aspect of the present invention, there is provided a resist processing method for forming a predetermined resist pattern by applying a resist to a substrate on which a predetermined base film is formed, exposing and developing the resist.
(G) forming a predetermined base film on the measurement substrate together with the substrate, (h) applying a resist to the measurement substrate, and (i) exposing the measurement substrate to light.
The method is characterized by comprising a step of obtaining exposure energy necessary and sufficient for the resist to be completely exposed, and a step (j) of performing a predetermined process based on the obtained exposure energy.

According to a seventh aspect of the present invention, in the resist processing method of the sixth aspect, the step (j) includes processing the substrate to be processed according to whether or not the value of the exposure energy is within a predetermined range. And a step of determining whether or not to execute.

According to an eighth aspect of the present invention, in the resist processing method of the sixth aspect, the step (j) comprises exposing the substrate by changing processing conditions in accordance with the value of the exposure energy.
The method includes a step of executing a developing step.

According to a ninth aspect of the present invention, in the resist processing method of the sixth aspect, the step (i) includes performing a plurality of exposures by changing an exposure amount for each predetermined exposure position on the measurement substrate,
Thereafter, the method includes a step of developing to obtain the exposure energy.

According to a tenth aspect of the present invention, in the resist processing method of the ninth aspect, the exposure amount is changed by changing an exposure time.

The invention of claim 11 is the resist processing method of claim 6, wherein the step (i) is performed after the development.
A step of measuring a film thickness of the resist by a film thickness measuring device and obtaining the exposure energy from an exposure energy at a position where the film thickness becomes zero.

According to a twelfth aspect of the present invention, there is provided the resist processing method according to the first aspect, wherein (m) a step of forming a predetermined base film on the measurement substrate together with the substrate; And (o) exposing the measurement substrate to obtain exposure energy necessary and sufficient for the resist to be completely exposed; and (p) based on the obtained exposure energy, And performing a predetermined process.

According to a thirteenth aspect of the present invention, there is provided a resist processing apparatus for forming a predetermined resist pattern on a substrate on which a base film is formed, wherein a means for detecting a light reflectance of the base film is provided. A means for applying a resist on the substrate, a means for exposing the substrate on which the resist is applied, based on a second condition,
Means for developing the exposed substrate; and control means for controlling at least one of the first condition, the second condition, and the third condition based on the detected reflectance. It is characterized by having.

According to a fourteenth aspect of the present invention, in the resist processing apparatus of the thirteenth aspect, a relationship between the reflectance and at least one of the first condition, the second condition, and the third condition is stored. A storage unit, wherein the control unit is configured to execute the first control based on the relationship stored in the storage unit.
, At least one of the second condition and the third condition is controlled.

According to a fifteenth aspect of the present invention, in the resist processing apparatus of the fourteenth aspect, the applying means supplies a resist liquid onto the substrate while rotating the substrate. The rotation speed or the acceleration when the substrate is rotated.

According to a sixteenth aspect of the present invention, in the resist processing apparatus of the fourteenth aspect, the second condition is an exposure time for exposing the substrate.

According to a seventeenth aspect of the present invention, in the resist processing apparatus of the fourteenth aspect, the third condition is a developing time for developing the substrate.

The invention according to claim 18 is the resist processing apparatus according to claim 14, wherein: a means for forming the predetermined base film on the measurement substrate together with the substrate; means for applying a resist to the measurement substrate; The apparatus further comprises means for exposing the measurement substrate to obtain exposure energy necessary and sufficient to completely expose the resist, and means for executing a predetermined process based on the obtained exposure energy. It is characterized by the following.

When the substrate coated with the resist is exposed, light is reflected by a base film formed below the resist,
The reflected light also contributes to photosensitivity. Therefore, when the reflectance of the base film is different, the exposure amount is different, and the line width of the resist pattern is different.

On the other hand, for example, on a semiconductor wafer as a substrate, SiO2 and Al having different light reflectivities are used as base films.
Are formed, and S is selected according to the circuit pattern to be formed.
The ratio between the area occupied by iO2 and the area occupied by Al is different, and the reflectivity of light of the underlying film is different according to the ratio. Therefore, if the resist pattern is formed under the same conditions, the line width of the resist pattern will differ depending on the light reflectance of the underlying film. Therefore, in the present invention, by first detecting the reflectance of light of the underlying film and controlling these conditions based on the detected reflectance, highly accurate line width control of the resist pattern is enabled. is there.

[0029]

Embodiments of the present invention will be described below in detail with reference to the drawings.

As shown in FIG. 1, this resist coating and developing system 1 is a system for coating and developing a chemically amplified resist on a semiconductor wafer, in which a cassette station 10, a processing station 11, and an interface section 12 are connected in a pair. It has a configuration.

In the cassette station 10, the wafer W
Are loaded into the resist coating and developing system 1 from outside (in units of cassettes C, for example, in units of 25 sheets), and are discharged from the resist coating and developing system 1 to the outside. Further, the wafer W is carried in / out of the cassette C.

In the processing station 11, various single-wafer processing apparatuses for performing predetermined processing on the wafers W one by one in the coating and developing processing steps are arranged at predetermined positions in multiple stages.

The interface unit 12 includes an exposure apparatus 1 provided adjacent to the resist coating and developing system 1.
3 and the wafer W is transferred.

In the cassette station 10, as shown in FIG.
(For example, four) cassettes C are placed in a line in the X direction (vertical direction in FIG. 1) with their respective wafer W entrances facing the processing station 11 side. This cassette C arrangement direction (X direction) and the wafer W arrangement direction of the wafers W accommodated in the cassette C (Z direction; vertical direction)
Is movable along the transfer path 21a, and selectively accesses each cassette C.

The wafer transfer device 21 is configured to be rotatable in the θ direction.
The alignment apparatus (ALIM) and the extension apparatus (EXT) belonging to the multi-stage apparatus section of the third processing apparatus group G3 on the first side can also be accessed.

In the processing station 11, as shown in FIG. 1, a vertical transfer type transfer device 22 is provided at the center, and various types of processing devices as processing chambers are provided around one or a plurality of sets. Thus, the processing apparatuses are arranged in a multi-stage arrangement. In this resist coating and developing system 1, five processing unit groups G1, G2, G3, G4, G5
Can be arranged, and the first and second processing device groups G
1 and G2 are disposed on the front side of the system, the third processing unit group G3 is disposed adjacent to the cassette station 10, the fourth processing unit group G4 is disposed adjacent to the interface unit 12, and furthermore, is indicated by broken lines. The illustrated fifth processing unit group G5 can be arranged on the back side. The transfer device 22 is configured to be rotatable in the θ direction and movable in the Z direction, and is capable of transferring the wafer W to and from each processing device.

In the first processing apparatus group G1, as shown in FIG. 2, two spinner-type processing apparatuses, for example, a resist liquid coating apparatus (FIG. 2) for performing a predetermined processing by placing a wafer W on a spin chuck in a cup CP. COT) and development processing equipment (DE
V) are stacked in two stages from the bottom. Similarly to the first processing unit group G1, in the second processing unit group G2, two spinner-type processing units, for example, a resist liquid coating unit (COT) and a development processing unit (DEV) are sequentially arranged from the bottom. It is piled up on the steps.

In the third processing apparatus group G3, as shown in FIG. 3, an oven-type processing apparatus for performing a predetermined processing by mounting the wafer W on a mounting table (not shown), for example, a cooling processing for performing a cooling processing Device (COL), a hydrophobizing device (A) for performing a so-called hydrophobizing process for improving the fixability of a resist.
D) Alignment device for alignment (ALI)
M), an extension device (EXT), and a heat treatment device (PRE) for performing pre-bake as a heat treatment before the exposure treatment.
BAKE) and a heat treatment device (PO
BAKE) are stacked in order from the bottom, for example, in eight layers.

Similarly, in the fourth processing apparatus group G4, an oven-type processing apparatus for performing a predetermined processing by placing the wafer W on the mounting table, for example, a cooling processing apparatus (CO) for performing a cooling process
L), an extension / cooling processing device (EXTCOL) that also serves as a cooling process, and an extension device (EX
T), a hydrophobic treatment device (AD), a heat treatment device (PREBAKE) for performing pre-bake, and a heat treatment device (POBAKE) for performing post-bake are stacked in, for example, eight stages from the bottom.

As shown in FIG. 1, the interface section 12 has the same dimensions in the depth direction (X direction) as the processing station 11, but has a smaller size in the width direction. As shown in FIGS. 1 and 2, a portable pickup cassette CR and a stationary buffer cassette BR are arranged in two stages on the front side of the interface unit 12, while a peripheral exposure device 24 is arranged on the rear side. Are arranged.

At the center of the interface section 12, a wafer transfer device 25 is provided. Wafer transfer device 2
Numeral 5 moves in the X direction and the Z direction (vertical direction) so that the cassettes CR and BR and the peripheral exposure device 24 can be accessed. The wafer transfer device 25 is configured to be rotatable also in the θ direction, and includes an extension device (EXT) belonging to the fourth processing device group G4 on the processing station 11 side, and further, an adjacent exposure device side. A wafer transfer table (not shown) can also be accessed.

As shown in FIG. 4, a filter 26 is provided above the cassette station 10 and a processing station 11 is provided.
The filter 27 is attached to the upper part of the interface unit 12, and the filter 28 is attached to the upper part of the interface unit 12.
These filters share a headspace 29. This upper space 29 communicates with a lower air conditioner (not shown) through a duct (not shown) to remove ammonia,
Clean air whose humidity and temperature are controlled is supplied to the upper space 29 from the air conditioner. Clean air is
The air is blown downward from the upper space 29 through the respective filters, whereby the downflow of the clean air is reduced to the respective parts 1.
0, 11, and 12 are formed.

As shown in FIG. 5, the alignment apparatus (ALIM) of the third processing apparatus group G3 is accessed by the wafer transfer apparatus 21 of the cassette station 10 on both sides of the alignment apparatus (ALIM). An opening 31 and an opening 32 for access by the transfer device 22 of the processing station 11 are provided. Almost in the center of this alignment device (ALIM), the wafer W
A wafer mounting table 33 for positioning is arranged. Above the wafer mounting table 33, a plurality of reflectivity measuring devices 34 for measuring the light reflectivity of the wafer W are arranged. Each reflectance measuring device 34 measures the reflectance of light in a region corresponding to one chip on the wafer W, for example. Each reflectance measuring device 34 irradiates this region with light, measures the amount of reflected light, and calculates the reflectance based on the ratio of the amount of irradiated light to the amount of reflected light. A plurality of such measuring devices may be arranged or a single measuring device may be arranged. Such a reflectance measuring device may be located anywhere on the wafer W transport path in the resist coating and developing system 1 or may be separately provided outside the resist coating and developing system 1.

FIG. 6 is a block diagram showing the configuration of a control system in the resist coating and developing system 1 configured as described above.

As shown in FIG. 6, each reflectance measuring device 34
Is transmitted to the control unit 35. The storage unit 36 is connected to the control unit 35. The storage unit 36 stores a library as shown in FIG. This library shows the relationship between light reflectance and various conditions for obtaining a resist pattern having a desired line width with respect to light reflectance. The various conditions are, for example, the rotation speed and / or the acceleration (acceleration at which the rotation speed is increased) when the resist liquid is supplied without rotating the wafer W in the resist liquid coating apparatus (COT) or both. . Another predetermined condition is, for example, an exposure time when the exposure apparatus 13 exposes the wafer W. Still another predetermined condition is a developing time when developing the wafer W in the developing device (DEV). The control unit 35 obtains various conditions according to the measured reflectance from the library shown in FIG. 7, and controls the rotation speed or the acceleration, the exposure time, and the development time according to the obtained conditions. The library shown in FIG.
Although an example is shown in which only the rotation speed of the resist liquid coating device (COT) is changed, the control target is the above rotation speed,
The acceleration, the exposure time, and the development time may be four, three or two of these,
It may be one, or a parameter related to the line width other than these conditions.

Next, processing steps in the resist coating and developing system 1 configured as described above will be described.

In the resist coating and developing system 1, an unprocessed wafer W (having a base film formed) housed in the cassette C is taken out by the wafer transfer device 21 of the cassette station 10 and then processed at the processing station 11. Of the third processing group G3 (ALI
M), and alignment is performed.

Thereafter, the alignment device (ALI)
In M), the reflectance of the light of the wafer W is measured by the reflectance measuring device 34.

Here, on the wafer W, there are a region where SiO 2 is formed as the base film 37 as shown in FIG. 8 and a region where Al is formed as shown in FIG. The ratio between the area occupied by SiO2 and the area occupied by Al differs according to the ratio, and the base film
7 have different reflectivities. The reflectance measuring device 34 measures the reflectance of such light, and data of the measured reflectance is sent to the control unit 35. Thereafter, the transfer device 22 is loaded from the opposite side, and the wafer W is placed in the alignment device (ALI).
M) is carried out from inside and transported.

Next, the wafer W is hydrophobized by the hydrophobizing apparatus (AD) of the third processing detail G3, and the cooling processing apparatus (COL) of the third processing group G3 or the fourth processing group G4. )
After the cooling, the photoresist film, that is, the photosensitive film is coated and formed by the resist liquid coating device (COT) in the first processing group G1 or the second processing group G2. At this time, the control unit 35 reads, from the library, conditions corresponding to the data of the reflectance measured by the reflectance measuring device 34, and rotates the resist W while rotating the wafer W in the resist coating device (COT) under these conditions. , The rotation speed or the acceleration or both of them are controlled.

After forming the photosensitive film, the pre-baking apparatus (PREBA) of the third processing group G3 or the fourth processing group G4
A heat treatment is performed in KE) to remove the remaining solvent from the photosensitive film on the wafer W by evaporation. Next, after being cooled by the extension cooling device (EXTCOL) of the fourth processing group G4, the wafer W is placed in the extension device (EXT) of the fourth processing group G4. Next, the wafer transfer device 2
5 is carried in from the opposite side, and the wafer W is carried out. Next, the wafer W is transferred into the exposure device 13 and exposed to the wafer. At this time, the control unit 35 controls the reflectance measuring device 34
The condition according to the data of the reflectance measured by the above is read out from the library, and the exposure time in the exposure device 13 is controlled under these conditions.

After the exposure, the wafer W is again transferred to the fourth processing group G4
Is carried into the extension device (EXT), and is transferred to the transfer device 22 via the extension device (EXT). Next, the wafer W
Is transported into the developing device (DEV) of the first processing group G1 or the second processing group G2, and after being developed by the developing solution, the developing solution is washed away by the rinsing solution to complete the developing process. At this time, the control unit 35 reads, from the library, conditions according to the reflectance data measured by the reflectance measuring device 34, and under these conditions, the developing device (DE)
The development time in V) is controlled.

Next, the wafer W is carried out of the developing device (DEV) by the transfer device 22. Thereafter, the wafer W is heated and buried by a post-baking apparatus (POBAKE) of the third processing group G3 or the fourth processing group G4, and is cooled by the cooling processing apparatus of the third processing group G3 or the fourth processing group G4. After being cooled by (COL), it is placed in the extension device (EXT) of the third processing group G3. And
The wafer transfer device 21 is loaded from the opposite side, the wafer W is unloaded, and the wafer W is loaded into the processed wafer storage cassette C mounted on the cassette station 10.

According to the present embodiment, prior to the formation of a resist pattern, the reflectance measuring device 34 detects the light reflectance of the underlying film of the wafer W, and based on the detected reflectance, a resist liquid coating device ( Since the number of rotations, the acceleration, the exposure time in the exposure device 13 and the development time in the developing device (DEV) are controlled when the resist solution is supplied while rotating the wafer W in COT), the height of the resist pattern is increased. Accurate line width control becomes possible.

Next, another embodiment of the present invention will be described.

Here, for example, in a process of manufacturing a semiconductor device from a wafer, a base film such as an oxide film and a nitride film is sequentially formed on a silicon wafer, and then a resist is applied on the base film. Then, exposure is performed by an exposure apparatus such as a stepper using a mask (reticle) on which a predetermined pattern is formed, and thereafter, development is performed to form a predetermined resist pattern on the base film.

In such a series of steps, in order to keep the resist pattern at a predetermined line width, the exposure amount (exposure energy) at the time of exposure needs to be controlled to an appropriate amount. That is, if the amount of exposure at the time of exposure is excessive or insufficient, the line width of the resist pattern becomes narrower or wider than a predetermined width.

However, the appropriate exposure dose is not only affected by the light directly hitting the resist, but also by the reflected light from the underlying film and the interference of these lights in the resist. The value slightly varies depending on the thickness and type of the base film, the wavelength of the exposure light, and the like.

Therefore, for example, even if the film thickness of the resist or the film thickness of the base film slightly changes, the appropriate exposure amount may greatly change, and the parameters of each of these film forming steps are kept as constant as possible. Even if it is kept, for example, it is impossible to make the film thickness of the base film completely the same in each batch and make the difference in film thickness completely zero, so that it is difficult to always keep an appropriate exposure dose constant. It is.

For this reason, if the processing is performed while the processing parameters in the exposure and development steps are always kept constant, there is a possibility that the resist line width may be out of a predetermined standard value range. The resist line width of the subsequent wafer is actually measured by SEM, and whether or not the result is within a predetermined standard value range is evaluated.

Incidentally, regarding the exposure amount of the resist,
The energy capable of exposing the resist to 100% is generally expressed as E0. That is, this E0
Indicates the lowest energy capable of exposing the resist to 100%. In the actual exposure step, the resist is irradiated with a little more energy than E0 so that the exposure is not insufficient. Have been.

FIG. 10 schematically shows the relationship between E0 and the resist film thickness, where E0 is the ordinate and the resist film thickness is the abscissa. Is changed at a period of λ / 4n, where n is the refractive index of n.

If the exposure amount is constant and the subsequent development process is performed under the same conditions, there is a certain correlation between the value of E0 and the line width of the resist. Thus, a resist line width formed after development can be predicted.

That is, E0 for each wafer is substantially determined by the base film forming step and the resist coating step after a certain step. Therefore, in the subsequent exposure and development steps, if processing is carried out under certain conditions, the line width after development will substantially depend on this value of E0.
It is possible to evaluate a resist line width formed after development. In other words, when processing is performed with a constant exposure amount, if the value of E0 is within a predetermined range slightly smaller than the exposure amount, the resist line to be formed can be formed substantially without excess or deficiency of the exposure amount. The width can be within a range of a predetermined standard value.

Therefore, in this embodiment, as shown in the flow chart of FIG. 11, the measurement wafer (measurement substrate) starts from the step of forming the underlayer which affects at least E0.
Are introduced, for example, one by one for each batch (101), and a film is formed and a resist is applied to a measurement wafer in the same manner as a normal wafer by a step of forming various base films and a step of applying a resist (102).

In the process of manufacturing a semiconductor device, a single wafer is subjected to a plurality of exposure and development steps. The timing for introducing a measurement wafer is as follows. A wafer may be introduced, and one or more measurement wafers may be used for each exposure and development process, or the E0 may be affected for each exposure and development process. A wafer for measurement may be introduced from the step of forming a base film to be given.

Then, when reaching the wafer exposure step (10)
3) E0 of the wafer for measurement is measured prior to the normal wafer exposure and development steps (104).

Then, it is determined whether or not the value of E0 falls within a predetermined range (105). If the value falls within the predetermined range, another normal wafer in the batch is determined. In the subsequent exposure and development steps, it is determined that a predetermined resist line width within an allowable fixed error range is obtained, and a normal wafer exposure and development step is performed (106).

On the other hand, when the value of E0 is out of the predetermined range, if the exposure and development steps are carried out under the same conditions, there is a high possibility that a predetermined resist line width cannot be obtained.
The normal wafer exposure and development steps are temporarily suspended (107).

As a countermeasure in this case, a predetermined resist line width can be obtained by appropriately changing the processing parameters, for example, by adjusting the exposure amount according to the value of E0, or by adjusting the developing time and temperature. Can be obtained.

The adjustment of these parameters may be performed manually by an operator, or, in another embodiment, programmed so as to adjust the exposure amount, the development time and the temperature according to the value of E0. It can also be performed using a computer or the like. For example, when controlling the exposure amount of the exposure apparatus, the exposure amount of the exposure apparatus is programmed by a computer which is programmed in advance to increase the exposure amount when the value of E0 is large and to decrease the exposure amount when the value of E0 is small. Control the amount.

FIG. 12 is a flowchart showing a process for automatically changing the processing parameters.
If the value of E0 is out of the predetermined range (105), the processing parameters are automatically changed according to the value of E0 (207), and then the normal wafer exposure and development steps are performed. (106).

Next, an example of a method of measuring the value of E0 will be described more specifically.

That is, in this method, first, the exposure amount is gradually increased by, for example, an exposure apparatus, and exposure is performed at a different exposure amount for each region on the measurement wafer, and thereafter, development is performed. It is checked whether or not the resist has been completely removed in order from a region with a small amount of light to a region with a large amount of exposure, and the exposure amount of the first appearing region where the resist has been completely removed is defined as E0 and E0. I do. That is, E0
The resist in the region exposed at the above exposure amount is completely removed, and the resist in the region exposed at the exposure amount less than E0 is completely removed. Therefore, the exposure amount in the boundary area where the resist is completely removed is E0.

The determination as to whether or not the resist has been completely removed can be made by observing an enlarged image using a microscope or a television camera, for example, by an operator. It is also possible to measure the resist film thickness for each region by using a thickness measuring device and determine whether or not the value of the film thickness has become zero.

As described above, according to the present embodiment, the SEM
It is possible to evaluate the resist line width formed in the resist processing step without actually measuring the resist line width by using the SEM, and to evaluate the resist line width compared to the case where the resist line width is actually measured by using the SEM. Can be easily performed in a short time, and contamination of the wafer can be prevented.

FIGS. 13 to 15 show the overall structure of the resist coating and developing system 101 in this embodiment. FIG. 13 shows a plan view, FIG. 14 shows a front view, and FIG.

As shown in these figures, the coating and developing system 101 carries in / out a wafer cassette CR accommodating a plurality of wafers W with respect to the outside, or takes in / out a wafer W from / to the wafer cassette CR. A cassette station 110 for performing the processing, a processing station 111 configured by arranging various types of single-wafer processing apparatuses for performing predetermined processing on the wafers W one by one in vertical and horizontal directions, and an external exposure (not shown). The interface unit 112 that transfers the wafer W to and from the apparatus is integrally combined.

In the cassette station 110, FIG.
As shown in FIG. 3, a plurality of wafer cassettes CR, for example, up to four wafer cassettes are connected to the processing station 1 at each cassette positioning portion 120a on the cassette mounting table 120.
The wafer transfer device is placed in a line in the X direction toward the 11 side, and is provided movably with respect to these wafer cassettes CR in the X direction and the Z direction (the direction of arranging wafers in the wafer cassette CR: vertical direction). Reference numeral 121 denotes an operation for taking the wafer W in and out. Further, the wafer transfer device 121 is configured to be rotatable in the θ direction, and can transfer the wafer W to the wafer transfer device 122 on the processing station 111 side. The wafer transfer device 122 in the processing station 111 is configured to be movable in the Y direction between the cassette station 110 and the interface unit 112, can move up and down in the Z direction (vertical direction), and can rotate in the θ direction. It is configured as follows.

Each processing apparatus in the processing station 111 is divided into two parts with the transfer path of the wafer transfer apparatus 122 interposed therebetween. Here, a set of processing apparatuses for one row in the upper and lower rows is referred to as one processing apparatus group.
Each of the processing units is, for example, eight processing unit groups G1, G2,
G3, G4, G5, G6, G7, G8, and the second, fourth, sixth and eighth processing unit groups G2, G4
, G6, G8 are arranged, for example, on the front side of the system as shown in FIG. 14, and the first, third, fifth and seventh processing unit groups G1, G3, G5, G7 are shown in FIG. For example, it is arranged on the back side of the system.

As shown in FIG. 14, the second, fourth, sixth and eighth processing unit groups G2, G4, G6, G8 are respectively composed of a resist liquid coating unit (COT) and A development processing device (DEV) is included.

As shown in FIG. 15, a first processing unit group G1 includes a resist film thickness measuring device (RTM) for measuring the film thickness of the resist on the wafer W, and an alignment device for positioning the wafer W. (ALIM), a pre-baking device (P) for performing a heating process on the wafer W before the exposure process.
REBAKE) and a post-baking device (POBAKE) for performing a heating process on the wafer W after the exposure process,
They are arranged in order from the bottom.

Further, the third processing apparatus G 3
Processing device (COL) for performing a cooling process, a hydrophobic processing device (AD) for performing a hydrophobic process for improving the fixability of a resist solution applied to the surface of the wafer W, and a wafer W before the exposure process. Pre-baking device (P
REBAKE) and a post-baking device (POBAKE) for performing a heating process on the wafer W after the exposure process,
They are provided in order from the bottom.

The fifth and seventh processing units G5 and G7 are a cooling processing unit (COL) for performing a cooling process on the wafer W, an extension cooling unit (EXTCOL), and a heating process for the wafer W before the exposure process. Prebaking device (PREBAKE) for performing the heating process and postbaking device (POBAKE) for performing the heating process on the wafer W after the exposure process
KE) are arranged in order from the bottom.

As described above, the cooling processing unit (COL) and the extension cooling unit (EX) having a low processing temperature are used.
TCOL) is arranged at the lower stage, and a pre-baking device (PREBAKE), a post-baking device (POBAKE) and a hydrophobizing device (AD) having a high processing temperature are arranged at the upper stage to reduce thermal interference between the devices. Can be reduced.

The interface section 112 is provided with a portable pickup cassette CR, a stationary buffer cassette BR, a peripheral exposure device 123, and a wafer transfer device 124. The wafer transfer device 124 has a
Then, the wafer W is transferred to the cassettes CR and BR and the peripheral exposure device 123. Further, the wafer transfer device 124 is also rotatable in the θ direction, and the wafer transfer device 122 on the processing station 111 side can be rotated.
And a wafer transfer table (not shown) on the external exposure apparatus side
The transfer of the wafer W is performed between them.

The developing apparatus (DEV) surrounds the spin chuck, which is configured to rotate while holding the wafer W horizontally by vacuum suction in a processing container, and surrounds the outer and lower sides of the spin chuck. It comprises a cup having a drain port and an exhaust port at the bottom, a developer supply nozzle for discharging the developer to the surface of the wafer W held on the spin chuck, and the like.

Further, the resist liquid coating device (COT)
A spin chuck configured to rotate while holding the wafer W horizontally by vacuum suction in a processing container, and a drain port and an exhaust port are provided at the bottom while surrounding the outer and lower sides of the spin chuck. It comprises a cup, a resist liquid supply nozzle for discharging the resist liquid onto the surface of the wafer W held on the spin chuck, and the like.

Next, the flow of processing of the wafer W by the coating and developing system will be described.

First, in the cassette station 110, the wafer transfer device 121 accesses the cassette CR containing the unprocessed wafers W on the cassette mounting table 120, and takes out one wafer W from the cassette CR. Thereafter, the wafer transfer device 121 transfers the wafer W to the wafer transfer device 122 on the processing station 111 side. The wafer transfer device 122 moves to the alignment device (ALIM) of the first processing device group G1, and transfers the wafer W into the alignment device (ALIM).

At this time, for example, when processing is performed on the first wafer of a certain batch, and when the aforementioned E0 is measured, a measurement wafer is first selected.

When alignment and centering of the wafer W is completed by the alignment device (ALIM), the wafer transfer device 122 receives the aligned wafer W, and the hydrophobic processing device (AD) of the third processing device group G3. ), The wafer W is carried in to perform the hydrophobic treatment.

The wafer W that has been subjected to the hydrophobizing treatment is thereafter carried into a predetermined pre-baking device (PREBAKE) by the wafer transfer device 122 and baked.
It is carried into a predetermined cooling processing unit (COL). The wafer W is cooled to a set temperature before the resist coating processing, for example, 23 ° C. in the cooling processing apparatus (COL). When the cooling process is completed, the wafer W is carried into the predetermined resist liquid coating device (COT) by the wafer transfer device 122, and the resist is coated on the surface of the wafer W in the resist liquid coating device (COT).

When the resist coating process is completed, the wafer transfer device 122 transfers the wafer W to the resist liquid coating device (CO
T) and taken out again from the predetermined pre-baking device (P
REBAKE). Here, the wafer W is heated at a predetermined temperature, for example, 100 ° C. for a predetermined time, whereby the residual solvent is evaporated and removed from the coating film on the wafer W.

Thereafter, the wafer W is transferred to the wafer transfer device 122
Extension cooling system (EXTC
OL). Here, the wafer W is cooled to a temperature suitable for the next step, that is, peripheral exposure processing by the peripheral exposure apparatus 123, for example, 24 ° C. Thereafter, the wafer transfer device 122 transfers the wafer W to the wafer transfer device 124 of the interface unit 112. The wafer transfer device 124 carries the wafer W into the peripheral exposure device 123 in the interface unit 112. Here, the wafer W is subjected to an exposure process on its peripheral portion.

When the peripheral exposure processing is completed, the wafer transfer device 124 unloads the wafer W from the peripheral exposure device 123, and the wafer receiving table (not shown) on the adjacent exposure device side.
Move to. In this case, the wafer W may be temporarily stored in the buffer cassette BR as necessary before being transferred to the exposure apparatus.

Thereafter, exposure using a reticle is performed by an exposure apparatus. At this time, if the wafer transferred to the exposure apparatus is the above-described wafer for measurement, exposure for E0 measurement in which the exposure amount is changed for each exposure area is performed instead of the constant exposure amount using the reticle. Will be That is, for example, a predetermined width is provided above and below the predicted E0 value, and the exposure amount is gradually increased from the exposure amount at which the exposure energy lower than the predicted E0 value is exposed. Are exposed with different exposure amounts. When the exposure processing on the entire surface of the wafer W in the exposure apparatus is completed and the wafer W is returned to the wafer receiving table on the exposure apparatus side, the wafer transfer device 124 of the interface unit 112 accesses the wafer receiving table to perform the exposure processing. The wafer transfer device 122 on the processing station 111 side receives the subsequent wafer W.
Passed to. In this case, the wafer W may be temporarily stored in the buffer cassette BR in the interface unit 112 as necessary before being transferred to the processing station 111 side.

The wafer transfer device 122 carries the received wafer W into a predetermined post-baking device (POBAKE). This post baking device (POBAKE)
In, the wafer W is placed on a hot plate and baked for a predetermined time.

Thereafter, the baked wafer W is transferred to any one of the cooling processing units (C
OL), and the wafer W is returned to room temperature in the cooling processing apparatus (COL). Subsequently, the wafer W is carried into a predetermined development processing device (DEV) by the wafer transfer device 122.

In this developing apparatus (DEV), the wafer W is placed on a spin chuck, and a developing solution is uniformly applied to a resist on the surface of the wafer W by, for example, a spray method to perform development. After the development, a rinsing liquid is applied to the surface of the wafer W, and the developing liquid is washed off.
Thereafter, the wafer W is rotated at a high speed to perform drying.

Thereafter, the wafer transfer device 122 unloads the wafer W from the developing device (DEV), and then transfers the wafer W again to a predetermined post-baking device (POBAKE). This post-baking device (POBAK)
In E), the wafer W is heated at, for example, 100 ° C. for a predetermined time, whereby the resist swollen by development is hardened, and the chemical resistance is improved.

When the post-baking is completed, the wafer transfer device 122 transfers the wafer W to the post-baking device (PO).
BAKE), and then a predetermined cooling processing unit (CO
The wafer W is loaded into L) to perform a cooling process.

Here, after the wafer W has returned to normal temperature, if the received wafer W is a normal wafer, the wafer transfer device 122 transfers the wafer W to the wafer transfer device 121 on the cassette station 110 side, and the wafer transfer device 122 12
1 places the received wafer W into a predetermined wafer accommodating groove of the cassette CR for accommodating the processed wafer on the cassette mounting table 120. On the other hand, if the received wafer W is a measurement wafer, the wafer transfer device 122 carries the received measurement wafer into a resist film thickness measurement device (RTM).

Then, a resist film thickness measuring device (RTM)
Then, for each exposure region of the measurement wafer described above, the resist film thickness is sequentially measured from a region having a small exposure amount to a region having a large exposure amount, and an exposure region where the resist film thickness becomes zero for the first time is found.

Exposure amount (exposure energy) of the above-described exposure apparatus in the exposure region where the resist film thickness becomes zero for the first time.
Is recognized as E0, and if the value of E0 is within a predetermined range, normal wafer processing is thereafter performed. On the other hand, if the value of E0 is out of the predetermined range, the normal wafer processing is temporarily stopped thereafter. Then, after the processing parameters are changed by an operator, normal wafer processing is executed.

At this time, it is programmed in advance to appropriately change, for example, the exposure time of the exposure device, the development time of the developing device, etc. according to the value of E0, and the processing parameters are automatically changed. Ordinary wafer processing may be performed continuously.

As described above, according to the present embodiment, S
The resist line width can be evaluated without measuring the resist line width using EM. Further, by configuring the processing parameters to be automatically changed according to the value of E0, highly accurate control of the resist line width can be automatically performed without the intervention of an operator. Further, if such conditions are applied to the embodiment described first, more accurate control of the resist line width can be performed.

The present invention is not limited to the above-described embodiment, and various modifications are possible within the scope of the technical idea.

For example, in the above-described example, the case where the determination as to whether or not the resist has been completely removed is performed by measuring the film thickness has been described. Whether the resist has been completely removed or not may be determined by observation by a member.

Further, for example, the substrate is not limited to the wafer W, but may be an LCD substrate, a glass substrate, a CD substrate, a photomask, a printed substrate, a ceramic substrate, or the like.

The embodiments described above are intended to clarify the technical contents of the present invention, and the present invention is not limited to such specific examples and is not interpreted in a narrow sense. The present invention can be implemented with various modifications within the scope described in the claims.

[0112]

As described above, according to the resist processing method and resist processing apparatus of the present invention, highly accurate line width control of a resist pattern can be performed.

[Brief description of the drawings]

FIG. 1 is a plan view showing a resist coating and developing system according to an embodiment of the present invention.

FIG. 2 is a front view of the resist coating and developing system shown in FIG.

FIG. 3 is a rear view of the resist coating and developing system shown in FIG. 1;

FIG. 4 is a front view showing a flow of air in the resist coating and developing system shown in FIG. 1;

FIG. 5 is a front view showing a schematic configuration of the alignment apparatus shown in FIG. 3;

FIG. 6 is a block diagram showing a configuration of a control system of the resist coating and developing system shown in FIG.

FIG. 7 is a view showing the contents of a library included in the storage unit shown in FIG. 6;

FIG. 8 is a diagram for explaining a difference in light reflectance of a base film.

FIG. 9 is a diagram for explaining a difference in light reflectance of a base film.

FIG. 10 is a graph showing a relationship between a resist film thickness and E0.

FIG. 11 is a flowchart according to another embodiment of the present invention.

FIG. 12 is a flowchart according to still another embodiment of the present invention.

FIG. 13 is a plan view showing the overall configuration of a resist coating and developing system according to another embodiment.

14 is a front view of the resist coating and developing system shown in FIG.

FIG. 15 is a rear view of the resist coating and developing processing system shown in FIG. 13;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Resist coating / developing system 10 ... Cassette station 11 ... Processing station 12 ... Interface unit 13 ... Exposure device 21 ... Wafer transfer device 22 ... Transfer device 25 ... Wafer transfer device 34 ... Reflectance measurement Apparatus 35 Control section 36 Storage section W Wafer COT Resist coating apparatus DEV Developing apparatus ALIM Alignment apparatus

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/30 569Z

Claims (18)

[Claims] 1. A resist processing method for forming a predetermined resist pattern on a substrate on which a base film has been formed, comprising: (a) detecting a light reflectance of the base film; and (b) first condition. Applying a resist on the substrate based on the following conditions: (c) exposing the substrate coated with the resist based on a second condition; and (d) exposing the exposed substrate based on a third condition. (E) controlling at least one of the first condition, the second condition, and the third condition based on the detected reflectance. A resist processing method. 2. The resist processing method according to claim 1, further comprising a step of preliminarily determining a relationship between said reflectance and at least one of said first condition, said second condition and said third condition. The step (e) is performed based on the first condition based on the relationship;
A resist processing method comprising controlling at least one of the second condition and the third condition. 3. The resist processing method according to claim 1, wherein the step (b) includes a step of supplying a resist solution onto the substrate while rotating the substrate, wherein the first condition includes rotating the substrate. A resist processing method characterized in that the number of rotations or the acceleration at the time of performing is performed. 4. The resist processing method according to claim 1, wherein the second condition is an exposure time for exposing the substrate. 5. The resist processing method according to claim 3, wherein the third condition is a development time when the substrate is developed. 6. A resist processing method for applying a resist to a substrate on which a predetermined base film is formed, exposing and developing to form a predetermined resist pattern, comprising: (g) forming a predetermined resist pattern on the measurement substrate together with the substrate; (H) applying a resist to the measurement substrate; and (i) exposing the measurement substrate so that the resist is completely exposed to light. A resist processing method comprising: obtaining an energy; and (j) executing a predetermined process based on the obtained exposure energy. 7. The resist processing method according to claim 6, wherein in the step (j), the processing of the substrate to be processed is performed depending on whether or not the value of the exposure energy is within a predetermined range. A resist processing method, comprising the step of: 8. The resist processing method according to claim 6, wherein the step (j) is performed according to a value of the exposure energy.
A resist processing method including a step of performing exposure and development steps of the substrate by changing processing conditions. 9. The resist processing method according to claim 6, wherein in the step (i), a plurality of exposures are performed by changing an exposure amount for each predetermined exposure position of the measurement substrate, and thereafter, development is performed.
A resist processing method comprising a step of obtaining the exposure energy. 10. The resist processing method according to claim 9, wherein the exposure amount is changed by changing an exposure time. 11. The resist processing method according to claim 6, wherein, in the step (i), after the development, a film thickness of the resist is measured by a film thickness measuring device, and the exposure energy at a position where the film thickness becomes zero is obtained. A resist processing method comprising a step of obtaining the exposure energy. 12. The resist processing method according to claim 1, wherein: (m) a step of forming a predetermined base film on the measurement substrate together with the substrate; and (n) applying a resist to the measurement substrate. (O) exposing the measurement substrate to obtain exposure energy necessary and sufficient to completely expose the resist; and (p) executing a predetermined process based on the obtained exposure energy. A resist processing method, further comprising the step of: 13. A resist processing apparatus for forming a predetermined resist pattern on a substrate on which a base film has been formed, wherein: a means for detecting a reflectance of light of the base film; Means for applying a resist on the substrate; means for exposing the substrate on which the resist is applied based on a second condition; means for developing the exposed substrate based on a third condition; A resist processing apparatus comprising: a control unit that controls at least one of the first condition, the second condition, and the third condition based on reflectance. 14. The resist processing apparatus according to claim 13, further comprising storage means for storing a relationship between the reflectance and at least one of the first condition, the second condition, and the third condition. Resist processing wherein the control means controls at least one of the first condition, the second condition, and the third condition based on the relationship stored in the storage means. apparatus. 15. The resist processing apparatus according to claim 14, wherein the applying unit supplies the resist liquid onto the substrate while rotating the substrate, and the first condition is to rotate the substrate. A resist processing apparatus characterized by a rotation speed or an acceleration at the time. 16. The resist processing apparatus according to claim 14, wherein the second condition is an exposure time for exposing the substrate. 17. The resist processing apparatus according to claim 14, wherein the third condition is a development time for developing the substrate. 18. The resist processing apparatus according to claim 14, wherein, together with the substrate, means for forming a predetermined base film on the measurement substrate; means for applying a resist to the measurement substrate; It is characterized by further comprising: means for performing exposure and calculating an exposure energy necessary and sufficient for the resist to be completely exposed, and means for executing a predetermined process based on the determined exposure energy. Resist processing equipment.