JP2000046898A - Conduction tester for electronic part - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a conduction tester for electronic part excellent in general purpose performance of socket board for an IC to be tested. SOLUTION: The conduction tester for electronic part comprises a socket board 51 having a plurality of terminals being connected electrically with all terminals of an IC to be tested, a matrix scanner 521 being connected electrically with all terminals of the socket board 51, a power supply 522 for supplying current to the matrix scanner, a voltage detector 524 for detecting the voltage between both poles of the matrix scanner, and a CPU 523 performing the switching control of measuring channels of the matrix scanner.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a continuity test device for an electronic component for performing a continuity test on a power supply terminal or a ground terminal of various electronic components (hereinafter, also simply referred to as an IC) such as a semiconductor integrated circuit device. More particularly, the present invention relates to a continuity test device for electronic components in which the versatility of a socket board for setting electronic components is enhanced.

[0002]

2. Description of the Related Art In an IC testing apparatus called a handler, a large number of ICs under test stored in a tray are transported into a handler, and each IC under test is brought into electrical contact with a test head, and an IC is tested. The tester performs various function tests on the logic circuit and the memory circuit. When the test is completed, each IC under test is paid out from the test head.
By reloading the tray according to the test result, sorting into categories such as non-defective products and defective products is performed.

An IC having many terminal pins includes a plurality of power pins and ground pins.
In the internal circuit of C, these power pins and ground pins must be electrically connected. Therefore, in addition to the above-described function test of the logic circuit and the memory circuit, a continuity test for checking the continuity of each of the power supply pin and the ground pin may be performed.

In a conventional continuity test, a relay is connected to each of a power supply pin and a ground pin on a performance board of a test head of an IC test apparatus.
There is known a method in which the switching is performed sequentially.

[0005]

However, in the conventional continuity test method described above, the continuity test is performed by sharing the performance board for performing the function test of the logic circuit and the memory circuit, so that the original function test is adversely affected. There was a possibility of giving. For this reason, an attempt was made to conduct a continuity test by providing a continuity test device different from the IC test device. However, even if the ICs under test have the same shape but different types, the arrangement of the power supply pins and the ground pins is different. Therefore, the socket board on which the IC under test is set must be a dedicated product.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to provide a continuity test apparatus for an electronic component having excellent versatility of a socket board for an IC under test. .

[0007]

(1) In order to achieve the above object, a continuity test apparatus for an electronic component according to the present invention provides an electronic device for testing a continuity state of a power supply terminal and / or a ground terminal of an IC under test. In a continuity test apparatus for components, a socket board having a plurality of terminals electrically connected to at least all terminals of an IC under test, and a matrix scanner electrically connected to all terminals of the socket board, A power supply for supplying a current to the matrix scanner, a voltage detector for detecting a voltage between both electrodes of the matrix scanner, and control means for switching and controlling a measurement channel of the matrix scanner are provided.

When conducting a continuity test of a power supply terminal or a ground terminal of an IC under test using the electronic component continuity test apparatus of the present invention, each terminal of the IC under test is connected to each terminal of a socket board. The measurement channel of the matrix scanner is set according to the terminal arrangement of the IC under test (the arrangement of the power supply terminal or the ground terminal). Then, a current is supplied from a power supply to the matrix scanner, and at this time, a voltage between both electrodes of the matrix scanner is measured by a voltage detector. At this time, one of the power supply terminal and the ground terminal set as a channel by the matrix scanner is
When a disconnection occurs in the internal circuit, no current flows between the two poles of the matrix scanner, and this can be determined by the voltage detector.

In the continuity testing apparatus for electronic parts of the present invention, the socket board is provided with a plurality of terminals connected to all the terminals of the IC under test. Even if the arrangement of the ground terminals is different, the continuity test can be performed only by changing the measurement channel of the matrix scanner by the control means by software.

(2) The continuity test apparatus for an electronic component according to the present invention can be incorporated in an IC test apparatus for performing a function test of a logic circuit or a memory circuit, or can be separately provided. Although not particularly limited, preferably, when the IC under test is conveyed to a test process, and after being tested, the IC under test is incorporated into an IC test apparatus for classifying the IC under test or according to a test result, or is separately provided. The electronic component continuity test device is provided before the test process of the IC test device.

When the continuity test is performed in the process before the function test of the IC under test, it is not necessary to perform the function test which takes a relatively long time for the disconnected IC under test, thereby preventing the wasting of the test time. Further, when a continuity test is performed on an IC determined to be non-defective in the function test, a stress may be applied to the IC due to a check current during the continuity test. Therefore, it is preferable to perform the function test in a later step.

An IC test apparatus according to the present invention includes a chamber type IC test apparatus, a heat plate type IC test apparatus, an IC test apparatus of a type in which a test is executed with an IC under test mounted on a test tray, and an IC under test. Of the type to execute the test by directly holding the IC with the IC suction device
The present invention can be applied to all kinds of IC test devices such as test devices.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing an embodiment of an IC test apparatus to which the continuity test apparatus of the present invention is applied, and FIG.
FIG. 3 is a block diagram showing an embodiment of a continuity test apparatus according to the present invention.

The IC test apparatus 1 comprises a handler 10, a test head 20, a tester 30, and a continuity test apparatus 50. The test head 20 and the tester 30 are
0.

The supply tray 102 of the handler 10
The IC under test before the test mounted on the XY transfer device 10
4 and 105, first, the wafer is conveyed to the continuity test device 50, where the continuity test of the power supply pin and the ground pin is performed. After the test is performed on the IC under test via the test head 20 and the cable 40, the IC under test is stored in the classification tray 103 according to the test result.

The handler 10 is provided with a substrate 109, on which the XY transfer devices 104 and 105 for the IC under test are provided. Also, the substrate 109
2, an IC under test is pressed through the opening 110 against the contact portion 201 of the test head 20 disposed on the back side of the handler 10 as shown in FIG.

On the substrate 109 of the handler 10, two sets of XY transfer devices 104 and 105 are provided. Among them, the XY transfer device 104 includes rails 104a and 104 provided along the X-axis direction and the Y-axis direction, respectively.
b, the IC mounted on the mounting base 104c
From the sorting tray 103, the suction device 104d moves the supply tray 102, the empty tray 101, the heat plate 106, the continuity test device 50, and the two buffer units 108, 108.
The pad 1041 of the IC suction device 104d can also be moved in the Z-axis direction, that is, up and down by a Z-axis actuator (not shown). And the mounting base 10
The two IC suction devices 104d provided in 4c can suck, transport, and release two ICs at a time.

On the other hand, the XY transport device 105
The IC suction device 105d mounted on the mounting base 105c moves in the area between the two buffer units 108, 108 and the test head 20 by rails 105a, 105b provided along the axial direction and the Y-axis direction, respectively. The IC suction device 1
The pad 1051 of 05d is also movable in the Z-axis direction (that is, in the vertical direction) by an air cylinder (Z-axis actuator) not shown. Then, the two ICs to be tested can be suctioned, transported, and released at a time by the two IC suction devices 105d provided on the mounting base 105c.

The two buffer units 108, 108
Reciprocates between the operation areas of the two XY transfer devices 104 and 105 by the rail 108a and an actuator (not shown). In FIG. 1, the upper buffer unit 1
08 performs the operation of transferring the IC under test conveyed from the heat plate 106 to the test head 20, while the lower buffer unit 108 performs the operation of paying out the IC under test completed by the test head 20. I do. Due to the presence of these two buffer units 108, 108, the two XY transport devices 104, 105 can operate simultaneously without interfering with each other.

In the operation area of the XY transfer device 104, a supply tray 1 on which an IC to be tested to be tested is mounted.
02, four classifying trays 103 in which the tested ICs are classified and stored in categories according to the test results, and empty trays 101 are arranged.
8, a heat plate 106 and a continuity test device 50 are provided.

The heat plate 106 is, for example, a metal plate, and has a plurality of recesses 106a for dropping the IC under test. In the recesses 106a, the heat is transferred from the supply tray 102 to the continuity test device 50, and the continuity is measured. The IC under test (the IC before the test for the function test by the test head 20) after the test is transferred by the XY transfer device 104. The heat plate 106 is a heating source for applying a predetermined thermal stress to the IC under test, and after the IC under test is heated to a predetermined temperature by the heat plate 106, 20 is pressed against the contact portion.

Although not shown, on the upper surface (contact portion 201) of the test head 20, a large number of pogo pins (pogo pins) electrically connected via a cable or the like are supported by a spring so as to be freely retractable in the axial direction. Having a movable pin,
A contact pin in which the movable pin is urged in a direction in which the spring protrudes is provided upward, and the performance board and the IC socket are electrically connected so that the terminal contacts the pogo pin. It is installed. Thus, the contact pins of the IC socket are electrically connected to the test head 20 via the performance board, the pogo pins, and the like.

Before the function test of the logic circuit or the memory circuit by the test head 20 described above, a continuity test is performed by the continuity test device 50 according to the present invention. In the present embodiment, the continuity test device 50 is arranged next to the heat plate 106 as shown in FIG. 1, but this is merely an example, and the continuity test device 50 may be separately provided outside the substrate 109 as an option. it can. However, this is advantageous because the XY transfer device 104 that sucks and transfers the IC under test can be shared by incorporating the IC under test inside.

As shown in FIG. 3, a continuity test apparatus 50 of this embodiment includes a socket board 51 having a plurality of terminals electrically connected to all terminals of an IC under test, and And a measuring unit 52 for checking the disconnection of the power supply pin and the ground pin.

The IC under test (DUT: Devi) shown in FIG.
ce under test) is No. out of 22 terminals (indicated by reference numerals 1 to 22). Nos. 7, 10, 15, and 21 are power supply pins. 2, 5, 9, 13, 16 and 19 are ground pins, and the remaining Nos. 1,3,4,6,8,1
1, 12, 14, 17, 18, 20, and 22 are signal pins. The socket board 51 has terminals connected to all 22 terminals 1 to 22 of the IC under test. Each terminal of the socket board 51 is connected to a terminal of the matrix scanner 521 of the measuring section 52. Have been.

The matrix scanner 521 includes two switches swn and sw in a matrix for one terminal.
and is connected between the poles so that a constant current is supplied from a power supply 522. Each switch swn1 to swn
22 and opening and closing of swp1 to swp22 and power supply 52
2 is controlled by the μCPU 523.

A voltage detector 524 comprising a comparator and an A / D converter is connected between the two poles of the matrix scanner 521, and detects a voltage applied between the two poles when a current is supplied from the power supply 522. And outputs the result to the μCPU 523.

The μCPU 523 switches the switches swn and swp of the matrix scanner 521 according to the arrangement of the power supply pins and the ground pins of the IC under test input in advance.
And controls the supply and stop of the current from the power supply 522. In addition, based on the detection result from the voltage detector 524, a good or bad product of the IC under test is determined.

Next, the operation will be described. The IC under test before the test mounted on the supply tray 102 of the handler 10 is X-
The wafer is sucked and held by the Y transport device 104, first transported to the continuity test device 50, and pressed against the socket board 51.

The procedure of the continuity test performed here will be described with reference to FIG. Here, the illustrated No. Assuming that the continuity check of the ground pin No. 2 is to be performed,
Matrix scanner 5 to which two ground pins are connected
21 is closed, and other ground pin Nos. Switches swn5, sw of the other pole of the matrix scanner 521 to which 5, 9, 13, 16, 19 are connected.
n9, swn13, swn16, and swn19 are closed, and the other switches swn, swp are all open. Such switching of the switching (measurement channel) is performed by μC
The software is input to the PU 523 in accordance with the pin arrangement of the power supply pins and the ground pins of the IC under test.

After the measurement channels of the matrix scanner 521 are set as described above, a constant current is supplied from the power supply 522 to the matrix scanner 521. Thereby, No. If the ground pin No. 2 is not disconnected and at least one of the other ground pins is conductive, a current flows in the IC under test. This is measured by the voltage detector 524, and the result is sent to the μCPU 523. By outputting, NO. The continuity / disconnection of the ground pin 2 can be checked. If No. When the ground pin of No. 2 is conducting and all the other ground pins are disconnected, No. The result is the same as when the ground pin 2 is disconnected, but in any case there is no difference that the ground pin is disconnected, and there is no problem since the IC is defective.

In such a procedure, the next No. 5 and the power pin No. 5 7 are sequentially performed, and if a defective product is generated, the defective product is classified into a defective product category before the next function test is performed. This eliminates the need for performing a relatively time-consuming function test, thereby preventing waste of test time.

After the continuity test, the IC under test which is determined to be non-defective is transferred to the concave portion 106a of the heat plate 106 by the same XY transfer device 104. Here, since the IC under test is heated to a predetermined temperature by being left for a predetermined time, the XY transfer device 104 transporting the IC under test from the continuity test device 50 to the heat plate 106 to the heat plate 106. Is the heat plate 10 after releasing the IC under test.
The IC under test which has been left at 6 and heated to a predetermined temperature is sucked and held as it is and transferred to the buffer unit 108.

The buffer unit 108 to which the IC under test has been transferred.
Moves to the right end of the rail 108a, and X-
As shown in FIG. 3, the IC socket 206 of the test head 20 is sucked and held by the IC suction device 105d of the Y transport device 105 through the opening 110 of the substrate 109.
And a function test of the logic circuit and the memory circuit is performed. Then, according to the result of the function test, the data is classified into the classification tray 103.

The embodiments described above are described for the purpose of facilitating the understanding of the present invention, and are not described for limiting the present invention. Therefore, each element disclosed in the above embodiment is intended to include all design changes and equivalents belonging to the technical scope of the present invention.

[0036]

As described above, according to the present invention, the socket board is provided with a plurality of terminals connected to all the terminals of the IC under test. Even if the arrangement of the terminals and ground terminals is different,
The continuity test can be performed only by changing the measurement channel of the matrix scanner by the control means using software, and the versatility is excellent.

[Brief description of the drawings]

FIG. 1 is a plan view showing an embodiment of an IC test apparatus to which a continuity test apparatus of the present invention is applied.

FIG. 2 is a sectional view taken along the line II-II in FIG.

FIG. 3 is a block diagram showing an embodiment of a continuity test device of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... IC test apparatus 10 ... Handler 101 ... Empty tray 102 ... Supply tray 103 ... Classification tray 104,105 ... XY transfer apparatus 106 ... Heat plate 108 ... Buffer part 109 ... Substrate 110 ... Opening 20 ... Test head 201 ... Contact unit 30 Tester 40 Cable 50 Continuity test device 51 Socket board 52 Measurement unit 521 Matrix scanner 522 Power supply 523 μCPU (control means) 524 Voltage detector

Claims (2)

[Claims] 1. A continuity test apparatus for an electronic component for testing a continuity state of a power supply terminal and / or a ground terminal of an IC under test, wherein a plurality of terminals electrically connected to at least all terminals of the IC under test are connected. A socket board having, a matrix scanner electrically connected to all terminals of the socket board, a power supply for supplying current to the matrix scanner, and a voltage detector for detecting a voltage between both poles of the matrix scanner. Control means for switching and controlling the measurement channels of the matrix scanner. 2. The continuity test apparatus for an electronic component according to claim 1, wherein the IC under test is transported to a test process, the test is performed, and then the IC under test is classified according to a test result. An IC test apparatus provided before a test step.