JP2000040016A - Self-diagnostic method for electronic circuit, digital data processor provided with self-diagnostic function, record medium and one-chip semiconductor integrated device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a self-diagnostic method capable of shortening the required time for self-diagnosis and applicable even to a read only register. SOLUTION: In a digital data processing circuit 1 which is controlled by a central processing unit 2, a self-diagnostic program Ω is executed to read default set value just after the resetting of a register 51 of a digital signal processor DSP 5, and the read value is compared with default value to self- diagnose whether or not this element operates normally.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a self-diagnosis method for a digital data processing circuit controlled by a central processing unit, a digital data processing apparatus having a self-diagnosis function, a recording medium, and a one-chip semiconductor integrated device. It is.

[0002]

2. Description of the Related Art In recent years, as the functions required of electronic circuits have become wider and more diverse, electronic devices having a configuration in which a plurality of devices having different functions are collectively arranged have become common. As such a systemized electronic device, for example, a central processing unit (hereinafter, referred to as a CPU) and other functional integrated circuits, such as ICs and LSIs, are mounted and distributed on the same board (substrate) as a data processing unit. And is known as a board-type digital data processing device.

Alternatively, in addition to a CPU, a memory device, and a plurality of buffers, a one-chip semiconductor integrated device in which a plurality of semiconductor elements having different functions are integrated and mounted on a single chip as a data processing unit, that is, a system LSI
Are in the process of rapid diffusion.

[0004] As the number of semiconductor elements and data processing units on such electronic devices has increased and the system has been systematized,
It is becoming indispensable to have a self-diagnosis function for checking whether or not a semiconductor element of each data processing section operates normally.

Conventionally, such self-diagnosis functions include:
In accordance with a built-in self-diagnosis program, a method has been adopted in which a CPU diagnoses the operation of a semiconductor element of each data processing unit.

For example, a read-only memory device ROM
(Read Only Memory)
The checksum value calculated in advance when creating the OM is burned and stored in the ROM, and the CPU reads the value stored in the ROM, and reads the read value and the read value from the program. Is compared with the checksum value calculated in step (1), and based on the result of the comparison, it is checked whether the program is correctly written in the ROM.

[0007] Alternatively, a random access memory (RAM) that can be read / written at any time.
y), during the self-diagnosis process, the CPU
Write a predetermined value to the target address of
Reads the contents of the written address, checks whether the read value is the same as the written value, and performs this check for each of the other addresses.
Confirmation of the operation is performed.

In the case where the data processing unit is a custom IC or a custom LSI using a built-in register, a value is written to the register and then read, and whether the read value is equal to the written value is determined. Accordingly, the normal operation of these custom ICs and custom LSIs is also confirmed.

[0009]

However, in the above-described method in which reading is performed again after writing to a register and confirmation is performed, both a write cycle and a read cycle are required. There is a problem in that a long self-diagnosis cannot be performed due to a long processing time.

Further, since both writing and reading cycles are required, there is a problem that the configuration of the self-diagnosis program cannot be simplified.

Further, there is a drawback that the diagnostic method based on both write / read cycles cannot be applied to a read-only register.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems in the prior art, and reduces the time required for self-diagnosis by a simplified program and is applicable to a read-only register. It is an object of the present invention to provide a digital data processing device and a recording medium and a one-chip semiconductor integrated device having a self-diagnosis method and a self-diagnosis function for an electronic circuit.

[0013]

The principle of the present invention will be described below, and then the means of the present invention will be described.

In the case where the data processing unit is a custom IC or a custom LSI using a built-in register, a predetermined default value is set in the register immediately after resetting the register due to circuit necessity. There is something to do.

For example, initial values in a compression operation of an MPEG video stream obtained by encoding a video signal among system streams which are data streams obtained by multiplexing data obtained by encoding image / audio data by MPEG are used as default values. For example, it is set at the time of reset, or set at the time of reset as an initial rotation position as a default value in the control of the servo mechanism.

The default set values immediately after resetting these registers are set from the necessity on the circuit. However, when focusing on this operation, the predetermined default set values are formed in the registers because: This is the result of the register being activated based on the input signal, so that when the register operates normally, a predetermined default setting value is formed. When the register does not operate normally, the predetermined default setting value is not formed. Therefore, by reading and determining the stored value immediately after the reset of the register, the normality test of the circuit becomes possible. The present invention utilizes this principle.

Hereinafter, the means according to the present invention will be described.

According to the present invention, there is provided a digital data processing apparatus having a self-diagnosis function according to the present invention, which comprises a central processing unit and an element having a resettable register function. A data processing unit comprising at least one data processing unit, wherein the element has a predetermined initial set value immediately after reset when normally operated, and the central processing unit Is characterized in that a value read from the element of the data processing unit immediately after reset is compared with the predetermined initial setting value, and a self-diagnosis of the portion is performed based on the comparison result.

According to the above configuration, when the element is operating normally, a predetermined initial set value is formed in the element immediately after resetting, so that the central processing unit reads out from the element immediately after resetting. By simply checking whether the value indicates a predetermined initial value, a diagnosis of the operation of this element is made,
Therefore, the time required for diagnosis is reduced.

As a self-diagnosis function, only a function of automatically reading a value set at the time of resetting an element having a register function and a function of comparing the read value with an initial set value are necessary. The device configuration is simplified.

Further, since the self-diagnosis can be performed even if the element configuration is read-only, a digital data processing apparatus having a read-only element as an element having a register function and having a self-diagnosis function is realized. Is done.

A self-diagnosis method for a digital data processing apparatus according to the present invention includes a central processing unit and at least one data processing unit having a register function and comprising a resettable element, wherein the element is If it operates normally,
A self-diagnosis method applied to a digital data processing device configured to have a predetermined initial value immediately after reset, wherein a value stored from the element of the data processing unit by the central processing unit immediately after reset is read. And a step of comparing the read value with the predetermined initial value.

According to the above-described method, when the element is operating normally, a predetermined initial setting value is formed immediately after resetting the element, and when the element is not operating normally, the element is reset to this element. Since the predetermined initial value is not formed immediately after, the operation of this element can be diagnosed simply by checking whether the value read from the element by the central processing unit immediately after the reset indicates the predetermined initial value. Thus, the number of required steps is reduced and the time required for diagnosis is reduced. Further, when the element configuration is read-only, the self-diagnosis is performed.

A recording medium readable by a central processing unit according to the present invention includes a central processing unit, and at least one digital data processing unit including a resettable element having a register function. When the element operates normally, the central processing unit of the digital data processing apparatus having a predetermined initial setting value immediately after resetting reads out the value stored from the element immediately after resetting and reads the value. A program for functioning as self-diagnosis means for comparing a value with the predetermined initial setting value is recorded.

According to the above configuration, when the recording medium is mounted on the digital data processing device and the stored program is executed by the central processing unit, a self-diagnosis is performed in a short time. Moreover, self-diagnosis is performed even if the element configuration is read-only.

A one-chip semiconductor integrated device having a self-diagnosis function according to the present invention includes at least a central processing unit, a memory device capable of recording a program readable and executable by the central processing unit, and a register function. A semiconductor integrated device in which at least one data processing unit composed of elements having a predetermined initial set value immediately after reset when the device is normally operated is mounted on one chip, and the memory device includes at least: The self-diagnosis means including at least a step of reading out a value stored from the element of the data processing unit immediately after resetting, and a step of comparing the read value with the predetermined initial value. It is characterized by being recorded as a program readable and executable by an arithmetic processing unit.

According to the above configuration, the self-diagnosis of each element provided is performed by the execution of this program by the central processing unit.

Further, as the self-diagnosis function, only a function of reading a value automatically set at the time of resetting to an element having a register function and a function of comparing the read value with an initial set value are required. Therefore, the device configuration is simplified, and self-diagnosis is performed in a shorter time.

Moreover, self-diagnosis is possible even if the element configuration is read-only.

[0030]

Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. The embodiment described below is a part of a preferred example for showing the essential configuration and operation of the present invention, and therefore, various restrictions which are preferable in the technical configuration may be given. The scope of the invention is not limited to these embodiments unless otherwise specified in the following description.

FIG. 1 is a block diagram showing an embodiment of a digital data processor having a self-diagnosis function according to the present invention. As shown in FIG. 1, a digital data processing device 1 according to the present invention includes a central processing unit (CPU) 2 and a read-only memory (ROM) 3 on a single board.
And a read / write memory (RAM) 4 as needed, a digital signal processor (DSP) 5 which is an IC having a register therein, a reset circuit 6, and an address decoder 7, and a data bus 8 And an address bus 9.

The CPU 2 has an Alicematic unit ALU, a program counter PC, an accumulator Acc, a shift register ShRg, and a general-purpose register C.
mRg.

The ROM 3 stores a self-diagnosis program Ω
It is stored in a format that can be read and executed by PU2. Therefore, the ROM 3 stores the central processing unit 2
Is a recording medium on which a self-diagnosis program Ω that can be read and executed by the computer is recorded.

A reset signal 10 is input from the reset circuit 6 to the CPU 2 and the DSP 5.

Based on an access signal from the CPU 2,
The control signals 11, 12, and 13 generated from the address bus 9 via the address decoder 7 are respectively stored in ROM
3, RAM4 and DSP5.

The write signal 14 from the CPU 2 is transferred to the RAM.
4 and the DSP 5 and the read signal 15
Is input to the RAM 4 and the DSP 5.

The DSP 5 is an Arismatic product for product operation.
A unit ALU · Mply, an arismatic unit for sum operation ALU · Sum, a general-purpose register 51,
An accumulator 52 is provided.

The general-purpose register 51 is a small-scale storage portion having a storage capacity of one word or several digits and capable of being accessed at a high speed. The general-purpose register 51 is constituted by a resettable flip-flop element and shifts the stored numerical value. And complement operations.

The accumulator 52 is a type of register having an accumulating function, and stores results along with execution of four arithmetic operations and logical operations. When a numerical value is input from another, an algebraic operation is performed with the numerical value stored before, and the stored content is updated with the result.

Here, the general-purpose register 51 and the accumulator 52 are provided with setter units 51 'and 52' for forming a predetermined default value at the time of reset. The setter units 51 ′ and 52 ′ output each flip-flop element at a predetermined default level (H or L) when the general-purpose register 51 and the accumulator 52 are reset.
Set to. Thus, when the general-purpose register 51 and the accumulator 52 operate normally, a predetermined default value is formed immediately after the reset.

As described above, the DSP 5 functions as a data processing section including an element having a resettable register function.

When the central processing unit 2 executes this, the self-diagnosis program Ω compares the value read out from the general-purpose register 51 or the accumulator 52 of the DSP 5 with a predetermined initial set value (predetermined default value) immediately after reset. The self-diagnosis of the DSP 5 is performed based on the comparison result.

FIG. 2 is a flowchart of one embodiment of a method for self-diagnosis of the digital data processing device 1. When the reset circuit 6 operates at power-on or the like and the reset signal 10 is sent to the CPU 2 and the DSP 5, the CPU 2
SP5 resets the built-in register. Here, for example, D
When the general-purpose register 51 and the accumulator 52, which are built-in registers of the SP5, normally operate, they form a predetermined default value immediately after reset, as described above.

Here, the CPU 2 starts executing the self-diagnosis program when the reset signal 10 from the reset circuit 6 changes from the reset execution state to the non-reset state. With the execution of the program, first, an initialization process is started (step S1).

Further, as part of the initialization processing, a register (in this case, the general-purpose register 51 or the accumulator 52) of the data processing unit (in this case, the DSP 5) in which the default value immediately after the reset is specified in advance is stored in the register. The value of the register is read (step S2).

Next, the read value is compared with the default value (step S3).
The fact that the value immediately after the reset of No. 5 does not match the default value is stored in the storage area A as error information (step S4).

On the other hand, if the read value is equal to the default value, it is confirmed that the DSP 5 is operating normally, and the initialization process is terminated (step S5), and the process shifts to the regular process. (Step S6). The self-diagnosis program Ω according to the present invention operates as shown in the above flowchart.

FIG. 3 is a flowchart of a program that uses the error information fetched into the storage area by the above operation as a post-process of the self-diagnosis method of the digital data processing apparatus shown in FIG. In the regular processing (step S6),
When the storage area A is read (step S11), and an error is detected in the register check of the DSP 5, that is, when there is an abnormality in the diagnosis result (step S12),
The information is presented as an error / warning of the system (step S13).

By the way, in the above-mentioned processing as a post-processing of the self-diagnosis method, an error / warning may be presented even when the operation of the system is not hindered. Therefore, when an error / warning is not presented for a system operation that does not cause a problem, a function is provided in which the user inquires about the self-diagnosis result of the system in the regular processing, and the diagnosis result is presented via this. It is also possible.

FIG. 4 is a flowchart of such post-processing of self-diagnosis. Referring to FIG.
In 6), it is checked whether there is a request from the user to inquire about the self-diagnosis result (step S21). If there is an inquiry request for the self-diagnosis result, the storage area A is read (step S22). If an error occurrence is confirmed in the DSP 5 by the diagnosis result (step S23), the information of the IC in which the error occurrence is detected, that is, information of the DSP 5 Is presented (step S24). The self-diagnosis program according to the present invention operates as in the above flowchart.

Next, the configuration and operation of each component of the digital data processing device 1 will be further described.

FIG. 5 is a timing chart at the time of reading and writing by the CPU 2 shown in FIG. The write operation from the CPU 2 will be described with reference to FIG. As shown by the section 16 in FIG. 5, when the address to be written is determined by the address bus 9 and the data to be written is determined by the data bus 8, the write signal 14 becomes active. The CPU 2 writes data to the device.

In the read operation of the CPU 2, as shown in the section 17 in FIG. 5, the address to be read is determined on the address bus 9, the read signal 15 becomes active, and from these signals, the designated device is determined. Data is output onto the data bus 8 and the CPU 2 reads it.

FIG. 6 is a block diagram of the reset circuit 6 shown in FIG. FIG. 7 is a timing chart of the reset circuit 6 shown in FIG. The configuration and operation of the reset circuit 6 will be described with reference to FIGS. The reset circuit 6 includes a power supply monitoring IC 18 and a delay circuit 19,
The reset signal 10 is output via these. The power monitoring IC 18 outputs a signal 20 when the power of the circuit exceeds a certain value.
Activate

The delay circuit 19 is a circuit for extending the reset time for the signal 20 by a certain time 21. The certain time 21 depends on the setup time and the hold time of the reset signal specified by the CPU 2.
Note that the reset circuit 6 shown here is one example of a reset circuit using a power supply.
Even if it is software-like, it may be by artificial switch operation.

FIG. 8 is a block diagram of the address decoder shown in FIG. FIG. 9 is a timing chart of the address decoder shown in FIG. The configuration and operation of the address decoder 7 will be described with reference to FIGS. The address decoder 7 has ROM 3, RAM 4, D
In order for CPU2 to access SP5, the CPU
2 is a circuit for assigning to each of the two memory spaces.

The address decoder 7 has an address bus 9
Are input to the NAND gate and N.
Control signal 1 to each device via OT gate circuit
1, 12, and 13 are output. For example, when accessing the DSP 5, the signal 22 is set to a high level and the signal 23 is set to a low level as in a period 24 in FIG. As a result, the control signal 13 for the DSP 5 becomes active. The circuit of the address decoder shown here is one example, and other methods may be used.

FIG. 10 is a block diagram of an internal register which is set to a default immediately after reset applied in the present invention. Based on this figure, for example, a general-purpose register
Will be described.

The general-purpose register 51 includes a flip-flop 25 having a clear function and a buffer 2 having a three-state output.
Consists of six. Here, flip-flops are provided by the number of bits of the register, but in the figure, only one flip-flop 25 and peripheral portions are shown for convenience of explanation.

The reset signal 10 is supplied to the flip-flop 25
, The signal 27 from the output port Q of the flip-flop 25 immediately after resetting always shows a constant value.

Further, each flip-flop 25 of the general-purpose register 51 has a setter unit 5 which operates only at the time of reset.
1 ′, the signal 2 from the output port Q immediately after the reset
7 is set to a predetermined default level (H or L).

As a result, the value immediately after the resetting of the general-purpose register 51 becomes a default value in a normal operation. The configuration shown in FIG. 10 is an example of a circuit in which the default value is fixed at the time of reset, and another configuration may be used.

As described above, in this embodiment, the default setting value at the time of resetting the register is used, and the stored value of the register is read and compared immediately after resetting. Since the function of judging whether or not the test data is realized by software, the required time is reduced as compared with the conventional test data write / read cycle method.

Therefore, according to this configuration, the initial state of each device at the time of reset is efficiently checked in a short time, and each component or functional element constituting the digital data processing device is operated correctly. Confirmation can be performed efficiently. Moreover, self-diagnosis can be performed even with a read-only register configuration.

Further, when an error or a warning occurs, it is possible to obtain information which is a clue for investigating the cause.

As an application example of the digital data processing apparatus 1 of the present embodiment, there is an MPEG2 video encoding board, for example. In this case, for example, a 24-bit DSP 5 is applied as a means for implementing the encoding control. Other application examples include a rewritable DVD system, a digital video transmission device having a system stream generation function,
There are professional equipment for digital broadcasting and non-linear video editing equipment.

Also, in the case of a moving picture compression DSP, 4 to 32 units of the built-in arismetic unit ALU are incorporated in an 8- to 32-bit configuration, and these operate concurrently. Registers are prepared, and as a result, the number of registers increases. Therefore, the configuration of the present invention is very effective in preventing an increase in the time required for the self-diagnosis of these registers and executing an efficient self-diagnosis.

FIG. 11 is a block diagram showing an embodiment of a one-chip semiconductor integrated device having a self-diagnosis function according to the present invention. The software servo having a DSP (digital signal processor) incorporated therein is shown in FIG. One-chip semiconductor integrated device for mechanism control, ie, system LS
3 shows a block configuration of I.

In a system LSI for controlling a software servo mechanism with high efficiency, a configuration in which a DSP core is incorporated as an IP core or a configuration in which an IP core in which a servo control circuit is customized is possible. 11 is a configuration in which a DSP core is incorporated.

As shown in the figure, a one-chip semiconductor integrated device (system LSI) SysL1 includes a central processing unit (CPU) 2, a read-only mask ROM (ROM)
3. As needed, a read / write memory (RAM) 4, an input / output interface (I / O IF) 112, a hard disk interface (HDD IF) 113, and a dual-port memory 114 are connected to a common bus 111. DS accessible to memory 114
Base drive core 1 that organizes pulse width modulation signals PWMs based on output signals of P core 55 and DSP core 55
15. A which receives the current feedback signal FIs and converts it into a digital signal
/ D conversion core 116, a direction determining core 117 for receiving a position feedback signal PFs and determining a direction, and a direction determining core 1
Counter cores 118 which receive data from 17 and send count values to the central processing unit 2 are semiconductor integrated devices mounted on one chip as IP cores.

The self-diagnosis program Ω is stored in the read-only mask ROM 3 so that it can be read and executed by the central processing unit 2. The configuration and operation of the self-diagnosis program Ω are the same as those in the above embodiment.

The input / output interface 112 is configured to be connectable to a terminal device capable of inputting setting values and the like.
In addition, the hard disk interface 113 has an HD
D (hard disk drive) is connectable.

Further, a configuration in which a secondary cache disposed outside the central processing unit 2, a rewritable non-volatile memory such as an SRAM or a flash memory, a power control device, and the like are incorporated. It is also possible.

The DSP core 55 includes a register group Reg1 to a general-purpose register, a shift register, and a buffer register.
Reg5 and a plurality of Arismetic
It has a built-in unit, ROM and RAM.

This one-chip semiconductor integrated device SysL1
The control object controlled by the servo motor 122
And a power amplifier 12 for driving the servo motor 122.
1 and a position sensor 123 for detecting the rotational position of the servo motor 122. The power amplifier 121 receives the pulse width modulation signal PWMs from the base drive core 115 and outputs the current feedback signal FIs to the A / D converter.
The position sensor 123 sends the position feedback signal PFs to the direction determination core 117.

In the case of the present embodiment, the CPU 2 for controlling the whole one-chip semiconductor integrated device SysL1 controls signal processing and various input / output processing of the basic part of servo control, while the DSP core 55 controls the current control signal and the pulse. In addition to the arithmetic processing of the width modulation control signal, processing such as reading a signal from the A / D conversion core 116 and outputting a signal to the base drive core 115 which is a part of the drive amplifier is executed.

In the above configuration, the CPU 2 and the DSP core 55
Data transfer between the high-speed dual-port memory 114
Done through. That is, data is written from the buffer register (not shown) of the CPU 2 to the dual port memory 114, and the buffer register (for example, Reg 2) of the DSP core 55 fetches the data from the dual port memory 114. Alternatively, the reverse operation is performed.

Further, a plurality of registers (eg, Reg1 to Reg5) are used in the operation process on the DSP core 55 side. Therefore, when it is necessary to simultaneously generate a large number of position feedback control signals of multiple systems for multi-axis control or the like, a larger number of arismetic units (or processors) in charge of the product-sum operation are provided in the DSP core 55. As a result, the total number of registers in the DSP core 55 is also increased. Therefore, in order to prevent an increase in the time required for self-diagnosis of these registers and to execute an efficient self-diagnosis, the configuration of the present invention is as follows. It will be very effective.

In the case of a system LSI having a servo mechanism IP core, the servo mechanism to be controlled uses an encoder as a position sensor for generating a position feedback signal, and is proportional to the amount of movement only when the movement occurs. There is an incremental type (differential type) that outputs a number of pulses or an absolute type that always outputs position data. Both types of encoders output rectangular wave signals having a phase difference of 90 degrees from each other. Servo mechanism IP
The core determines the moving direction from the two-phase waveforms input as the position feedback signal, creates a pulse proportional to the moving amount, and accumulates or subtracts this pulse with a counter according to the moving direction to obtain the position. Create a feedback control signal.

In this operation, a plurality of registers are used. Therefore, when it is necessary to simultaneously generate a large number of position feedback control signals of multiple systems in a multi-axis control or the like, it is necessary to provide a plurality of servo mechanism IP cores in parallel and operate them. Since the number of registers increases, the configuration of the present invention becomes very effective, as described above, in order to prevent an increase in the time required for the self-diagnosis of these registers and to execute an efficient self-diagnosis.

Further, as the IP core, a Universal Pu (UPP) which is a processor for pulse input / output processing is used.
1se Processor) can also be applied. The UPP is a core that has a command for pulse-only processing and executes encoder pulse processing and pulse width modulation signal output processing with high efficiency. The UPP includes a plurality of registers. A self-diagnosis method can be applied.

Further, instead of using an A / D converter,
There is a method of differentiating the position feedback signal, which is a digital signal, into a speed signal.When this configuration is adopted, for example, the pulse interval of the position feedback signal is measured in order to suppress an increase in measurement error during low-speed rotation. There is a method of obtaining a speed from the time, a method of providing an observer function by software, and the like, and further IP core equipment for concurrently executing these various control processes is required. This means that the self-diagnosis processing of various registers included in the IP core is further increased, and it is clear that the self-diagnosis method and configuration according to the present invention become more and more important functions.

[0083]

As described in detail above, claim 1 of the present invention
A digital data processing device having a self-diagnosis function according to the present invention includes a central processing unit and a data processing unit including an element having a register function that becomes a predetermined initial setting value immediately after reset when the device is normally operated, Since the central processing unit performs self-diagnosis of the data processing unit by comparing the value read from this element immediately after reset with the initial set value, the element having the register function as the self-diagnosis function is reset. It is sufficient to provide a function of reading and comparing values that are automatically set at times, so that the device configuration can be simplified and a digital data processing device capable of performing self-diagnosis in a shorter time can be provided. Becomes

In addition, since self-diagnosis is possible even if the element configuration is read-only, a read-only element is provided as an element having a register function, and a digital data processing apparatus having a self-diagnosis function is provided. It becomes possible.

A self-diagnosis method for a digital data processing device according to a second aspect of the present invention comprises a central processing unit and an element having a register function that becomes a predetermined initial set value immediately after resetting when it operates normally. The present invention is applied to a digital data processing device including a data processing unit, and includes a process of reading a value stored immediately after reset from an element and a process of comparing a read value with a predetermined initial setting value. Therefore, self-diagnosis can be performed in a small number of steps, and a process of writing and reading to and from the element is not required. Thus, the time required for the self-diagnosis can be shortened, and more rapid self-diagnosis can be performed. Even if it is read-only, self-diagnosis becomes possible.

A recording medium readable by a central processing unit according to a third aspect of the present invention includes a data processing unit comprising a resettable element having a register function,
When this element operates normally, for a digital data processing device configured to have a predetermined initial value immediately after reset, the central processing unit reads the value stored from the element immediately after reset and reads this value. Since a program for functioning as self-diagnosis means for comparing the set value with a predetermined initial set value is recorded, the recording medium is mounted on a digital data processing device and stored in a central processing unit. , The self-diagnosis can be easily performed. Moreover, even if the element configuration is read-only, self-diagnosis becomes possible.

A one-chip semiconductor integrated device according to a fourth aspect of the present invention includes a central processing unit, a memory device capable of recording a program readable and executable by the central processing unit, and a register function. A data processing unit consisting of an element that has a predetermined initial setting value immediately after a reset when it operates normally is mounted on a single chip. In this memory device, the value stored from the element immediately after the reset is read. Since the self-diagnosis means including the step of outputting and the step of comparing the read value with a predetermined initial value is recorded as a program which can be read and executed by the central processing unit, the central processing unit It is possible to provide a one-chip semiconductor integrated device in which self-diagnosis of each element is performed when this program is executed.

Further, as a self-diagnosis function, an element having a register function only needs to have a function of reading and comparing values automatically set at the time of reset. Thus, it is possible to provide a one-chip semiconductor integrated device capable of performing self-diagnosis.

In addition, since self-diagnosis is possible even if the element configuration is read-only, a read-only element is provided as an element having a register function, and a one-chip semiconductor integrated device having a self-diagnosis function is provided. It becomes possible.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a digital data processing device having a self-diagnosis function according to the present invention.

FIG. 2 is a flowchart of an embodiment of a self-diagnosis method for a digital data processing device according to the present invention.

FIG. 3 is a flowchart of post-processing of the self-diagnosis method of the digital data processing device shown in FIG. 2;

FIG. 4 is a flowchart of another post-processing of the self-diagnosis method of the digital data processing apparatus shown in FIG. 2;

FIG. 5 is a timing chart at the time of reading and writing by the CPU shown in FIG. 1;

FIG. 6 is a block diagram of the reset circuit shown in FIG. 1;

FIG. 7 is a timing chart of the reset circuit shown in FIG. 6;

FIG. 8 is a block diagram of an address decoder shown in FIG. 1;

9 is a timing chart of the address decoder shown in FIG.

FIG. 10 is a block diagram of an internal register which is set to a default immediately after reset applied in the present invention.

FIG. 11 is a block diagram of an embodiment of a one-chip semiconductor integrated device having a self-diagnosis function according to the present invention.

[Explanation of symbols]

1 ... Digital data processing device, 2 ... Central processing unit (CPU), 3 ... Read only memory (ROM), 4 ...
… Read / write memory (RAM) as needed, 5… Digital
Signal processor (DSP), 6 reset circuit, 7 address decoder, 8 data bus, 9
... Address bus, 10 ... Reset signal, 11 ... Address signal, 12 ... Address signal, 13 ... Address signal, 14 ... Write signal, 15 ... Read signal, 51 ...
... General-purpose register, 51 '... Setter section, 52 ... Accumulator, Acc ... Accumulator, ALU ... Arismetic unit, ALU / Mply ... Arismatic unit for product operation, ALU / Sum ...
Arithmetic unit for sum operation, CmRg ... General purpose register, PC ... Program counter, ShRg ...
… Shift register, Ω …… Self-diagnosis program

Claims (4)

[Claims] 1. A digital data processing device comprising: a central processing unit; and at least one data processing unit including an element having a resettable register function, wherein the element operates normally. The central processing unit becomes a predetermined initial setting value (hereinafter, referred to as a default value) immediately after resetting, and the central processing unit reads the value read from the element of the data processing unit immediately after resetting to the predetermined value. And a self-diagnosis function of the data processing section based on the comparison result. 2. A computer comprising a central processing unit and at least one data processing unit comprising a resettable element having a register function, wherein said element operates normally and has a predetermined initial set value immediately after reset. A self-diagnosis method applied to a digital data processing device having a configuration, wherein a value stored in the element of the data processing unit is read out by the central processing unit immediately after resetting; and A self-diagnosis method for a digital data processing device, comprising: at least a step of comparing a set value with the predetermined initial setting value. 3. A central processing unit, and at least one data processing section comprising a resettable element having a register function, wherein said element operates normally and has a predetermined initial set value immediately after resetting. The central processing unit of the digital data processing device having the following configuration reads out a value stored from the element of the data processing unit immediately after resetting, and reads the read value and the predetermined initial setting value. A recording medium readable by a central processing unit, wherein a program for functioning as a self-diagnosis means for comparison is recorded. 4. At least a central processing unit, a memory device capable of recording a program which can be read and executed by the central processing unit, and a predetermined initial setting immediately after resetting when a normal operation is provided with a register function. A semiconductor integrated device in which at least one data processing unit including a value element is mounted on one chip; and the memory device includes at least a value stored from the element of the data processing unit immediately after reset. And a step of comparing the read value with the predetermined initial setting value, wherein the self-diagnosis means is recorded as a program readable and executable by the central processing unit. A one-chip semiconductor integrated device having a self-diagnosis function.