JP2000036557A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JP2000036557A JP2000036557A JP10203099A JP20309998A JP2000036557A JP 2000036557 A JP2000036557 A JP 2000036557A JP 10203099 A JP10203099 A JP 10203099A JP 20309998 A JP20309998 A JP 20309998A JP 2000036557 A JP2000036557 A JP 2000036557A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- semiconductor device
- lead
- resin
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体チップ等の
電子部品が実装され一端側に外部接続用のリード端子を
備えるとともに外部機器に対する取付け時に他端側で固
定されるリードフレームが樹脂封止されてなる樹脂封止
型半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame on which electronic components such as a semiconductor chip are mounted and which has lead terminals for external connection at one end and which is fixed at the other end when mounted on an external device. The present invention relates to a resin-encapsulated semiconductor device formed.
【０００２】[0002]
【従来の技術】従来知られているセミモールドタイプの
樹脂封止型半導体装置の一例について、図８〜図１０を
参照して説明する。図８及び図９は、それぞれ、部分的
に切り欠かれた半導体装置の全体平面図及び図８におけ
るＤ−Ｄ線に沿った断面説明図である。この半導体装置
５０は、半導体素子４５が実装され一端側に外部接続用
のリード端子４２ｂが設けられた第１リードフレーム４
２と、制御用ＩＣ４６及びチップ抵抗４７が実装されて
その一部で外部接続用のリード端子４３ｂをなす複数の
第２リードフレーム４３とを有しており、各リードフレ
ーム４２，４３及びそれらに実装された電子部品は、ボ
ンディングワイヤ５１で互いに電気接続されている。か
かる従来の半導体装置５０では、上記各リードフレーム
４２，４３及び電子部品が、第１リードフレーム４２の
裏面の一部が露出するようにモールド樹脂４１で封止さ
れている。2. Description of the Related Art An example of a conventionally known semi-mold type resin-sealed semiconductor device will be described with reference to FIGS. 8 and 9 are an overall plan view of a partially cut-out semiconductor device and a cross-sectional explanatory view taken along line DD in FIG. 8, respectively. The semiconductor device 50 includes a first lead frame 4 having a semiconductor element 45 mounted thereon and one end provided with a lead terminal 42b for external connection.
2 and a plurality of second lead frames 43 on which a control IC 46 and a chip resistor 47 are mounted and a part of which constitutes a lead terminal 43b for external connection. The mounted electronic components are electrically connected to each other by bonding wires 51. In the conventional semiconductor device 50, the lead frames 42 and 43 and the electronic components are sealed with the mold resin 41 so that a part of the back surface of the first lead frame 42 is exposed.
【０００３】図９からよく分かるように、上記第１リー
ドフレーム４２の一端側に設けられた外部接続用のリー
ド端子４２ｂは、半導体素子４５が実装されたフレーム
基部４２ａから所定高さの段差部４２ｃをなして延びて
いる。外部機器（不図示）に対する装置本体５０の取付
け時には、装置５０に設けられた孔部４８（図８参照）
にネジ部材５２を挿通させ、装置５０を外部機器に締結
固定した上で、上記各リード端子４２ｂ，４３ｂを外部
端子に対して溶接接続する。この溶接時に上記第１リー
ドフレーム４２のリード端子４２ｂに作用する応力によ
り、上記第１リードフレーム４２の下面側で、例えば段
差部４２ｃの最下点４９からモールド樹脂４１との間に
クラックが生じる場合がある。As can be clearly understood from FIG. 9, a lead terminal 42b for external connection provided at one end of the first lead frame 42 is a stepped portion having a predetermined height from a frame base 42a on which a semiconductor element 45 is mounted. 42c. When the device main body 50 is attached to an external device (not shown), a hole 48 provided in the device 50 (see FIG. 8)
After the screw member 52 is inserted through the device 50 and the device 50 is fastened and fixed to an external device, the lead terminals 42b and 43b are welded to the external terminals. Due to the stress acting on the lead terminals 42b of the first lead frame 42 at the time of this welding, cracks occur on the lower surface side of the first lead frame 42, for example, between the lowest point 49 of the step portion 42c and the mold resin 41. There are cases.
【０００４】[0004]
【発明が解決しようとする課題】かかるクラックが半導
体装置５０に与え得る影響について、図１０を参照して
説明する。この図１０は、モールド樹脂４１内において
第１リードフレーム４２の側縁に沿って延びるリード端
子４２ｂ及びフレーム中央に位置する半導体素子４５を
概略的に示す説明図である。尚、この図１０では、図面
の明瞭化を図るべく、各部材についての断面ハッチング
を省略している。上記段差部４２ｃの最下点４９にて発
生したクラックが、その段差部の上方へ伝播し、更に、
第１リードフレーム４２のリード端子４２ｂの下面側で
進行するにつれて、上記リード端子４２ｂは、モールド
樹脂４１との密着状態から解放される結果、矢印で示す
ように、上方へ変位しようとする。このとき、第１リー
ドフレーム４２は、その他端側で外部機器に対して固定
されているため、上記半導体素子４５が実装されたフレ
ーム基部４２ａは動かない。上記リード端子４２ｂが変
位するにつれて、その上面側にあるモールド樹脂４１が
持ち上げられる。上記リード端子４２ｂの変位が所定以
上になると、上記第１リードフレーム４２の上面側で、
例えばリード端子４２ｂとモールド樹脂４１との間に界
面クラックが生じる。このクラックは、上記リード端子
４２ｂが更に変位した場合に、上記フレーム基部４２ａ
上に伝播して、その中央における半導体素子４５が実装
される部位にまで進行し得る。The effect that such a crack can have on the semiconductor device 50 will be described with reference to FIG. FIG. 10 is an explanatory view schematically showing a lead terminal 42b extending along the side edge of the first lead frame 42 in the mold resin 41 and a semiconductor element 45 located at the center of the frame. In FIG. 10, the cross-sectional hatching of each member is omitted for clarity of the drawing. The crack generated at the lowest point 49 of the step portion 42c propagates above the step portion, and further,
As the lead terminal 42b progresses on the lower surface side of the lead terminal 42b of the first lead frame 42, the lead terminal 42b is released from the state of close contact with the mold resin 41, and as a result, tends to be displaced upward as indicated by the arrow. At this time, since the first lead frame 42 is fixed to the external device at the other end, the frame base 42a on which the semiconductor element 45 is mounted does not move. As the lead terminals 42b are displaced, the mold resin 41 on the upper surface side is lifted. When the displacement of the lead terminal 42b becomes equal to or more than a predetermined value, the upper surface of the first lead frame 42
For example, an interface crack occurs between the lead terminal 42b and the mold resin 41. This crack is generated when the lead terminal 42b is further displaced.
Propagating upwards, it can proceed to a portion where the semiconductor element 45 is mounted at the center.
【０００５】従来の半導体装置５０では、かかるクラッ
クの進行により、上記半導体素子４５が、リード端子４
２ｂの変位に伴い上方へ持ち上げられるモールド樹脂４
１に密着したまま、上記第１リードフレーム４２のフレ
ーム基部４２ａから素子ごと剥離する、あるいは、部分
的に剥離して割れるという問題があった。[0005] In the conventional semiconductor device 50, due to the progress of the crack, the semiconductor element 45 is connected to the lead terminal 4.
Mold resin 4 which is lifted upward with the displacement of 2b
There has been a problem that the element is peeled off from the frame base 42a of the first lead frame 42 while being in close contact with the element 1, or it is partially peeled off and cracked.
【０００６】そこで、本発明は、応力により生じるクラ
ックの進行を抑制して実装された半導体素子を保護し得
る信頼性の高い樹脂封止型半導体装置を提供することを
目的とする。Accordingly, an object of the present invention is to provide a highly reliable resin-encapsulated semiconductor device capable of protecting a mounted semiconductor element while suppressing the progress of cracks caused by stress.
【０００７】尚、リードフレームとモールド樹脂との間
に生じる界面クラックの進行を防止し得る手段として
は、例えば特開平６−２３２３０４号，特開平３−１７
１６５９号公報等に開示されるものが知られているが、
それらの従来技術では、対象とする半導体装置の構成又
は形状が、本発明における場合と異なるため、ここで
は、参考として列挙するにとどめ、これ以上の説明は省
略する。As means for preventing the progress of the interface crack generated between the lead frame and the mold resin, for example, Japanese Patent Application Laid-Open Nos. Hei 6-232304 and Hei 3-17
Although what is disclosed in 1659 gazette etc. is known,
In these prior arts, the configuration or shape of the target semiconductor device is different from that in the present invention, and therefore, they are listed here for reference only, and further description is omitted.
【０００８】[0008]
【課題を解決するための手段】本願の第１の態様に係る
発明は、所定の電子部品が実装され一端側に外部接続用
のリード端子を備えるとともに外部機器に対する取付け
時に他端側で固定されるリードフレームが樹脂封止され
てなる樹脂封止型半導体装置において、上記リードフレ
ームの一端側には、実装された電子部品に対向する部位
の少なくとも一部で所定角度折り曲げられてなる立上が
り部が設けられていることを特徴としたものである。According to a first aspect of the present invention, a predetermined electronic component is mounted, a lead terminal for external connection is provided at one end, and is fixed at the other end when mounted on an external device. In the resin-encapsulated semiconductor device in which the lead frame is resin-encapsulated, at one end side of the lead frame, a rising portion formed by bending at a predetermined angle at least at a part of a portion facing the mounted electronic component is provided. It is characterized by being provided.
【０００９】また、本願の第２の態様に係る発明は、上
記立上がり部が、上記リードフレームの一端側で、実装
された電子部品に対向する部位若しくはその一部にのみ
設けられていることを特徴としたものである。The invention according to a second aspect of the present invention is characterized in that the rising portion is provided only at a portion facing one side of the mounted electronic component or at a part thereof at one end of the lead frame. It is a characteristic.
【００１０】更に、本願の第３の態様に係る発明は、上
記立上がり部が、上記リードフレームの一端側で、上記
リード端子の突出部位を除き、幅方向に沿って設けられ
ていることを特徴としたものである。Further, the invention according to a third aspect of the present invention is characterized in that the rising portion is provided at one end of the lead frame along a width direction except for a protruding portion of the lead terminal. It is what it was.
【００１１】[0011]
【発明の実施の形態】実施の形態１．以下、本発明の実
施の形態１について、図１〜図５を参照しながら説明す
る。図１，図２および図３は、それぞれ、部分的に切り
欠かれた半導体装置の全体平面図，図１におけるＡ−Ａ
線に沿った断面説明図およびＢ−Ｂ線に沿った断面説明
図である。この半導体装置１０は、半導体素子５が実装
され一端側に外部接続用のリード端子２ｂ備えた第１リ
ードフレーム２と、制御用ＩＣ６及びチップ抵抗７が実
装されてその一部で外部接続用のリード端子３ｂをなす
複数の第２リードフレーム３とを有しており、上記各リ
ードフレーム２，３及びそれに実装された電子部品は、
ボンディングワイヤ１１で互いに電気接続されている。
この半導体装置１０は、所謂セミモールドタイプの樹脂
封止型半導体装置であり、上記装置１０では、上記各リ
ードフレーム２，３及び電子部品が、外部接続用のリー
ド端子２ｂ，３ｂとともに、第１リードフレーム２の裏
面の一部が露出するように、モールド樹脂１で封止され
ている。尚、この実施の形態では、樹脂封止材料として
エポキシ樹脂を用いるようにしたが、これに限定される
ことなく、適切であれば他の樹脂材料を用いてもよい。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, Embodiment 1 of the present invention will be described with reference to FIGS. 1, 2 and 3 are respectively an overall plan view of a partially cut-away semiconductor device, and AA in FIG.
It is sectional explanatory drawing along the line, and sectional explanatory drawing along the BB line. The semiconductor device 10 has a first lead frame 2 on which a semiconductor element 5 is mounted and a lead terminal 2b for external connection provided on one end side, a control IC 6 and a chip resistor 7 mounted on a part of the semiconductor device 5 for external connection. A plurality of second lead frames 3 forming lead terminals 3b, and the lead frames 2, 3 and the electronic components mounted thereon are
They are electrically connected to each other by bonding wires 11.
The semiconductor device 10 is a so-called semi-mold type resin-encapsulated semiconductor device. In the device 10, each of the lead frames 2, 3 and the electronic components are connected to the first terminals together with lead terminals 2b, 3b for external connection. The lead frame 2 is sealed with the mold resin 1 so that a part of the back surface is exposed. In this embodiment, an epoxy resin is used as the resin sealing material. However, the present invention is not limited to this, and another resin material may be used as appropriate.
【００１２】上記第１リードフレーム２について、図４
及び図５を参照しながら説明する。図４及び図５は、そ
れぞれ、上記第１リードフレーム２の全体平面図および
斜視図である。尚、図４では、装置１０の外形を仮想線
で示している。上記第１リードフレーム２は、半導体素
子５（仮想線で示す）が実装されるフレーム基部２ａ
と、該フレーム基部２ａの一端側の両縁から突出し所定
高さの段差部２ｃを介して延びるリード端子２ｂとを有
している。上記基部２ａは、半導体装置１０において、
本体裏面側に露出して、ヒートシンク作用をなし得る。
上記第１リードフレーム２の一端側には、更に、フレー
ム基部２ａに実装された半導体素子５に対向する部位、
すなわち幅方向の略中央に、所定角度折り曲げられてな
る立上がり部４が設けられている。また、この第１リー
ドフレーム２の他端側には、ネジ挿通用の孔部２ｄが形
成されている。FIG. 4 shows the first lead frame 2.
This will be described with reference to FIG. 4 and 5 are an overall plan view and a perspective view of the first lead frame 2, respectively. In FIG. 4, the external shape of the device 10 is indicated by virtual lines. The first lead frame 2 includes a frame base 2a on which the semiconductor element 5 (shown by a virtual line) is mounted.
And a lead terminal 2b protruding from both edges on one end side of the frame base 2a and extending through a step 2c having a predetermined height. In the semiconductor device 10, the base 2a
It can be exposed to the back side of the main body to perform a heat sink function.
On one end side of the first lead frame 2, a portion facing the semiconductor element 5 mounted on the frame base 2a,
That is, the rising portion 4 that is bent at a predetermined angle is provided substantially at the center in the width direction. A hole 2d for screw insertion is formed on the other end of the first lead frame 2.
【００１３】図１からよく分かるように、上記半導体装
置１０には、リード端子２ｂ，３ｂが突出する側とは反
対側（図では左側）にネジ挿通孔８が設けられており、
外部機器（不図示）に対する装置本体１０の取付けに際
しては、上記ネジ挿通孔８にネジ部材１２（図２参照）
を挿通させて、装置１０が外部機器に締結固定される。
この状態で、上記各リード端子２ｂ，３ｂが外部端子に
対して溶接接続される。As can be clearly understood from FIG. 1, the semiconductor device 10 is provided with a screw insertion hole 8 on the side (left side in the figure) opposite to the side from which the lead terminals 2b and 3b protrude.
When attaching the apparatus main body 10 to an external device (not shown), a screw member 12 (see FIG. 2) is inserted into the screw insertion hole 8.
Is inserted, and the device 10 is fastened and fixed to the external device.
In this state, the lead terminals 2b and 3b are welded to external terminals.
【００１４】従来技術を引用して前述したように、かか
る溶接時に上記第１リードフレーム２のリード端子２ｂ
において応力が作用し、この応力により、上記第１リー
ドフレーム２の下面側で、例えば段差部２ｃの最下点９
からモールド樹脂１との間にクラックが生じる場合があ
る。このクラックが、上記段差部２ｃの上方へ伝播し、
第１リードフレーム２のリード端子２ｂの下面側で進行
するにつれて、上記リード端子２ｂは、モールド樹脂１
との密着状態から解放される結果、上方へ変位しようと
する。このとき、第１リードフレーム２は、その他端側
で外部機器に対して固定されているため、上記半導体素
子５が実装されたフレーム基部２ａは動かない。上記リ
ード端子２ｂが変位するにつれて、その上面側にあるモ
ールド樹脂１が持ち上げられる。上記リード端子２ｂの
変位が所定以上になると、上記第１リードフレーム２の
上面側で、リード端子２ｂとモールド樹脂１との間に界
面クラックが生じる。このクラックは、上記リード端子
２ｂに応力が更に作用した場合に、上記フレーム基部２
ａ上に伝播しようとする。As described above with reference to the prior art, the lead terminal 2b of the first lead frame 2 is used during such welding.
At the lower surface side of the first lead frame 2, for example, the lowest point 9 of the stepped portion 2c.
From the mold resin 1 may occur. This crack propagates above the step 2c,
As the lead terminal 2b of the first lead frame 2 advances on the lower surface side, the lead terminal 2b
As a result of being released from the state of close contact with the device, it tends to be displaced upward. At this time, since the first lead frame 2 is fixed to the external device on the other end side, the frame base 2a on which the semiconductor element 5 is mounted does not move. As the lead terminals 2b are displaced, the mold resin 1 on the upper surface side is lifted. When the displacement of the lead terminal 2b becomes a predetermined value or more, an interface crack occurs between the lead terminal 2b and the mold resin 1 on the upper surface side of the first lead frame 2. This crack occurs when the stress further acts on the lead terminal 2b.
Try to propagate on a.
【００１５】この実施の形態では、上記第１リードフレ
ーム２の一端側で、実装された半導体素子５に対向する
部位に上記立上がり部４が設けられており、この立上が
り部４によって、上記フレーム基部２ａ上に（特に半導
体素子５が実装される部位に）伝播しようとするクラッ
クの進行が抑制される。その結果、上記半導体素子５
が、上方へ持ち上げられるモールド樹脂１に密着したま
ま、フレーム基部２ａから剥離する、あるいは、部分的
に剥離して割れる惧れは軽減される。In this embodiment, the rising portion 4 is provided at one end of the first lead frame 2 at a position facing the mounted semiconductor element 5, and the rising portion 4 allows the frame base to be formed. The progress of cracks that propagate on 2a (especially on the portion where semiconductor element 5 is mounted) is suppressed. As a result, the semiconductor device 5
However, the possibility of peeling off from the frame base 2a while being in close contact with the mold resin 1 which is lifted up, or partial peeling and cracking is reduced.
【００１６】本願発明者が行った実験によれば、装置本
体をネジ部材で締結固定した上で、装置裏面側から上記
リード端子に対向する所定位置を例えば０．２５ｍｍ／
ｓｅｃの押圧速度で上方へ押し上げた場合、上記半導体
素子がフレームから剥離して割れる不良の発生率は、上
記立上がり部をもたない従来の半導体装置（図８参照）
について４０％であるのに対して、実施の形態１に係る
半導体装置１０については１０％にまで抑制されるデー
タが得られた。According to an experiment conducted by the inventor of the present invention, after fixing the apparatus main body with a screw member, a predetermined position facing the lead terminal from the back side of the apparatus is, for example, 0.25 mm /.
When the semiconductor element is pushed upward at a pressing speed of sec, the occurrence rate of the defect in which the semiconductor element is separated from the frame and cracked is the conventional semiconductor device having no rising portion (see FIG. 8).
Is 40%, while the semiconductor device 10 according to the first embodiment has obtained data suppressed to 10%.
【００１７】以上のように、この実施の形態に係る樹脂
封止型半導体装置１０によれば、応力により生じるクラ
ックの進行を抑制して実装された半導体素子５を保護
し、装置の高い信頼性を確保することができる。As described above, according to the resin-encapsulated semiconductor device 10 according to this embodiment, the mounted semiconductor element 5 is protected by suppressing the progress of cracks caused by stress, and the device has high reliability. Can be secured.
【００１８】実施の形態２．次に、本発明の実施の形態
２について、図６及び図７を参照しながら説明する。図
６及び図７は、それぞれ、樹脂封止型半導体装置内の第
１リードフレームの全体平面図および斜視図である。
尚、以下の説明においては、上記実施の形態１における
場合と同じものには、同一の符号を付し、それ以上の説
明は省略する。この実施の形態２は、上記実施の形態１
に係る半導体装置１０内の第１リードフレーム２におけ
る立上がり部４の変形例であり、この形態では、第１リ
ードフレーム２２の一端側で、両縁に設けられたリード
端子２ｂの突出部位を除き、幅方向に沿って所定角度折
り曲げられてなる立上がり部２４が設けられている。こ
の立上がり部２４は、その両側にテーパ部２４ａを有
し、上記リード端子２ｂから分離している。Embodiment 2 FIG. Next, a second embodiment of the present invention will be described with reference to FIGS. 6 and 7 are an overall plan view and a perspective view, respectively, of the first lead frame in the resin-sealed semiconductor device.
In the following description, the same components as those in the first embodiment are denoted by the same reference numerals, and further description is omitted. The second embodiment is different from the first embodiment.
Is a modified example of the rising portion 4 of the first lead frame 2 in the semiconductor device 10 according to the first embodiment. In this embodiment, at one end side of the first lead frame 22, except for the projecting portions of the lead terminals 2b provided on both edges. And a rising portion 24 which is bent at a predetermined angle along the width direction. The rising portion 24 has tapered portions 24a on both sides thereof and is separated from the lead terminal 2b.
【００１９】この実施の形態２では、上記立上がり部２
４が、第１リードフレームの一端側で、リード端子２ｂ
の突出部位を除く幅にわたって設けられているので、フ
レーム基部２ａ上に伝播しようとするクラックの進行が
より広範囲で抑制され、上記半導体素子５が、上方へ持
ち上げられるモールド樹脂に密着したまま、フレーム基
部２ａから剥離する、あるいは、部分的に剥離して割れ
る惧れは一層軽減される。その結果、装置のより高い信
頼性を確保することができる。In the second embodiment, the rising portion 2
4 is a lead terminal 2b at one end of the first lead frame.
Is provided over the width excluding the protruding portion of the frame, the progress of cracks that propagate on the frame base 2a is suppressed in a wider range, and the semiconductor element 5 is kept in close contact with the mold resin lifted upward. The possibility of peeling from the base 2a or partial peeling and cracking is further reduced. As a result, higher reliability of the device can be secured.
【００２０】なお、本発明は、例示された実施の形態に
限定されるものでなく、本発明の要旨を逸脱しない範囲
において、種々の改良及び設計上の変更が可能であるこ
とは言うまでもない。The present invention is not limited to the illustrated embodiment, and it goes without saying that various improvements and design changes can be made without departing from the spirit of the present invention.
【００２１】[0021]
【発明の効果】以上の説明から明らかなように、本願の
請求項１の発明によれば、所定の電子部品が実装される
リードフレームの一端側で、上記電子部品に対向する部
位に立上がり部が設けられているので、リード端子を介
して電子部品が実装される部位に伝播しようとするクラ
ックの進行を抑制して、上記電子部品が、上方へ持ち上
げられるモールド樹脂に密着したまま剥離して割れる惧
れを軽減することができる。その結果、装置の高い信頼
性を確保し得る。As is apparent from the above description, according to the invention of claim 1 of the present application, the rising portion is provided at one end of the lead frame on which a predetermined electronic component is mounted, at a portion facing the electronic component. Is provided, suppressing the progress of cracks that are to propagate to the site where the electronic component is mounted via the lead terminals, and the electronic component is peeled off while being in close contact with the mold resin that is lifted upward. The fear of cracking can be reduced. As a result, high reliability of the device can be ensured.
【００２２】また、本願の請求項２の発明によれば、立
上がり部が、リードフレームの一端側で、実装された電
子部品に対向する部位若しくはその一部にのみ設けられ
ているので、リード端子を介して、特に電子部品が実装
される部位に伝播しようとするクラックの進行を抑制し
て、上記電子部品が、上方へ持ち上げられるモールド樹
脂に密着したまま剥離して割れる惧れを軽減することが
できる。According to the second aspect of the present invention, since the rising portion is provided only at one end of the lead frame at a portion facing the mounted electronic component or at a part thereof, the lead terminal is provided. In particular, by suppressing the progress of cracks that tend to propagate to the site where the electronic component is mounted, it is possible to reduce the possibility that the electronic component is peeled and cracked while being in close contact with the mold resin that is lifted upward. Can be.
【００２３】更に、本願の請求項３の発明によれば、立
上がり部が、第１リードフレームの一端側で、リード端
子の突出部位を除く幅にわたって設けられているので、
リード端子を介してフレーム基部上に伝播しようとする
クラックの進行をより広範囲で抑制し、フレーム基部に
実装される電子部品が、上方へ持ち上げられるモールド
樹脂に密着したまま剥離して割れる惧れを一層軽減する
ことができる。Further, according to the third aspect of the present invention, the rising portion is provided on one end side of the first lead frame over the width excluding the projecting portion of the lead terminal.
It suppresses the progress of cracks that are going to propagate on the frame base through the lead terminals in a wider range, and the electronic components mounted on the frame base may peel and crack while being in close contact with the mold resin that is lifted upward. It can be further reduced.
【図１】 本発明の実施の形態に係る樹脂封止型半導体
装置の部分的に切り欠かれた全体図である。FIG. 1 is a partially cutaway overall view of a resin-sealed semiconductor device according to an embodiment of the present invention.
【図２】 図１におけるＡ−Ａ線に沿った部分断面説明
図である。FIG. 2 is a partial cross-sectional explanatory view along the line AA in FIG.
【図３】 図１におけるＢ−Ｂ線に沿った部分断面説明
図である。FIG. 3 is an explanatory partial cross-sectional view along the line BB in FIG. 1;
【図４】 上記樹脂封止型半導体装置内で所定の電子部
品が実装されるリードフレームの全体平面図である。FIG. 4 is an overall plan view of a lead frame on which predetermined electronic components are mounted in the resin-sealed semiconductor device.
【図５】 上記リードフレームの斜視図である。FIG. 5 is a perspective view of the lead frame.
【図６】 本発明の他の実施の形態に係るリードフレー
ムの全体斜視図である。FIG. 6 is an overall perspective view of a lead frame according to another embodiment of the present invention.
【図７】 上記他の実施の形態に係るリードフレームの
斜視図である。FIG. 7 is a perspective view of a lead frame according to another embodiment.
【図８】 従来の樹脂封止型半導体装置の部分的に切り
欠かれた全体図である。FIG. 8 is a partially cutaway overall view of a conventional resin-sealed semiconductor device.
【図９】 図８におけるＤ−Ｄ線に沿った部分断面説明
図である。FIG. 9 is an explanatory partial cross-sectional view along the line DD in FIG. 8;
【図１０】 従来の樹脂封止型半導体装置内でリードフ
レームに作用する応力の影響を概略的に示す説明図であ
る。FIG. 10 is an explanatory view schematically showing the influence of stress acting on a lead frame in a conventional resin-encapsulated semiconductor device.
１ モールド樹脂、２ リードフレーム、２ｂ リード
端子、４ 立上がり部、５ 電子部品、１０ 半導体装
置DESCRIPTION OF SYMBOLS 1 Mold resin, 2 lead frame, 2b lead terminal, 4 rising part, 5 electronic components, 10 semiconductor device
Claims (3)
接続用のリード端子を備えるとともに外部機器に対する
取付け時に他端側で固定されるリードフレームが樹脂封
止されてなる樹脂封止型半導体装置において、 上記リードフレームの一端側には、実装された電子部品
に対向する部位の少なくとも一部で所定角度折り曲げら
れてなる立上がり部が設けられていることを特徴とする
封止型半導体装置。1. A resin-sealed semiconductor device comprising: a predetermined electronic component mounted thereon; a lead terminal for external connection provided on one end side; and a lead frame fixed on the other end side when mounted on an external device is resin-sealed. An encapsulated semiconductor device, wherein a rising portion is provided at one end of the lead frame, the rising portion being bent at a predetermined angle at least at a part of a portion facing the mounted electronic component.
の一端側で、実装された電子部品に対向する部位若しく
はその一部にのみ設けられていることを特徴とする請求
項１記載の封止型半導体装置。2. The sealing die according to claim 1, wherein the rising portion is provided only at a portion facing one side of the mounted electronic component or at a part thereof at one end of the lead frame. Semiconductor device.
の一端側で、上記リード端子の突出部位を除き、幅方向
に沿って設けられていることを特徴とする請求項１記載
の封止型半導体装置。3. The encapsulated semiconductor according to claim 1, wherein the rising portion is provided at one end of the lead frame along a width direction except for a protruding portion of the lead terminal. apparatus.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10203099A JP2000036557A (en) | 1998-07-17 | 1998-07-17 | Resin sealed semiconductor device |
| DE19901897A DE19901897A1 (en) | 1998-07-17 | 1999-01-19 | Resin-encapsulated semiconductor component with enclosed lead frame to suppress crack propagation due to stresses, for protecting enclosed semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10203099A JP2000036557A (en) | 1998-07-17 | 1998-07-17 | Resin sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000036557A true JP2000036557A (en) | 2000-02-02 |
Family
ID=16468376
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10203099A Pending JP2000036557A (en) | 1998-07-17 | 1998-07-17 | Resin sealed semiconductor device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2000036557A (en) |
| DE (1) | DE19901897A1 (en) |
-
1998
- 1998-07-17 JP JP10203099A patent/JP2000036557A/en active Pending
-
1999
- 1999-01-19 DE DE19901897A patent/DE19901897A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| DE19901897A1 (en) | 2000-01-27 |
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