JP2000035469A - Semiconductor hall sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor Hall sensor, reduced in offset voltage with no magnetic field applied thereto, and cleared of a measurement error due to the offset voltage. SOLUTION: In this semiconductor Hall sensor, for example, an active layer 2 of N-type silicon is provided, in an island-separated manner, on a semiconductor substrate 1 of P-type silicon, and input-voltage contact layers 3a, 3b of N+ silicon and input-voltage electrodes 6a, 6b are provided on lengthwise both end parts of the active layer 2, respectively. Six voltage-sense contact layers 4a to 4f are provided on widthwise both sides, or three layers per side, of the active layer 2, and voltage-sense electrodes 5a to 5f are formed thereon, respectively. In such a silicon Hall sensor, an appropriate voltage is applied thereto with no magnetic field applied, an output voltage between a pair of electrodes is measured while changing the combination of the voltage-sense electrodes 5a to 5f, three of them disposed per side, and measurement is performed by using a combination of the voltage-sense electrodes that minimizes the offset voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor Hall sensor, and more particularly, to a sensor suitable for a magnetic measurement device using a semiconductor Hall element.

[0002]

2. Description of the Related Art Conventionally, a magnetic measuring device (sensor) using a semiconductor Hall element has been used for detecting and measuring a magnetic field. As semiconductors of such a semiconductor Hall element, gallium arsenide (GaAs) and indium antimony (InS), which output a relatively high Hall voltage V _H, are used.
Compound semiconductors as in b) are used. Further, silicon is used as a semiconductor for applications in which reliability is particularly important.

The offset voltage V _H0, which is a Hall voltage output without applying a magnetic field, is theoretically
It should be 0 (V), but it is not necessarily 0 (V) due to variations in the resistivity of the semiconductor material, variations in the impurity concentration of the diffusion layer, geometric dimensional deviation, or changes in the piezo resistance due to mechanical stress. Did not become.

In the compound semiconductor Hall sensor described above, the Hall voltage V _H at the time of measurement is high, so that even if the offset voltage V _H0 does not become 0 (V), the influence of this voltage on the measurement is small. .

[0005]

[SUMMARY OF THE INVENTION However, in the Hall sensor using silicon as the semiconductor, because the Hall voltage V _H to be sent whenever the measurement is smaller compared to the compound semiconductor Hall sensor, the offset voltage V _H0 mentioned above The effect due to was not negligible in practice.

[0006] For example, the input voltage V _in 2 (V), the applied magnetic field (magnetic flux density) B is the offset voltage V _H0 and the Hall voltage V _H at 0.1 (T) ratio (V _H0 / V _H) is The compound semiconductor Hall sensor is about 0.02, whereas the silicon Hall sensor is about 0.05, which is more than twice, and the measurement error due to the offset voltage V _H0 increases, so high-precision measurement could not be performed. .

SUMMARY OF THE INVENTION The present invention has been made to solve these problems, and it is an object of the present invention to provide a semiconductor Hall sensor in which an offset voltage V _H0 in the absence of a magnetic field is reduced and a measurement error caused by the offset voltage is eliminated. With the goal.

[0008]

According to the present invention, there is provided a semiconductor Hall sensor, comprising: a substrate made of a first conductive semiconductor; and an active semiconductor made of a second conductive semiconductor formed on the semiconductor substrate by island separation. Layer, a pair of input voltage contact layers formed at both ends of the active layer in the first direction, respectively, in contact with the active layer, and input voltage electrodes formed respectively on these input voltage contact layers And the first of the active layers
At least two and at least two pairs of output voltage contact layers formed in contact with the active layer and separated from each other at both ends in a second direction orthogonal to the direction of And a voltage sense electrode that outputs a Hall voltage formed respectively, and selects a combination of the voltage sense electrodes so as to minimize an offset voltage that is a Hall voltage in the absence of a magnetic field, and measures the electrode pair. It is characterized in that it is configured to be used for.

According to the present invention, three or more and two or more pairs of voltage sense electrodes are provided on the output voltage contact layer, respectively. By combining these electrodes, the offset voltage in the absence of a magnetic field can be obtained. Are minimized, the pair of voltage sense electrodes is selected. Then, by performing measurement using these electrode pairs, the offset voltage caused by the non-uniformity of the semiconductor material itself, the geometric dimensional deviation, and the application of mechanical stress is reduced as much as possible, and the offset voltage caused by the offset voltage is reduced. By minimizing the measurement error, highly accurate measurement can be performed.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a plan view showing a schematic configuration of a silicon hole sensor according to an embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a semiconductor substrate made of a first conductive type (for example, P-type) silicon, and a second conductive type (for example, N-type) silicon is provided on the semiconductor substrate 1. The active layer 2 in the form of a rectangular island is provided with island separation. A pair of input voltage contact layers 3 having a high impurity concentration are provided at both ends in the longitudinal direction of the active layer 2.
a, 3b are provided in contact with the active layer 2, and input voltage electrodes 6a, 6b are provided on these input voltage contact layers 3a, 3b. Further, on both sides of the active layer 2 in the width direction, a central position in the longitudinal direction,
A voltage sense contact layer 4 having a high impurity concentration is provided at an appropriate distance (for example, 0.5 μm) on both sides of the central position, and an active layer 2
It is provided so as to be in contact with. Then, a total of six voltage sense contact layers 4a, 4b, 4c, 4 are arranged on each side of the active layer 2 in the width direction, three on each side.
On each of d, 4e and 4f, voltage sense electrodes 5a, 5b, 5c, 5d, 5e, made of a metal such as Al, respectively.
5f is formed and wired. Further, an insulating protective film (not shown) such as silicon oxide having an opening at a predetermined position is formed on the entire surface thereof.
A bonding pad is formed in the opening of the insulating protective film.

In the silicon Hall sensor having such a structure, an appropriate input voltage is applied between the input voltage contact layers 3a and 3b without applying a magnetic field, and three voltage sense electrodes (5a and 5b) are provided on each side. , 5c and 5d,
By changing the combination of 5e and 5f), the output voltage (offset voltage) between each pair of sense electrodes is measured. Then, a combination of voltage sensing electrodes (for example, a combination of 5b and 5f) that minimizes the offset voltage is selected, and measurement is performed by the electrode pair.

In the silicon Hall sensor of the embodiment configured as described above, the Hall voltage is output and the measurement is performed by the combination of the voltage sense electrodes that minimizes the offset voltage in the absence of a magnetic field. Is minimized, and highly accurate measurement can be performed.

Next, a specific example of manufacturing the silicon Hall sensor of the embodiment will be described. After an N-type silicon layer having a specific resistance of 1Ω-cm and a thickness of 5 μm is formed on a P-type silicon semiconductor substrate 1 by epitaxial growth, a silicon oxide film is formed on the N-type silicon layer by thermal oxidation. Opening of a window of the silicon oxide film by etching was performed in order, and then impurity diffusion was performed. Then, an isolated island-shaped region having a length of 200 μm, a width of 180 μm, and a thickness of 5 μm was formed by covering the outside with a P ⁺ diffusion layer and forming an isolated region.

Next, impurity diffusion is performed on the regions in contact with both ends of the active layer 2 in the longitudinal direction, so that the input voltage contact layers 3a and 3b serve as the input voltage contact layers 3a and 3b, each having a width of 180 μm and a length of 5 μm.
An N ⁺ contact layer having a thickness of 0.5 μm and a depth of 0.5 μm was formed. Impurity diffusion is carried out in the central region in the longitudinal direction on both sides of the active layer 2 in the width direction, and a total of six N ⁺ sense contact layers (0.5 μm in width and 3 μm in length, three on each side) are formed.
5 μm and a depth of 0.5 μm) were formed at a pitch of 0.5 μm such that one end was in contact with the active layer 2. Further, Al is vapor-deposited on these N ⁺ contact layers, and then the vapor-deposited film is photo-etched to form the input voltage electrodes 6a, 6b and the voltage sense electrodes 5a, 5b, 5c, 5c.
Wirings d, 5e, and 5f were respectively formed. Next, a plasma CVD method (chemical vapor deposition method) is applied to the entire surface of the substrate.
After forming an insulating protective film (thickness: 1 μm) of silicon oxide or the like, an opening was formed in a predetermined position of the insulating protective film, and a bonding pad was formed in the opening.

Further, the back surface of the semiconductor substrate 1 is wrapped, and a gold alloy is vapor-deposited as a finish having a thickness of 250 μm. The silicon Hall element chip thus obtained is mounted on a lead frame, and wire bonding is performed. Assembled in a mold flat package (SSOP 24 pins).

Next, in the silicon Hall sensor manufactured as, with no added field, the input voltage V _in of ± 2 (V) is applied an input voltage electrodes 6a, between 6b,
The output voltage (offset voltage V _H0 ) between these sense electrodes was measured while changing the combination of three voltage sense electrodes (set of 5a, 5b, 5c and set of 5d, 5e, 5f) on each side. . The measurement results, the input voltage V _in the horizontal axis, the vertical axis of the offset voltage V _HO taken respectively, shown in FIG.

As shown in the figure, in the silicon Hall sensor of the embodiment, the offset voltage V _H0 when the voltage sense electrodes 5b and 5f are combined is different from the conventional voltage sense electrode combination (5b and 5e). ), Which is a minimum value of about の of the offset voltage, and it is understood that it is desirable to select these electrode pairs and measure the Hall voltage. Then, when the magnetic field was actually detected and measured using this electrode pair, a highly accurate measurement with little error could be performed.

In the above embodiment, an example was shown in which a total of six voltage sensing electrodes 5 were provided, three on each side, but a total of two or more electrodes were arranged on either side. If the number is three or more, the effect of the present invention can be improved regardless of the number of electrodes. In addition, the size, depth, and arrangement interval of the voltage sense contact layer 4 can be variously adjusted and changed. Further, the present invention relates to SOI (Siic
The present invention can be applied to a semiconductor element formed by using an on-on-insulator technique.

[0021]

As is apparent from the above description, in the semiconductor Hall sensor of the present invention, by combining a plurality of voltage sense electrodes, the combination of electrodes that minimizes the offset voltage in the absence of a magnetic field can be selected. By performing measurement using these electrode pairs, the offset voltage caused by the non-uniformity of the semiconductor material itself and the application of mechanical stress can be reduced as much as possible, and highly accurate measurement can be performed.

[Brief description of the drawings]

FIG. 1 is a plan view showing a schematic configuration of a silicon Hall sensor according to one embodiment of the present invention.

[2] In the silicon Hall sensor embodiment, when applying the input voltage V _in of ± 2 (V) in a field-free condition,
4 is a graph showing an output voltage (offset voltage V _H0 ) between voltage sense electrodes.

[Description of Signs] 1... First conductive silicon semiconductor substrate 2... Active layer 3a, 3b made of second conductive silicon 3... Input voltage contact layer 4. Sense contact layer 5 Voltage sense electrode 6a, 6b Input voltage electrode

Claims (2)

[Claims] 1. A substrate comprising a semiconductor of a first conductivity type;
An active layer made of a second conductive type semiconductor formed on the semiconductor substrate by island separation, and a pair of inputs formed at both ends of the active layer in the first direction in contact with the active layer, respectively; A voltage contact layer, an input voltage electrode formed on each of these input voltage contact layers, and both ends of the active layer in a second direction orthogonal to the first direction, in contact with the active layer, respectively. 3 formed separately from each other
And at least two pairs of output voltage contact layers, and voltage sense electrodes each configured to output a Hall voltage formed on these output voltage contact layers, so that an offset voltage, which is a Hall voltage in the absence of a magnetic field, is minimized. A semiconductor Hall sensor, wherein a combination of the voltage sensing electrodes is selected and the pair of electrodes is used for measurement. 2. The semiconductor Hall sensor according to claim 1, wherein said semiconductor is silicon.