JP2004296469A - Hall element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve detection sensitivity by reducing a recombination current in an interface when an SOI substrate is used. <P>SOLUTION: A current path 16 into which impurities are introduced at a predetermined concentration is provided on a semiconductor layer 15 of the SOI substrate 12, and high concentration n-type regions 17 are formed at four corners thereof. An electrode film 19 composed of polycrystalline silicon is formed on the upper part of the current path 16 via an insulating film 18. By applying voltages to the film 19 and a supporting substrate 13, depletion layers 20a, 20b are formed on the surface layer and the bottom of the current path 16. The recombination current at an interface can be suppressed at the time of measuring a hall voltage. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a Hall element that detects a Hall voltage generated when a magnetic field acts on a current path formed on a semiconductor substrate.
[0002]
[Prior art]
For example, as shown in FIG. 3, the Hall element forms an n-type diffusion layer 2 on a p-type semiconductor substrate 1, and forms a high-concentration impurity region 3 at both ends of the diffusion layer 2. Is configured to detect a magnetic field acting in the vertical direction of the semiconductor substrate 1 by detecting a voltage generated in a diagonal direction while a current is flowing linearly.
[0003]
In such a detection structure, a current flows in the n-type diffusion layer 2 in the lateral direction by applying a reverse bias to the p-type semiconductor substrate 1 side. In this configuration, a pn junction is used. However, there is a problem that the leak current at a high temperature increases and the measurement under a high temperature environment is difficult.
[0004]
In order to avoid such a problem, for example, an oxide film is formed on a silicon substrate, and an n-type or p-type semiconductor layer for forming a Hall element is formed thereon by a method such as CVD or thermal diffusion. And a high-concentration layer for forming an ohmic contact is formed in the metal contact portion (for example, see Patent Document 1).
[0005]
This is a so-called SOI (Silicon On Insulator) substrate, which has a structure in which a semiconductor layer is formed on an insulating substrate and impurities are introduced into the semiconductor layer, so that a pn junction for element isolation is not used. Therefore, the measurement can be performed even in a high-temperature environment without the leakage current caused by the pn junction.
[0006]
[Patent Document 1]
JP-A-5-335649
[Problems to be solved by the invention]
However, in the above-described conventional technology, although the leakage current due to the pn junction can be reduced, the leakage current due to the interface state at the interface between the semiconductor layer and the insulating layer, that is, the re-current at the interface, can be reduced. The coupling current could not be excluded.
[0008]
In addition, since the process of forming a conductive layer by diffusing impurities into the semiconductor layer is employed, the distribution of the impurity concentration in the diffusion depth direction cannot be made uniform, and the side closer to the diffusion source has a high concentration. As a result, the sheet resistance becomes lower, so that the current easily flows near the surface layer. For this reason, there is a problem that the mobility of carriers in the surface layer portion having a high impurity concentration becomes low, and the detection sensitivity is lowered.
[0009]
Although the above-described problem cannot be achieved with high detection sensitivity, a configuration using a silicon substrate on which a detection circuit portion and the like can be easily integrally formed remains as a technical problem to be solved.
[0010]
The present invention has been made in view of the above circumstances, and an object of the present invention is to avoid a problem caused by a high concentration in the vicinity of a surface layer even when employing a configuration using a semiconductor layer for introducing impurities by diffusion. It is an object of the present invention to provide a Hall element having a structure capable of performing the above operation.
[0011]
[Means for Solving the Problems]
According to the first aspect of the present invention, a current path is formed in the semiconductor layer formed in a state insulated from the supporting substrate, and when a magnetic field acts in a direction perpendicular to the surface of the semiconductor layer, the current path is thereby formed. Since the flowing current carrier is bent by receiving Lorentz force, a Hall voltage corresponding to the strength of the magnetic field is generated on both sides of the current path. At this time, in the current path, by applying a voltage to the electrode to form a depletion layer, a recombination current generated at at least one interface between the surface portion and the bottom portion of the semiconductor layer can be suppressed. become. As a result, the detection sensitivity can be improved by an amount corresponding to the reduction in the component of the recombination current.
[0012]
According to the second aspect of the present invention, in the first aspect of the present invention, since the SOI substrate is used as the semiconductor substrate, it can be manufactured by using a silicon-based manufacturing process by using silicon as a semiconductor layer. In addition to this, an integrated circuit in which other circuit elements are integrally formed can be easily formed.
[0013]
According to the third aspect of the present invention, in each of the above aspects, the current path is formed by diffusing an impurity into the semiconductor layer, so that the semiconductor substrate on which the semiconductor layer suitable for another circuit component is formed. Can be formed. Also, due to the formation of a current path by such diffusion, even when a current path that allows concentration distribution in the depth direction is adopted in the semiconductor layer, a voltage is applied to the electrode to form a depletion layer. Since the measurement can be performed in a state of being depleted, the detection accuracy can be improved by forming a high-concentration region into a depletion layer.
[0014]
According to the invention of claim 4, in the invention of claim 2 or 3, the electrode is provided as an electrode film formed via an insulating film on the semiconductor layer forming the current path. It is possible to form a depletion layer in a region where impurities are highly concentrated, and it is possible to use a simple silicon wafer manufacturing process while making it possible to configure an electrode for forming the depletion layer by adding a simple process. Therefore, it can be achieved at low cost.
[0015]
According to a fifth aspect of the present invention, in the above-mentioned second to fourth aspects, the semiconductor is positioned via the insulating film by applying a voltage to the support substrate constituting the semiconductor substrate. Since a depletion layer is formed in the current path of the layer, recombination current generated at both the interface on the surface side and the bottom side of the semiconductor layer forming the current path can be reduced, and the detection accuracy can be improved. In addition, the electrodes can be formed easily and inexpensively.
[0016]
According to the invention of claim 6, in each of the above inventions, the trench is formed in the semiconductor layer forming the current path so as to surround the current path and reach the insulating film. Even in the case of receiving compressive or tensile stress due to fluctuation of stress, it becomes possible to release the stress in the trench portion, thereby suppressing adverse effects due to piezoresistance effect such as fluctuation of resistance value due to stress. It is possible to prevent the detection accuracy from being lowered.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIG.
FIG. 1A schematically shows a longitudinal side surface of a Hall element 11 according to the present invention, and FIG. 1B is a diagram viewed from above.
[0018]
The SOI substrate 12 as a semiconductor substrate has a silicon oxide film (SiO 2) film 14 as an insulating film formed on a silicon substrate 13 as a supporting substrate, and a semiconductor layer 15 made of single-crystal silicon is formed thereon. Things. For example, it is formed by a bonding method or the like.
[0019]
A current path 16 is formed by introducing an n-type impurity into the semiconductor layer 15 of the SOI substrate 12 into a predetermined pattern for forming a Hall element, for example, a shape crossing diagonally as indicated by a broken line region in FIG. Is formed. High-concentration n-type regions 17 into which impurities are introduced at a high concentration for ohmic contact are formed at four ends of the current path 16.
[0020]
An insulating film 18 such as a thermal oxide film is formed on the entire upper surface of the semiconductor layer 15, and an electrode film 19 for forming a depletion layer is formed thereon using a polycrystalline silicon film or the like. The electrode film 19 is patterned so as to cover the upper part of the current path 16 as shown. A part of the electrode film 19 is provided with a bonding pad 19a and is formed as a terminal G1. The support substrate 13 functions as an electrode and serves as a terminal G2.
[0021]
The high-concentration n-type regions 17 arranged on all sides of the current path 16 are provided with electrode terminals A, B, C, and D formed of an aluminum film or the like. Among the electrode terminals A to D, one of the opposed electrodes A and B is a terminal for flowing a current in one diagonal direction of the current path 16, and the other opposed electrodes C and D are provided with a Hall voltage. Is a terminal for detecting.
[0022]
According to the above configuration, when a predetermined current is applied between the terminals A and B, a Hall voltage generated between the terminals C and D is detected to detect the magnitude of the magnetic field acting on the surface of the Hall element 11 in the vertical direction. The direction can be measured. At this time, by applying a voltage lower than the potentials of the other terminals A to D to the electrodes G1 and G2, the depletion layers 20a and 20b can be formed in the semiconductor layer 15 forming the current path 16. .
[0023]
By forming the depletion layers 20a and 20b in this way, the region where the current flows in the current path 16 is narrowed, but the current flows at both the interface portion of the insulating film 18 and the interface portion of the insulating film 14. Therefore, the recombination current can be reduced, and thereby the detection sensitivity can be improved.
[0024]
Further, by forming the depletion layer 20a by the electrode film 19, the region with a high impurity concentration in the surface layer portion of the current path 16 can be depleted and measurement can be performed so that current does not flow. , The decrease in mobility and the decrease in Hall sensitivity due to the influence of the above can be suppressed.
[0025]
Next, the manufacturing process of the above-described Hall element 11 will be briefly described.
An n-type region of a current path 16 functioning as a Hall element is formed in the semiconductor layer 15 on the semiconductor substrate 12 formed by the bonding method. Here, for example, it is assumed that the semiconductor layer 15 is provided as a low-impurity, high-resistance layer in which no impurity is introduced. For example, phosphorus (P) or arsenic (As) is introduced as an n-type impurity. I do. The ion implantation method or the diffusion method from phosphorus glass is used.
[0026]
Thereafter, in order to form a high-concentration n-type region 17 for forming an ohmic contact when forming terminals A to D as metal wirings, an ion implantation method or This is performed by diffusion from phosphor glass. As a result, a high-concentration n-type region 17 is formed at a position corresponding to the terminals A to D.
[0027]
Next, a thin oxide film 18 is formed by slightly oxidizing the surface of the semiconductor substrate 12, that is, the upper surface of the semiconductor layer 15. Subsequently, an electrode film 19 for controlling the formation of a depletion layer in the surface portion of the semiconductor layer 15 is formed. Further, an insulating film is deposited on the whole, contact portions are opened, an aluminum film is formed on the entire surface by a method such as vapor deposition, and a terminal electrode having a predetermined shape is formed by patterning by photolithography.
[0028]
Note that a high-concentration p-type region is also formed on the rear surface side as necessary to obtain the terminal G2 on the support substrate 13 on the rear surface side. The actual terminal can be the terminal G2 from the lead frame side where the chip is die-bonded. Then, a chip of the Hall element 11 can be obtained through the above manufacturing steps.
[0029]
According to the first embodiment, the depletion layers 20a and 20b can be formed on the surface layer and the bottom of the current path 16 by applying a voltage to the terminals G1 and G2 when measuring the Hall voltage. In addition, it is possible to measure the interface portion between the upper and lower insulating films 14 and 18 of the current path 16 without passing a current, thereby reducing the recombination current at the interface portion and improving the detection sensitivity. Will be able to do it.
[0030]
Further, by forming the depletion layer 20a, it is possible to prevent a current from flowing in a region having a high impurity concentration in the surface layer portion of the current path 16, thereby suppressing a decrease in mobility and a decrease in hole sensitivity due to the influence of the surface high concentration layer. be able to.
[0031]
(Second embodiment)
FIG. 2 shows a second embodiment of the present invention. Hereinafter, portions different from the first embodiment will be described.
In this configuration, the basic configuration of the Hall element 21 for measuring the Hall effect is substantially the same as that of the first embodiment, except that the trench 22 is formed in the semiconductor layer 15 forming the configuration. different.
[0032]
The SOI substrate 12 as a semiconductor substrate has a configuration in which an insulating film 14 is interposed between a support substrate 13 and a semiconductor layer 15. It has a structure that is easily deformed by receiving compressive stress. Thus, for example, if the current path 16 is distorted by stress, the resistance value will change due to the piezoresistance effect, and the detection accuracy will change. In the second embodiment, a configuration in which the trench 22 is provided to solve this point is adopted.
[0033]
That is, as shown in FIG. 2, a trench 22 is formed around the region where the Hall element 21 is formed so as to reach the insulating film 14, and the insulating film 18 is embedded in the trench 22. As a result, the semiconductor layer 15 becomes discontinuous at the trench 22 and the stress can be released at the trench 22.
[0034]
As a result, with respect to the problem that the offset voltage fluctuates due to the influence of the stress from the semiconductor substrate 12, it is possible to adopt a structure in which the fluctuation is suppressed by performing the stress relaxation in the above structure, and to improve the measurement accuracy. become able to.
[0035]
The present invention is not limited to the embodiment described above and shown in the drawings, and the following modifications are possible.
In the above embodiments, the depletion layers 20a and 20b are formed together. However, the electrode 19 and the terminal from the support substrate 13 may be provided as necessary so that only one of them is formed. it can. Preferably, when only one of them is provided, the provision of the electrode 19 provides excellent characteristics in that measurement can be performed without using a high-concentration region.
[0036]
Although an example in which a p-type support substrate 13 is used as the semiconductor substrate 12 has been described, an n-type support substrate may be used. Further, the semiconductor layer 15 is not limited to the n-type, but may be a p-type.
The planar shape of the current path 16 is not limited to the above-described pattern, and may be a rectangular shape, or may be formed in an appropriate shape as needed.
[Brief description of the drawings]
FIG. 1 is a schematic longitudinal sectional side view and a plan view showing a first embodiment of the present invention. FIG. 2 is a diagram corresponding to FIG. 1 showing a second embodiment of the present invention. FIG. 1 equivalent diagram [Explanation of reference numerals]
Reference numerals 11 and 21 denote Hall elements, 12 an SOI substrate (semiconductor substrate), 13 a support substrate, 14 an insulating film, 15 a semiconductor layer, 16 a current path, 17 a high-concentration n-type region, 18 an insulating film, 19 Is an electrode film (electrode), 20a and 20b are depletion layers, and 22 is a trench.

Claims (6)

A semiconductor substrate on which a semiconductor layer is formed in a state insulated from the supporting substrate;
A current path formed in a semiconductor layer of the semiconductor substrate and energized in a direction parallel to a plane of the layer;
A terminal for detecting a Hall voltage generated in a current flowing through the current path by a magnetic field acting in a direction orthogonal to a surface of the semiconductor layer of the semiconductor substrate;
An electrode for forming a depletion layer on at least one of a surface layer portion and a bottom surface portion of the semiconductor layer forming the current path. The Hall element according to claim 1,
A Hall element using an SOI (Silicon On Insulator) substrate formed by a bonding method as the semiconductor substrate. The Hall element according to claim 1 or 2,
The Hall element according to claim 1, wherein the current path is formed by diffusing an impurity into the semiconductor layer. The Hall element according to claim 2 or 3,
The Hall element, wherein the electrode is an electrode film formed above a semiconductor layer forming the current path via an insulating film. The Hall element according to any one of claims 2 to 4,
The electrode is configured to form a depletion layer in a current path of the semiconductor layer located via the insulating film by applying a voltage to a support substrate forming the semiconductor substrate. A Hall element characterized by the above-mentioned. The Hall element according to any one of claims 1 to 5,
A hall element, wherein a trench is formed in the semiconductor layer forming the current path so as to surround the semiconductor layer and reach an insulating film.

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