JP2000035453A - Reliability evaluating method and reliability evaluating device for multilayer printed wiring board and probe for interlayer resistance measurement for multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reliability evaluating method and a reliability evaluating device for a multilayer printed wiring board and a probe for interlayer resistance measurement for a multilayer wiring board, making it possible to make sure of a value of individual insulation resistance of each layer by a simple structure. SOLUTION: A plurality of electrodes L1 to L8 are exposedly provided on a top-layer board surface, respective patterns on plurally layered printed circuit boards including a printed circuit board Pw1 are connected to the electrodes L1 to L8 via through holes TH2 to TH8, respectively, and the electrodes L1 to L8 are connected in series with each other by exposed connection parts Cn12 to Cn78. By this method, when any of the respective connection parts is not cut off, all the patterns are connected with each other, and therefore, reliability evaluation of the whole is made at a stroke by measuring an insulation resistance value or continuity, and then, reliability evaluation between desired patterns is separately performed by measuring an insulation resistance value or continuity after a desired connection part is successively cut off.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for evaluating the reliability of a multilayer printed wiring board, and a method of evaluating the reliability of the multilayer printed wiring board. The present invention relates to a measurement probe.

[0002]

2. Description of the Related Art In recent years, portable information terminals such as notebook personal computers, and various other information communication devices, etc., are in the midst of technological innovation such as miniaturization due to thinness and light weight, and further increase in signal speed. There is a strong demand for high-density and high-reliability mounting technology.

Conventionally, multilayer printed wiring boards have been used to increase the mounting density of wiring portions. However, in recent years, stricter reliability evaluations such as migration resistance have been required due to thinner boards and finer patterns. Therefore, a reliability evaluation device provided with a reliability evaluation pattern for a multilayer printed wiring board has been applied.

FIG. 12 is a top view of an example of a reliability evaluation apparatus for a multilayer printed wiring board having such a conventional reliability evaluation pattern. In the reliability evaluation device 200, a plurality of layers on which reliability evaluation patterns are respectively arranged are stacked, and the reliability evaluation patterns are formed at the same position on all the layers. FIG. 12 shows the exposed uppermost pattern Pw211.

[0005] Among the layers, the odd-numbered patterns are electrically connected by through holes TH211. The through holes TH211 are connected to the electrodes L211 provided on the uppermost (first layer) substrate. . Further, among the respective layers, each pattern of the even-numbered layer is a through hole TH212.
And through holes TH
212 denotes an electrode L provided on the uppermost (first layer) substrate.
212.

As described above, the circuit in which the through-hole TH211 connected to each of the odd-numbered layers is connected to the electrode L211 on the first layer, and the through-hole TH212 in which the even-numbered layers are connected to the first layer. Two circuits are provided, one for the circuit connected to the electrode L212 on the layer, and the other for the electrode L21.
The measurement of the insulation resistance value and the continuity between L1 and L212 have been performed.

Another example of a reliability evaluation device is shown in a perspective view of FIG. Reliability evaluation device 2
Reference numeral 20 indicates that each of the laminated inner layers 231 to 236 has a pair of patterns. Normally, there is no conduction between the two patterns, and the layer 20 has a high insulation resistance value. One of the patterns of each inner layer is connected in series by a through hole TH221 and is connected to an electrode L221 that is exposed and disposed on the first layer. The other of the patterns of the respective inner layers is connected in series by a common through hole TH222 penetrating the respective inner layers, and is connected to an electrode L222 exposed and disposed on the first layer.

Then, the measurement of the insulation resistance between the two electrodes L221 and L222 and the continuity were measured.

[0009]

However, in the conventional techniques such as the reliability evaluation apparatuses 200 and 220 shown as examples above, only a plurality of layers are collectively electrically connected and only electrodes are provided. Therefore, although it is possible to confirm the occurrence of a defect, it is impossible to confirm a single insulation resistance value for each layer, and thus it is not suitable for specifying a layer in which a defect occurs.

[0010] For this reason, in order to analyze the generation layer, it is necessary to identify the defect generation layer and the place of occurrence by repeating the operation of deleting the layers one by one with sandpaper or the like, which requires a great deal of labor and time for the analysis. As a result, there has been a problem that a quick result cannot be obtained and the cost increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems in the prior art, and it is possible to confirm a single insulation resistance value for each layer with a simple structure. It is an object of the present invention to provide a method for evaluating reliability, a device for evaluating reliability, and a probe for measuring an interlayer resistance of a multilayer wiring board.

[0012]

According to the present invention, there is provided an apparatus for evaluating reliability of a multilayer printed wiring board, comprising a plurality of substrates each having a plurality of substrates each having a pair of patterns having insulation resistance therebetween. A device for evaluating the reliability of a wiring board, wherein a plurality of electrodes and a common electrode are disposed so as to be exposed on an exposed plate surface of the substrate, and each of the patterns of each set on each layer serving as an inner layer in the lamination is formed. One is connected to any one of the plurality of electrodes via a through hole, and the other one of the set of patterns on each of the inner layers is connected to the common electrode via a through hole, and The connecting portion exposed on the plate surface of the substrate connects the electrodes in series.

According to the above configuration, since the connection portion is exposed, the disconnection is facilitated. Therefore, the electrical disconnection of each layer pattern from other layer patterns by successive disconnection of each connection portion is facilitated. Done.

According to the method for evaluating the reliability of a multilayer printed wiring board according to the present invention, a plurality of substrates each having a set of patterns having insulation resistance between each other are laminated as layers, and are exposed on the exposed surface of the substrate. A plurality of electrodes are disposed so as to be exposed, and one of the pair of patterns on each layer serving as an inner layer in the stack is connected to one of the plurality of electrodes via a through hole, respectively, and the inner layer and The other end of each set of patterns on each layer is connected to the common electrode via a through-hole, and a connecting portion exposed on the plate surface of the substrate connects between the electrodes. Using a multi-layer printed wiring board reliability evaluation device configured to be connected in series, cut any exposed portion connected in the series, the cut one of the electrodes, and between the common electrode The resistance or continuity of The features.

According to the above-described method, since all the patterns are connected in a state where the connection portions are not disconnected, the entire reliability is evaluated at once by measuring the insulation resistance value or continuity. The reliability evaluation between the desired patterns is individually performed by measuring the insulation resistance value or the continuity after the sequential cutting.

Alternatively, a reliability evaluation apparatus for a multilayer printed wiring board according to the present invention is a reliability evaluation apparatus for a multilayer printed wiring board in which a plurality of substrates each having a pattern are laminated as layers. A plurality of electrodes are exposed on the plate surface of the substrate, and the patterns on each layer serving as an inner layer in the lamination are connected to any of the plurality of electrodes via through holes, respectively, and the substrate The corresponding electrodes are connected in series so that the connection portions exposed on the surface of the substrate connect the layers one by one, and are further exposed on the surface of the substrate. The other connected parts are
It is characterized in that the corresponding electrodes are connected in series so as to connect the unconnected layers to the connection portion.

According to the above configuration, since both connection portions are exposed, the respective connection portions can be easily cut. Therefore, the desired layer pattern can be easily cut by sequentially cutting the desired portions of both connection portions from the other layer patterns. Electrical disconnection is facilitated.

Alternatively, in the method for evaluating the reliability of a multilayer printed wiring board according to the present invention, a plurality of substrates each having a pattern are laminated as layers, and a plurality of electrodes are exposed and arranged on the exposed surface of the substrate. A connection part provided on each of the plurality of layers, which is an inner layer in the lamination, is connected to any of the plurality of electrodes via a through-hole, and is exposed on the plate surface of the substrate. Is connected to each of the corresponding electrodes in series so that the layers are connected one by one, and another connecting portion exposed and disposed on the plate surface of the substrate is the connecting portion. To connect each of the unconnected layers, using a multilayer printed wiring board reliability evaluation device having a configuration in which the corresponding electrodes are connected in series, the one of the exposed portions connected in series is connected. Cut and cut one side And measuring said electrodes, the resistance value or conduction between series connected the electrodes of the other.

According to the above-described method, the insulation resistance or conduction between all layers is measured at a time without disconnecting each connection, and then the insulation resistance or conduction between desired layers is determined by sequentially cutting the desired connection. Are measured individually.

Alternatively, the reliability evaluation apparatus for a multilayer printed wiring board according to the present invention is a reliability evaluation apparatus for a multilayer printed wiring board in which a plurality of substrates each having a pattern are laminated as layers. A plurality of electrodes are exposed on the plate surface of the substrate, and the pattern on each layer serving as an inner layer in the lamination is connected to any one of the plurality of electrodes via a through hole. I do.

According to the above configuration, all the electrodes, each of which is electrically connected to the pattern of each layer, are provided in an exposed state on the exposed substrate surface, so that the measuring operation is facilitated.

Alternatively, in the method for evaluating the reliability of a multilayer printed wiring board according to the present invention, a plurality of substrates each having a pattern are laminated as layers, and a plurality of electrodes are exposed and arranged on the exposed surface of the substrate. Provided, using a reliability evaluation apparatus for a multilayer printed wiring board having a configuration in which the pattern on each layer serving as an inner layer in the lamination is connected to any one of the plurality of electrodes via a through hole, The method is characterized in that a resistance value or continuity between two electrodes to which the adjacent two layers are connected is measured.

According to the above-described method, the measurement between any desired electrodes is performed, and the resistance value or continuity between any desired layers is evaluated.

The probe for measuring the interlayer resistance of a multilayer wiring board according to the present invention has at least one set of measurement input signals each of a plurality of electrodes respectively connected to patterns on each layer constituting the multilayer wiring board. A probe for measuring an interlayer resistance of a multilayer wiring board having terminals, comprising a plurality of ends each capable of contacting each of the electrodes, and a switch connected to each of the ends, and Connecting each end, which can be respectively contacted with each of the electrodes respectively connected to the pattern on each layer one by one, to one of the set of measurement input terminals via the switch, Each end other than the above, which can be in contact with each of the electrodes other than the above, is connected to the other one of the set of measurement input terminals via a switch other than the above, respectively. Features.

According to the above configuration, only an arbitrary electrode is connected to the measurement input terminal by opening and closing each switch.

In the method for measuring the interlayer resistance of a multilayer wiring board according to the present invention, each of a plurality of electrodes respectively connected to patterns on each layer constituting the multilayer wiring board is to be measured, and at least one set of measurement input terminals is provided. And a plurality of ends respectively contactable with each of the electrodes, and a switch connected to each of the ends, respectively, and each of the electrodes is connected to a pattern on each layer one by one. Each of the ends that can be in contact with each of the electrodes is connected to one of the set of measurement input terminals through the switch, respectively, and each of the other ends can be in contact with each of the other electrodes. Each end of the switch is connected to the other one of the set of measurement input terminals via a switch other than the above, using a probe for measuring an interlayer resistance of a multilayer wiring board, the switch being connected to each of the switches. At least by opening and closing Only two ends of the two electrodes that are respectively in contact with the two electrodes connected to the two adjacent layers are connected to each of the measurement input terminals. It is characterized in that the resistance between the layers is measured.

According to the above-described method, the contact state of the end portion with the electrode is not changed, and only by opening and closing each switch,
Two electrodes connected to any two adjacent layers are connected to a measurement input terminal, and the resistance between the two layers is measured.

Alternatively, an apparatus for evaluating the reliability of a multilayer printed wiring board according to the present invention is a multilayer printed wiring board comprising a pattern, and a plurality of substrates each having an insulation resistance between the pattern and the common through hole are laminated as layers. A plurality of electrodes and a common electrode are disposed to be exposed on the exposed plate surface of the substrate, and the pattern on each layer serving as an inner layer in the lamination is formed through a through hole. Each of the plurality of electrodes is connected to one of the plurality of electrodes, the common through-hole is connected to the common electrode, and a connecting portion exposed on the board surface of the substrate connects the electrodes in series. The configuration is characterized.

According to the above-described structure, the connection portion is easily cut because the connection portion is exposed. Therefore, the electrical disconnection of the pattern of each layer from the pattern of another layer by the sequential disconnection of each connection portion is easy. Done.

Alternatively, the method for evaluating the reliability of a multilayer printed wiring board according to the present invention is characterized in that a plurality of substrates each having a pattern and having insulation resistance between the pattern and the common through hole are laminated as layers, and the exposed substrate is A plurality of electrodes and a common electrode are disposed on the plate surface in an exposed manner, and the patterns on each layer serving as an inner layer in the lamination are connected to any of the plurality of electrodes via through holes, respectively. A through hole is connected to the common electrode, and a connection portion exposed and disposed on the board surface of the substrate uses a reliability evaluation apparatus for a multilayer printed wiring board having a configuration in which the electrodes are connected in series. And cutting the series of connected exposed portions and measuring a resistance value or conduction between the cut-side electrode and the common electrode.

According to the above-mentioned method, since all the patterns are connected in a state where each connection portion is not disconnected, the insulation resistance value or continuity with the common through hole is measured, so that the whole reliability evaluation is performed at once. Then, after sequentially cutting the desired connection portions, the insulation resistance or conduction between the desired pattern and the common through hole is measured, whereby the reliability of each inner layer is evaluated individually.

[0032]

Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. The embodiment described below is a part of a preferred embodiment of the present invention,
Although various limitations that are preferable in terms of the technical configuration are given, the scope of the present invention is not limited to these embodiments unless otherwise specified in the following description.

The first embodiment of the present invention is a reliability evaluation apparatus applied to the measurement of insulation resistance between patterns on each layer of a multilayer printed wiring board. The configuration is shown in FIGS.

FIG. 1 is a top view of a first embodiment of the reliability evaluation apparatus for a multilayer printed wiring board according to the present invention. FIG.
FIG. 2 is a circuit diagram of a first layer of the reliability evaluation device shown in FIG. FIG. 3 is a top view of a second layer of the reliability evaluation device shown in FIG. FIG. 4 is a circuit diagram of a second layer of the reliability evaluation device shown in FIG. FIG. 5 is a top view of a third layer of the reliability evaluation device shown in FIG. FIG. 6 is a top view of the fourth layer of the reliability evaluation device shown in FIG. FIG.
3 is a circuit diagram of first to fourth layers of the reliability evaluation device shown in FIG.

The apparatus and method for evaluating the reliability of a multilayer printed wiring board according to the first embodiment will be described below with reference to the drawings.

The multilayer printed wiring board reliability evaluation apparatus U1 according to the first embodiment includes a first layer printed circuit board Pw1.
To an eighth-layer printed circuit board Pw8 (not shown).

The first-layer printed circuit board Pw1 is the uppermost layer, and has a group A pattern Apt1 and a group B pattern B on the board surface.
pt1 is provided as a printed circuit. The A-group pattern Apt1 and the B-group pattern Bpt1 have high insulation resistance and are electrically separated from each other, and if normal, there is no conduction between them.

The common electrode LC is exposed on the plate surface, and the group A pattern Apt1 is collectively connected to the common electrode LC. On the other hand, the common electrode LC is connected to the common through hole CTH, and the common through hole CTH is connected to and penetrates each layer from the first-layer printed circuit board Pw1 to the eighth-layer printed circuit board Pw8.

The first layer electrode L1 is further exposed on the plate surface, and the group B pattern Bpt1 is collectively connected to the first layer electrode L1.

Further, the second layer electrodes L2 to L2
The eighth layer electrodes L8 are all exposed.
The second-layer electrode L2 is connected to the first-layer printed circuit board Pw1.
And a second-layer through hole TH2 that connects between the second-layer printed circuit board Pw2 and the second-layer printed circuit board Pw2.

The third-layer electrode L3 is connected to a third-layer through hole TH3 for connecting the first-layer printed circuit board Pw1 to the third-layer printed circuit board Pw3. The fourth-layer electrode L4 has a first-layer printed circuit board P
w1 and the fourth connecting the fourth layer printed circuit board Pw4
The layer through hole TH4 is connected.

As described above, when j = 2 to 8, the j-th layer electrode Lj is provided with the j-th layer through hole THj for connecting the first-layer printed circuit board Pw1 and the j-th printed circuit board Pwj. It is connected.

Further, assuming that k = 1 to 7, the connection portion Cnkk is provided between the k-th layer electrode Lk and the (k + 1) -th layer electrode Lk + 1.
They are connected by +1. Thus, the connection part Cnk
The first layer electrode L1 to the eighth layer electrode L8 are connected in series by k + 1.

The first-layer printed circuit board Pw1 is equivalently shown in FIG. The B group pattern Bpt1 is the first
The group A pattern Apt1 is connected to the layer electrode L1, the group A pattern Apt1 is connected to the common electrode LC, and an insulation resistance Ins1 exists between the group B pattern Bpt1 and the group A pattern Apt1. Here, assuming that the connection portion Cn12 is cut off,
An insulation resistance Ins1 appears between the electrodes L1 to LC.

Next, the configuration of the second-layer printed circuit board Pw2 will be described with reference to FIGS. A group pattern Apt2 and a B group pattern Bpt2 are provided as printed circuits on the surface of the second layer printed circuit board Pw2.
These are the group A pattern Apt1 and the group B pattern Bp.
It has the same shape as t1. The group A pattern Apt2 and the group B pattern Bpt2 are electrically separated from each other, and if normal, there is no conduction between them.

The group A patterns Apt2 are collectively connected to the common through hole CTH. On the other hand, B group pattern B
pt2 is collectively connected to the second layer through hole TH2.

The second-layer printed circuit board Pw2 is equivalently shown in FIG. The B group pattern Bpt2 is the second
Via the layer through hole TH2, it is connected to the second layer electrode L2 provided on the plate surface of the first layer printed circuit board Pw1, and the group A pattern Apt2 is connected to the common through hole CT.
H, connected to the common electrode LC, and the B group pattern Bpt
An insulation resistance Ins2 exists between the second group A and the group A pattern Apt2. Here, assuming that the connection portions Cn12 and Cn23 are cut, the insulation resistance I
ns2 appears.

Next, the configuration of the third-layer printed circuit board Pw3 will be described with reference to FIG. A group pattern Apt3 and a B group pattern Bpt3 are provided as printed circuits on the surface of the third-layer printed circuit board Pw3. These have the same shape as the group A pattern Apt1 and the group B pattern Bpt1. The group A pattern Apt3 and the group B pattern Bpt3 are electrically separated from each other, and if normal, there is no conduction between them.

The group A pattern Apt3 is collectively connected to the common through hole CTH. On the other hand, B group pattern B
pt3 is collectively connected to the through hole TH3 for the third layer.

Therefore, the B group pattern Bpt3 is the third
Via the layer through hole TH3, it is connected to the third layer electrode L3 provided on the plate surface of the first layer printed circuit board Pw1, and the group A pattern Apt3 is connected to the common through hole CT.
H, connected to the common electrode LC, and the B group pattern Bpt
An insulation resistance Ins3 exists between the third group A and the group A pattern Apt3. Here, assuming that the connection portions Cn23 and Cn34 are cut, the insulation resistance I
ns3 appears.

Next, the structure of the fourth-layer printed circuit board Pw4 will be described with reference to FIG. A group pattern Apt4 and a B group pattern Bpt4 are provided as printed circuits on the plate surface of the fourth layer printed circuit board Pw4. These have the same shape as the group A pattern Apt1 and the group B pattern Bpt1. The group A pattern Apt4 and the group B pattern Bpt4 are electrically separated from each other, and if normal, there is no conduction between them.

The group A pattern Apt4 is collectively connected to the common through hole CTH. On the other hand, B group pattern B
pt4 is collectively connected to the fourth layer through hole TH4.

Therefore, the B group pattern Bpt4 is the fourth
Via the layer through hole TH4, it is connected to the fourth layer electrode L3 provided on the plate surface of the first layer printed circuit board Pw1, and the group A pattern Apt4 is connected to the common through hole CT.
H, connected to the common electrode LC, and the B group pattern Bpt
An insulation resistance Ins4 exists between the fourth and A group patterns Apt4. Here, assuming that the connection portions Cn34 and Cn45 are cut off, the insulation resistance I
ns4 appears.

Hereinafter, the fifth-layer printed circuit board Pw5 to the eighth-layer printed circuit board Pw8 are similarly configured.

As is apparent from the above, a pattern for evaluating the reliability of a multilayer printed wiring board can be manufactured without adding a new step in the manufacture of the reliability evaluation apparatus. In addition, existing manufacturing equipment for printed wiring boards can be applied to the manufacturing equipment, so that special equipment is not required.

FIG. 7 is a circuit diagram of the first to fourth layers of the reliability evaluation device U1 for a multilayer printed wiring board. The measurement method will be described below with reference to FIG. Although FIG. 1 is limited to the first to fourth layers for convenience of description, the same applies to the fifth to eighth layers. Therefore, the fifth to eighth
The method for measuring the layer also conforms to the following measurement method.

As shown in FIG.
The group A pattern Ap of each layer Pw1 to Pw4 is determined by TH.
t1 to Apt4 are in a connected state. On the other hand, since the electrodes L1 to L4 are connected via the connection portions Cn12 to Cn34, the B group pattern Bp of each layer Pw1 to Pw4
t1 to Bpt4 are connected.

As a result, if a short circuit or insulation failure occurs between the group A pattern Apti and the group B pattern Bpti in at least one of the layers Pw1 to Pw4, the electrodes L1 to L4 and the common through hole CTH are connected. The resistance value between the set common electrode LC and the common electrode LC sharply decreases.

Therefore, by applying the probe of the resistance value measuring device to one of the common electrode LC and any of the electrodes L1 to L4 for measurement, the presence or absence of a short circuit or insulation failure in all the layers Pw1 to Pw4 is measured only once. Can be inspected.

If the occurrence of a short circuit accident or an insulation failure accident is confirmed in this measurement, the layer in which the accident has occurred can be specified by the following operation. In addition, it is also possible to confirm the insulation resistance value of each layer.

In FIG. 1 and FIG. 7, the connection portion Cn12
Is cut with a cutter or the like, and the electrode L1 and the common electrode LC are cut by an insulation resistance meter or a tester.
Measure the resistance between them. If the measured insulation resistance value is normal, there is no short circuit or insulation failure between the patterns Apt1 and Bpt1 of the first layer Pw1, and thus it can be confirmed that an accident has occurred in a layer other than the first layer Pw1.

Next, an arbitrary point P72 of the pattern of the connection portion Cn23 is cut by a cutter or the like, and the resistance between the electrode L2 and the common electrode LC is measured by an insulation resistance meter or a tester. If the measured insulation resistance value is normal, the second layer Pw
There is no short circuit or insulation failure between the two patterns Apt2 and Bpt2, and it can be confirmed that an accident has occurred in a layer other than the second layer Pw2.

Here, if the measured insulation resistance value is abnormal, it can be confirmed that a short circuit or insulation failure has occurred in both patterns Apt2 and Bpt2 of the second layer Pw2. However, the occurrence of short-circuit or insulation failure may also occur simultaneously in the third and lower layers.
After the measurement of the layer Pw2, the above-described measurement is continued for each of the third and subsequent layers.

As described above, instead of inspecting for short-circuit or insulation failure, both patterns Aptj and Bptj of each layer are not inspected.
The measurement of the insulation resistance between (j = 1 to 8) is performed by following the same operation as described above.

As described above, according to the present embodiment, the electrodes L1 to L8 for the respective layers are provided on the plate surface of the uppermost layer so as to be exposed, and the patterns of the respective layers are connected to the corresponding electrodes by the respective through holes. Therefore, at the time of measurement, it is sufficient to measure between each electrode exposed on the plate surface of the uppermost layer and the common electrode,
In addition, since each connection between the electrodes is also exposed on the plate surface of the uppermost layer, the work of cutting each connection can be easily performed. As a result, the resistance of each layer can be measured very easily.

The second embodiment of the present invention is a reliability evaluation device applied to the measurement of the insulation resistance between the layers of a multilayer printed wiring board. The top view is shown in FIG. Hereinafter, a reliability evaluation device and a reliability evaluation method for a multilayer printed wiring board according to the second embodiment will be described with reference to FIG.

The multilayer printed wiring board reliability evaluation apparatus U2 according to the second embodiment has a first
It is composed of a multilayer printed wiring circuit in which eight layers from a layer printed circuit board Pw21 to an eighth layer printed circuit board (not shown) are stacked.

The first-layer printed circuit board Pw21 is the uppermost layer, and the first layer electrode L21 is exposed on the board surface in addition to the above-mentioned pattern. It is connected to the first layer electrode L21.

Further, the first layer electrode L21 is provided on this plate surface.
, A third layer electrode L23, a fifth layer electrode L25,
The seventh-layer electrodes L27 are all exposed. The third-layer electrode L23 is connected to a third-layer through-hole TH13 that connects the pattern of the third-layer printed circuit board.

The fifth layer electrode L25 is connected to a fifth layer through hole TH15 for connecting a pattern of a fifth layer printed circuit board.

The seventh layer electrode L27 is connected to a seventh layer through hole TH17 for connecting a pattern of a seventh layer printed circuit board.

Further, the first layer electrode L21 and the third layer electrode L23 are connected by a connection portion Cn13, and the third layer electrode L23 and the fifth layer electrode L25 are connected by a connection portion Cn3.
5 and the fifth-layer electrode L25 and the seventh-layer electrode L27 are connected by a connection portion Cn57. In this manner, the electrodes for the odd-numbered layers from the first-layer electrode L21 to the seventh-layer electrode L27 are connected in series by the connection portions Cn13, Cn35, and Cn57.

On the other hand, on the plate surface, the second-layer electrode L22 and the fourth-layer electrode L2 are opposed to the odd-layer electrode.
The fourth and sixth layer electrodes L26 and L28 are all exposed and arranged.

The second layer electrode L22 has a second layer through hole T for connecting a pattern of the second layer printed circuit board.
H12 is connected.

The fourth layer electrode L24 has a fourth layer through hole T for connecting the pattern of the fourth layer printed circuit board.
H14 is connected.

The sixth-layer electrode L26 has a sixth-layer through hole T for connecting the pattern of the sixth-layer printed circuit board.
H16 is connected.

The eighth layer electrode L28 has an eighth layer through hole T for connecting the pattern of the eighth layer printed circuit board.
H18 is connected.

Further, the second layer electrode L22 and the fourth layer electrode L24 are connected by a connecting portion Cn24, and the fourth layer electrode L24 and the sixth layer electrode L26 are connected by a connecting portion Cn4.
6, and the sixth layer electrode L26 and the eighth layer electrode L28 are connected by a connection portion Cn68. As described above, the electrodes for the even-numbered layers from the second-layer electrode L22 to the eighth-layer electrode L28 are connected in series by the connection portions Cn24, Cn46, and Cn68.

As is clear from the above, the reliability evaluation apparatus U2 can produce a reliability evaluation pattern for a multilayer printed wiring board without adding a new process in its manufacture. In addition, existing manufacturing equipment for printed wiring boards can be applied to the manufacturing equipment, so that special equipment is not required.

The measuring method will be described below. As described above, the odd-numbered layer patterns are connected by the through holes TH13, TH15, TH17 and the connection portions Cn13, Cn35, Cn57. On the other hand, the even-numbered layer patterns are connected by the through holes TH12, TH14, TH16, TH18 and the connection portions Cn24, Cn346, Cn68.

As a result, if a short circuit or insulation failure occurs between at least one of the odd layers and at least one of the adjacent even layers, the resistance between the odd electrodes L21 to L27 and the even electrodes L22 to L28 increases. Decrease dramatically.

Therefore, the probe of the resistance value measuring device is connected to one of the odd-numbered electrodes L21 to L27 and the even-numbered electrodes L22 to L22.
By measuring by applying any one of L28, the presence or absence of short circuit or insulation failure between all layers can be inspected by a single measurement.

If the occurrence of a short circuit accident or an insulation failure accident is confirmed in this measurement, the layer in which the accident has occurred can be specified by the following operation. This also gives
It is also possible to check the insulation resistance between the layers.

In FIG. 8, an arbitrary point of the pattern of the connection portion Cn13 is cut by a cutter or the like, and the connection portion Cn24 is cut.
Is cut by a cutter or the like, and the resistance between the electrodes L21 and L22 is measured by an insulation resistance meter or a tester. If the measured insulation resistance is normal,
There is no short circuit or insulation failure between the first and second layers, and it can be confirmed that an accident has occurred between the other layers.

Next, an arbitrary point of the pattern of the connection portion Cn35 is cut by a cutter or the like, and the resistance between the electrodes L22 and L23 is measured by an insulation resistance meter or a tester. If the measured insulation resistance value is normal, there is no short circuit or insulation failure between the second and third layers, and thus it can be confirmed that an accident has occurred between the other layers.

Here, if the measured insulation resistance value is abnormal, it can be confirmed that a short circuit or insulation failure has occurred between the second layer and the third layer. However, since the occurrence of a short circuit or insulation failure may also occur simultaneously between the third and lower layers, the measurement of the second and third layers is continued for the third and subsequent layers. Measurement is continued.

As described above, even when measuring the insulation resistance between the layers instead of inspecting for a short circuit or insulation failure,
It will be executed following the same operation as above.

As described above, according to the present embodiment, the electrodes L21 to L28 for the respective layers are provided on the plate surface of the uppermost layer so as to be exposed, and the patterns of the respective layers are connected to the corresponding electrodes by the respective through holes. It is only necessary to measure between the electrodes exposed on the top surface of the plate at the time of measurement, and the connection between the electrodes is also exposed on the top surface of the plate. As a result, the resistance of each layer can be measured very easily.

The third embodiment of the present invention is a reliability evaluation device applied to the measurement of the insulation resistance between the layers of a multilayer printed wiring board. The configuration is shown in FIG. FIG. 9 is a top view of the reliability evaluation device according to the third embodiment. Hereinafter, a reliability evaluation device and a reliability evaluation method for a multilayer printed wiring board according to the third embodiment will be described with reference to FIG.

The reliability evaluation apparatus U3 for a multilayer printed wiring board according to the third embodiment has a first
Layer printed circuit board Pw31, second layer printed circuit board Pw32, third layer printed circuit board Pw33, fourth layer printed circuit board Pw34, fifth layer printed circuit board Pw
35, sixth-layer printed circuit board Pw36, seventh-layer printed circuit board Pw37, eighth-layer printed circuit board Pw38
Up to eight layers.

The first layer printed circuit board Pw31 is the uppermost layer, and the first layer electrode L31 is exposed on the board surface in addition to the above-mentioned pattern. The pattern of the first layer printed circuit board Pw31 is It is connected to this first layer electrode L31.

Further, the first layer electrode L31 is provided on this plate surface.
, A third layer electrode L33, a fifth layer electrode L35,
The seventh-layer electrodes L37 are all exposed. The third-layer electrode L33 has a third-layer through hole T for connecting the pattern of the third-layer printed circuit board Pw33.
H13 is connected.

The fifth-layer electrode L35 is connected to a fifth-layer through hole TH15 for connecting the pattern of the fifth-layer printed circuit board Pw35.

The seventh layer electrode L37 is connected to a seventh layer through hole TH17 for connecting the pattern of the seventh layer printed circuit board Pw37.

On the other hand, on the plate surface, the second-layer electrode L32 and the fourth-layer electrode L3 are opposed to the odd-layer electrode.
The fourth and sixth layer electrodes L36 and the eighth layer electrode L38 are all exposed.

The second-layer electrode L32 is connected to a second-layer through hole TH12 for connecting the pattern of the second-layer printed circuit board Pw32.

The fourth layer electrode L34 is connected to the fourth layer through hole TH14 for connecting the pattern of the fourth layer printed circuit board Pw34.

The sixth layer electrode L36 is connected to the sixth layer through hole TH16 for connecting the pattern of the sixth layer printed circuit board Pw36.

The eighth layer electrode L38 is connected to the eighth layer through hole TH18 for connecting the pattern of the eighth layer printed circuit board Pw38.

As is clear from the above description, the reliability evaluation apparatus U3 can produce a reliability evaluation pattern for a multilayer printed wiring board without adding a new process in its manufacture. In addition, existing manufacturing equipment for printed wiring boards can be applied to the manufacturing equipment, so that special equipment is not required.

The measuring method will be described below. As described above, the odd-numbered electrodes L21 to L27 and the through-hole TH13,
The patterns of the respective odd-numbered layers are connected to the odd-numbered electrodes L21 to L27 exposed on the first layer by TH15 and TH17. On the other hand, the pattern of each even layer is connected to the even electrodes L22 to L28 exposed on the first layer by the even electrodes L22 to L28 and the through holes TH12, TH14, TH16, and TH18.

As a result, if a short-circuit or insulation failure occurs between each odd-numbered layer and the even-numbered layer adjacent thereto, the short-circuit or insulation failure occurs between any of the odd-numbered electrodes L21 to L27 and any of the even-numbered electrodes L22 to L28. The resistance value decreases sharply.

Therefore, the probe of the resistance value measuring device is connected to one of the odd-numbered electrodes L21 to L27 and the even-numbered electrodes L22 to L22.
By measuring by applying to any of L28, it is possible to inspect the layer where the short circuit or the insulation failure has occurred.

As described above, even when measuring the insulation resistance between the layers, instead of checking for a short circuit or insulation failure,
It will be executed following the same operation as above.

As described above, according to the present embodiment, the electrodes L31 to L38 for each layer are provided to be exposed on the plate surface of the uppermost layer, and the pattern of each layer is connected to each corresponding electrode by each through hole. It is only necessary to measure between the electrodes exposed on the top surface of the plate at the time of measurement, and the connection between the electrodes is also exposed on the top surface of the plate. As a result, the resistance of each layer can be measured very easily.

FIG. 10 is a circuit diagram of a probe applied to the reliability evaluation device. This probe Prb is a probe for measuring the interlayer resistance of a multilayer wiring board.
Each of the plurality of electrodes connected to the patterns on each layer constituting the multilayer wiring board as shown in FIG.

As shown in the figure, the probe Prb has a pair, ie, a pair of measurement input terminals Ld10 and Ld10 ', and further has eight ends T1 to L8 which can respectively contact the eight electrodes L31 to L38. T8 and switches SW1 to SW8 respectively connected to these ends.

Further, of the electrodes, the electrodes L31 and L3 connected to the patterns on each of the odd-numbered layers which are one step apart are provided.
3, each end T that can abut against each of L35 and L37
1, T3, T5, T7 are switches S1, S
3, S5 and S7 are connected to one measurement input terminal Ld10.

Further, of the electrodes, the electrodes L32 and L3 connected to the patterns on the even-numbered layers, respectively
4, each end T that can abut against each of L36 and L38
2, T4, T6, T8 are switches S2, S
4, the other measurement input terminal Ld1 via S6 and S8
Connected to 0 '. The output of this probe is supplied to an interlayer resistance measuring device.

Next, the operation will be described. Switches S1, S
3, S5, S7 are all turned on, and switches S2,
When the measurement is performed with S4, S6, and S8 all turned on, the insulation between all the layers can be inspected at once.

If the insulation abnormality is detected in the above-described all-layer inspection, the process then proceeds to an individual inspection. For example, the insulation between the first layer and the second layer can be inspected by measuring with only the switches S1 and S2 turned on and all other switches turned off. Similarly, a desired interlayer can be measured by turning on / off the corresponding switch.

Here, if the measured insulation resistance value is abnormal, it can be confirmed that a short circuit or insulation failure has occurred between the corresponding layers. However, since the occurrence of a short circuit or insulation failure may also occur simultaneously between the subsequent layers, it is necessary to continue the measurement for each subsequent layer.

Further, if the on / off control of each of the switches SW1 to SW8 is executed according to a predetermined program using a microcomputer or the like, various plural times of measuring operations are automated, and thus the measuring operation is performed by a probe. , A reliable measurement can be performed very quickly.

As described above, according to the present configuration, by opening and closing the switches, only the two ends respectively brought into contact with the two electrodes connected to the two adjacent layers are subjected to the measurement input. By being connected to each of the terminals,
A resistance measurement between two adjacent layers can be performed.

The fourth embodiment of the present invention is a reliability evaluation apparatus applied to measurement of an insulation resistance value between a through hole and a pattern provided on an inner layer of a multilayer printed wiring board. FIG. 11 is a schematic perspective view thereof. Hereinafter, a reliability evaluation device and a reliability evaluation method for a multilayer printed wiring board according to the fourth embodiment will be described with reference to FIG.

In the reliability evaluation apparatus U4 for a multilayer printed wiring board according to the fourth embodiment, each of the laminated inner-layer printed circuit boards 101 to 106 has a pair of patterns, respectively.
In a normal state, there is no conduction between the two patterns, and the pattern has a high insulation resistance value.

One of the patterns of each inner layer is composed of the first inner layer printed circuit board 101 to the sixth inner layer printed circuit board 10.
No. 6 are connected in series by a plurality of common through holes TH111 connected to and penetrating each layer, and the plurality of common through holes TH111 are connected to a common electrode L10C exposed on the uppermost layer substrate. .

An electrode L101 is further exposed on the uppermost substrate. First inner layer printed circuit board 10
1 is connected to a first inner-layer through hole TH101 for connecting the first inner-layer printed circuit board 101 and the uppermost-layer substrate.
H101 is connected to the electrode L101.

As described above, when j = 1 to 6, the j-th inner-layer printed circuit board 10j is connected to the j-th inner-layer through hole TH10j that connects the j-th inner-layer printed circuit board 10j to the uppermost-layer board. And this j
The inner layer through hole TH10j is connected to the electrode L101. 1, the first layer electrode L1 to the eighth layer electrode L8 are connected in series.

Therefore, the j-th inner-layer printed circuit board 10
One pattern of j is a through hole TH10 for the j-th inner layer.
j and the other pattern is connected to the common electrode L10C via the common through hole TH111.
And an insulation resistance in the j-th inner layer exists between the two patterns. Here, assuming that all connections between the electrode L101 and the other through-hole TH10k for the k-th inner layer (where k ≠ j) are cut off, both electrodes L101 to L101
The insulation resistance 1 in the j-th inner layer appears between L10C.

As is clear from the above, a pattern for evaluating the reliability of a multilayer printed wiring board can be produced without adding a new step in the manufacture of the reliability evaluating apparatus U4. In addition, existing manufacturing equipment for printed wiring boards can be applied to the manufacturing equipment, so that special equipment is not required.

The measuring method will be described below. As shown in the figure, one pattern of each inner layer printed circuit board is connected to the electrode L101 via each inner layer through hole. The other pattern of each inner printed circuit board is connected to the common electrode L10C via a common through hole.

As a result, each inner printed circuit board 101
If a short circuit or poor insulation occurs between both patterns in at least one of the patterns 106 to 106, the resistance value between the electrode L101 and the common electrode L10C sharply decreases.

Therefore, by applying the probe of the resistance value measuring device to the electrode L101 and the common electrode L10C, the presence / absence of a short circuit or insulation failure in all the inner printed circuit boards 101 to 106 is inspected by a single measurement. can do.

If the occurrence of a short circuit or insulation failure is confirmed in this measurement, the inner layer printed circuit board in which the failure has occurred can be specified by the following operation.

In FIG. 11, the connection between the electrode L101 and the through hole TH101 for the first inner layer is cut by a cutter or the like, and the resistance between the electrode L101 and the common electrode L10C is measured by an insulation resistance meter or a tester. If the measured insulation resistance value is normal, it is confirmed that a short circuit or insulation failure has occurred between the two patterns of the separated first inner printed circuit board 101.

If the measured insulation resistance value is abnormal, the electrode L101 and the second inner layer through-hole T
The connection between H102 is cut by a cutter or the like, and the resistance between the electrode L101 and the common electrode L10C is measured by an insulation resistance meter or a tester. If the measured insulation resistance value is normal, it is confirmed that a short circuit or insulation failure has occurred between both patterns of the separated second inner printed circuit board 102.

If the measured insulation resistance value is abnormal, the connection between the electrode L101 and the third inner layer through hole TH103 is cut with a cutter or the like, and the electrode L101 is connected to the electrode L101 with an insulation resistance meter or a tester. Electrode L1
Measure the resistance between 0C. If the measured insulation resistance value is normal, the separated third inner-layer printed circuit board 103
It is confirmed that a short circuit or insulation failure has occurred between the two patterns.

By repeating the above operation for each of the inner printed circuit boards, it is possible to identify the inner printed circuit board in which a short circuit or insulation failure has occurred between the two patterns.

As described above, according to the present embodiment, since the electrode L101 on the plate surface of the uppermost layer and the connection portion between the electrode L101 and each through hole for the inner layer are provided to be exposed, the measurement is performed. In this case, the work of cutting each connection portion can be easily performed, and as a result, the resistance of each layer can be measured very easily.

[0131]

According to the reliability evaluation apparatus for a multilayer printed wiring board according to the first aspect of the present invention, a plurality of substrates each having a pair of patterns having insulation resistance between each other are laminated and exposed. A plurality of electrodes and a common electrode are exposed on the substrate surface, and one of the patterns on each inner layer is connected to one of the electrodes via a through hole, and the other one of the patterns on each inner layer is passed through. It is connected to the common electrode via the hole, and the configuration is such that each electrode is connected in series in a state where the connection portion is exposed on the exposed substrate surface, so that the exposed connection portion can be cut. Easy,
Therefore, by sequentially cutting the connection portions, the pattern of each layer can be easily and electrically separated from the pattern of another layer.

As a result, the insulation resistance value or continuity between all the patterns was measured at a time without disconnecting each connection part, and then the desired connection parts were sequentially cut to obtain the insulation resistance value or continuity between the desired individual patterns. Can be realized.

According to a second aspect of the present invention, there is provided a method for evaluating the reliability of a multilayer printed wiring board, wherein the reliability evaluation apparatus for a multilayer printed wiring board having the structure described in the first aspect uses a series of connected devices. It cuts any exposed part and measures the resistance or continuity between the cut electrode on either side and the common electrode, so the insulation resistance between all patterns without cutting each connection Alternatively, the entire reliability can be evaluated by measuring the continuity at a glance. Then, individual reliability can be evaluated by sequentially cutting desired connection portions and measuring the insulation resistance value or continuity between desired patterns.

In the reliability evaluation apparatus for a multilayer printed wiring board according to a third aspect of the present invention, a plurality of layers each having a pattern are laminated, and a plurality of electrodes are exposed on the plate surface of the exposed layer to form an inner layer. The corresponding electrodes are connected in series so that the pattern on each layer is connected to any of the multiple electrodes via through holes, and the connection exposed on the board surface connects each layer one by one. Further, another connecting portion exposed on the plate surface is configured to connect a series of corresponding electrodes so as to connect each layer not connected to the connecting portion. It is easy to cut both of the connected portions, and therefore, by sequentially cutting the desired portions of both of the connected portions, it is easy to electrically separate the desired layer pattern from the other layer pattern.

As a result, the insulation resistance value or continuity between all layers is measured at a time without disconnecting each connection part, and then the desired connection parts are sequentially cut to individually measure the insulation resistance value or continuity between the desired layers. Thus, it is possible to realize a reliability evaluation device having such a configuration.

According to a fourth aspect of the present invention, there is provided a method for evaluating the reliability of a multilayer printed wiring board, the method comprising the steps of: It cuts off any exposed part, and measures the resistance or continuity between the cut electrode on one side and the other series of connected electrodes. It is possible to measure the insulation resistance value or continuity between all the layers at once, and then sequentially cut desired connection portions to individually measure the insulation resistance value or continuity between the desired layers.

In the reliability evaluation apparatus for a multilayer printed wiring board according to a fifth aspect of the present invention, a plurality of substrates each having a pattern are laminated as layers, and a plurality of electrodes are exposed on the exposed surface of the substrate. Since the pattern on each layer which is disposed and becomes an inner layer in the lamination is connected to any one of the plurality of electrodes via a through hole, all of the patterns are electrically connected to the pattern of each layer. In which the electrodes are provided in an exposed state on the exposed substrate surface.

According to a sixth aspect of the present invention, there is provided a method for evaluating the reliability of a multilayer printed wiring board, comprising the steps of: Is used to measure the resistance or continuity between two electrodes connected to each other, so that the resistance or continuity can be measured between any desired layers.

According to a seventh aspect of the present invention, there is provided a probe for measuring an interlayer resistance of a multilayer wiring board, wherein each of a plurality of electrodes connected to a pattern on each layer constituting the multilayer wiring board is to be measured, and at least one of the electrodes is to be measured. A set of measurement input terminals, each end of the set of measurement input terminals that can be in contact with each of the electrodes connected to the pattern on each layer one by one through a switch, One end connected to one of the electrodes and capable of contacting each of the other electrodes is connected to the other one of the measurement input terminals via a switch. Only to the measurement input terminal.

In the method for measuring the interlayer resistance of a multilayer wiring board according to claim 8 of the present invention, by using a probe for measuring the interlayer resistance of the multilayer wiring board, each switch is opened and closed to connect to at least two adjacent layers. Since only two ends of the two electrodes that are in contact with the two electrodes are connected to each of the measurement input terminals, the resistance between the two adjacent layers is measured. The resistance between arbitrary layers can be measured only by opening and closing each switch without performing an operation of changing the contact state of the end portion to the electrode.

According to a ninth aspect of the present invention, there is provided an apparatus for evaluating the reliability of a multilayer printed wiring board, wherein the exposed surface of the multilayer printed wiring board in which a plurality of substrates having insulation resistance are stacked between a pattern and a common through hole is laminated. A plurality of electrodes and a common electrode are exposed and disposed, and the pattern on each layer is connected to any of the plurality of electrodes via a through hole, and the common through hole is connected to the common electrode and exposed on the substrate surface. Since the connecting portions are connected in series between the electrodes, it is easy to cut the exposed connecting portions. Therefore, by sequentially cutting the connecting portions, the pattern of each layer is sequentially changed to another layer. It can be easily separated electrically from the pattern.

As a result, the insulation resistance or continuity between all the patterns and the common through-hole was measured at a time without disconnecting each connection part, and then the desired connection parts were sequentially cut to obtain the desired pattern and the common through-hole. It is possible to realize a reliability evaluation device configured to individually measure the insulation resistance value or continuity between them.

According to a tenth aspect of the present invention, there is provided a method for evaluating the reliability of a multilayer printed wiring board, the method comprising the steps of: Is to measure the resistance or continuity between one of the cut electrodes and the common electrode, so that the insulation resistance between all patterns and the common through-hole without disconnecting each connection part The overall reliability can be evaluated by measuring the value or continuity at a glance.Then, by sequentially cutting the desired connection and measuring the insulation resistance or continuity between the desired pattern and the common through hole, each inner layer can be individually evaluated. This has the effect that the reliability can be evaluated.

[Brief description of the drawings]

FIG. 1 is a top view of a first embodiment of a multilayer printed wiring board reliability evaluation apparatus according to the present invention.

FIG. 2 is a circuit diagram of a first layer of the reliability evaluation device shown in FIG. 1;

FIG. 3 is a top view of a second layer of the reliability evaluation device shown in FIG. 1;

FIG. 4 is a circuit diagram of a second layer of the reliability evaluation device shown in FIG. 3;

5 is a top view of a third layer of the reliability evaluation device shown in FIG.

6 is a top view of a fourth layer of the reliability evaluation device shown in FIG.

FIG. 7 is a circuit diagram of first to fourth layers of the reliability evaluation device shown in FIG. 1;

FIG. 8 is a top view of a second embodiment of the reliability evaluation apparatus for a multilayer printed wiring board according to the present invention.

FIG. 9 is a top view of a third embodiment of the reliability evaluation apparatus for a multilayer printed wiring board according to the present invention.

FIG. 10 is a circuit diagram of a probe applied to the reliability evaluation device shown in FIG.

FIG. 11 is a schematic perspective view of a fourth embodiment of the reliability evaluation apparatus for a multilayer printed wiring board according to the present invention.

FIG. 12 is a top view of an example of a conventional multilayer printed wiring board reliability evaluation apparatus.

FIG. 13 is a schematic perspective view of an example of a conventional reliability evaluation device for a multilayer printed wiring board.

[Explanation of symbols]

U1 ... Multilayer printed wiring board reliability evaluation device, Apt
1 ... A group pattern, Bpt1 ... B group pattern, Cn
12 Connection part, Cn23 Connection part, Cn34 Connection part, Cn45 Connection part, Cn56 Connection part, Cn
67 connection part, Cn78 connection part, CTH common through hole, LC common electrode, L1 first layer electrode, L2 second layer electrode, L3 third layer Electrode, L
4 ... Fourth layer electrode, L5 ... Fifth layer electrode, L6 ...
6th layer electrode, L7 ... 7th layer electrode, L8 ... 8th layer electrode, Pw1 ... 1st layer printed circuit board, TH2 ...
... Through hole for second layer, TH3 ... Through hole for third layer, TH4 ... Through hole for fourth layer, TH5 ... Through hole for fifth layer, TH6 ... Through hole for sixth layer, TH7 ... ... Through hole for seventh layer, TH8 ... Eighth
Through hole for layer

Claims (10)

[Claims] An apparatus for evaluating the reliability of a multilayer printed wiring board in which a plurality of substrates each having a set of patterns having an insulation resistance between each other are laminated as layers, wherein the substrate has an exposed surface of the substrate. A plurality of electrodes and a common electrode are disposed so as to be exposed, and one of the pair of patterns on each layer serving as an inner layer in the lamination is connected to one of the plurality of electrodes via a through hole, respectively. The other end of each set of the patterns on each layer serving as the inner layer is connected to the common electrode through a through hole, and the connection portion exposed and disposed on the plate surface of the substrate is provided at each of the respective portions. An apparatus for evaluating the reliability of a multilayer printed wiring board, characterized in that the electrodes are connected in series. 2. A plurality of substrates each having a set of patterns having an insulation resistance between each other are laminated as layers, and a plurality of electrodes are disposed on the exposed plate surface of the substrate. One of the set of patterns on each of the inner layers is connected to any of the plurality of electrodes via a through hole, and the other of the set of patterns on each of the inner layers. One layer is connected to the common electrode via a through-hole, and the connection portion exposed on the board surface of the substrate is connected to connect the electrodes in series. Using an evaluation device, cutting the series of connected exposed portions, and measuring the resistance or conduction between the cut electrode and the common electrode. Reliability evaluation method for multilayer printed wiring boards 3. An apparatus for evaluating the reliability of a multilayer printed wiring board in which a plurality of substrates each having a pattern are laminated as layers, wherein a plurality of electrodes are disposed on an exposed surface of the substrate. The pattern on each layer serving as an inner layer in the lamination is connected to any one of the plurality of electrodes via a through hole, and the connecting portion exposed and disposed on the plate surface of the substrate is The corresponding electrodes are connected in series so as to connect each layer one by one, and another connecting portion exposed and disposed on the plate surface of the substrate is not connected to the connecting portion. To connect each said layer of connection,
A reliability evaluation device for a multilayer printed wiring board, wherein the corresponding electrodes are connected in series. 4. A plurality of substrates each having a pattern are laminated as respective layers, a plurality of electrodes are disposed on the exposed surface of the substrate, and the plurality of electrodes are disposed on the exposed surface of the substrate. Are connected to any of the plurality of electrodes via through holes, respectively, and the connecting portions exposed and disposed on the plate surface of the substrate connect the layers one by one. The electrodes are connected in series, and the other connecting portions exposed on the plate surface of the substrate are connected to connect the unconnected layers to the connecting portions. Using a multilayer printed wiring board reliability evaluation device having a configuration in which the electrodes are connected in series, the one of the series-connected arbitrary exposed portions is cut, and the cut one of the electrodes is cut off. And the resistance value between the electrodes connected in series with each other. Method of evaluating the reliability of the multilayer printed wiring board and measuring the conduction. 5. An apparatus for evaluating the reliability of a multilayer printed wiring board in which a plurality of substrates each having a pattern are stacked as layers, wherein a plurality of electrodes are disposed on the exposed surface of the substrate. A reliability evaluation apparatus for a multilayer printed wiring board, wherein the pattern on each layer serving as an inner layer in the lamination is connected to any one of the plurality of electrodes via a through hole. 6. A plurality of substrates each having a pattern are laminated as respective layers, and a plurality of electrodes are disposed on the exposed plate surface of the substrate so as to be exposed, and the pattern on each layer serving as an inner layer in the lamination is formed. Using a multilayer printed wiring board reliability evaluation device having a configuration in which each of the electrodes is connected to any of the plurality of electrodes via a through-hole, among the electrodes, between two electrodes to which the adjacent two layers are connected. A method for evaluating the reliability of a multilayer printed wiring board, comprising measuring a resistance value or conduction. 7. Each of a plurality of electrodes connected to a pattern on each layer constituting a multilayer wiring board is to be measured,
A probe for measuring an interlayer resistance of a multilayer wiring board including at least one set of measurement input terminals, comprising: a plurality of ends each capable of contacting each of the electrodes; and a switch connected to each of the ends. And each of the electrodes, which can be brought into contact with each of the electrodes respectively connected to the patterns on each of the layers one by one, is connected to each of the electrodes through the switch. And each end other than the above, which can be in contact with each of the other electrodes, is connected to the other one of the set of measurement input terminals via a switch other than the above. A probe for measuring interlayer resistance of a multilayer wiring board, comprising: 8. A plurality of electrodes respectively connected to a pattern on each layer constituting the multilayer wiring board are measured, and
At least one set of measurement input terminals, a plurality of ends each capable of abutting on each of the electrodes, and a switch respectively connected to each of the ends, and on each layer of the electrodes, one of which is skipped. The respective ends that can be respectively contacted with the electrodes respectively connected to the pattern are connected to one of the set of measurement input terminals via the respective switches, and to each of the electrodes other than the above. Probe for measuring the interlayer resistance of a multilayer wiring board configured by connecting each end other than the above that can be abutted to the other one of the set of measurement input terminals via a switch other than the above, respectively. By opening and closing the switches, only the two end portions respectively brought into contact with the two electrodes connected to at least two adjacent layers are the respective measurement input terminals. To be connected to And measuring the resistance between two adjacent layers. 9. A reliability evaluation apparatus for a multilayer printed wiring board comprising a pattern and a plurality of substrates each having an insulation resistance between the pattern and a common through hole, each of which is laminated as a layer. A plurality of electrodes and a common electrode are exposed on the surface, and the pattern on each layer serving as an inner layer in the lamination is connected to any of the plurality of electrodes via a through hole, and the common through hole is provided. Is connected to the common electrode, and a connecting portion exposed on the plate surface of the substrate connects the electrodes in series to each other. 10. A substrate comprising a pattern, a plurality of substrates each having insulation resistance between the pattern and the common through hole are laminated as layers, and a plurality of electrodes and a common electrode are exposed and arranged on the exposed surface of the substrate. Provided, the pattern on each layer serving as an inner layer in the lamination is connected to any of the plurality of electrodes via through holes, the common through hole is connected to the common electrode, and the Using a reliability evaluation device for a multilayer printed wiring board having a configuration in which the connection portion exposed and disposed on the board surface connects the electrodes in series, cutting any of the series of connected exposed portions, A method for evaluating the reliability of a multilayer printed wiring board, comprising measuring a resistance value or continuity between one of the cut electrodes and the common electrode.