JP2000031374A - Integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an integrated circuit device that can effectively radiate heat from a semiconductor element being heated such as a high-frequency semiconductor element, etc., and can be packaged or mounted in a compact size. SOLUTION: There are provided a semiconductor chip 15 on the surface of which a semiconductor element 21 and a plurality of bumps 16A, 16B are formed, a first substrate 11 and a second substrate 12 wherein a passive element 18 is formed on one main surface and a metal layer for heat radiation is formed on the other main surface. The rear surface of the semiconductor chip 15 is connected with one main surface of the first substrate 11 via the metal layer 14, and the surface of the semiconductor chip 15 is connected with the passive element 18 and the metal layer 13 for heat radiation via the bumps 16 to constitute a integrated circuit device 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to an integrated circuit device having a semiconductor chip on which a semiconductor element such as T (MEtal Semiconductor FET) or HEMT (high electron mobility transistor) is formed, that is, a so-called semiconductor element mounting structure.

[0002]

2. Description of the Related Art For example, an MMIC (monolithic microwave IC) using gallium arsenide (GaAs) is formed as a power amplifier element used for transmission of a mobile phone terminal, a wireless LAN (local area network) terminal, or the like. ing. In packaging and mounting devices such as MMICs, heat dissipation is a major issue.

Conventionally, generally, as shown in FIG.
A structure is used in which the MIC chip 51 is die-bonded to a metal plate 52, and the metal plate 52 is used as a heat sink to release heat. In FIG. 7, 53 is an electrode pad of the MMIC chip 51, 54 is a substrate, and 55 is a wire for electrically connecting the electrode pad 53 on the MMIC chip 51 and the terminal 56 on the substrate 54.

[0004]

SUMMARY OF THE INVENTION However, GaAs
s has poor heat conduction and poor cooling efficiency from the back surface, so that the heat sink structure using the metal plate 52 is large-scale, ie, planar, to sufficiently dissipate heat.
In some cases, the area of the MMI becomes larger than that of the MMI.
This hinders miniaturization of an integrated circuit device having a device such as C.

In order to solve the above-mentioned problems, the present invention provides an integrated circuit that can efficiently radiate a heat-generating semiconductor element such as a high-frequency semiconductor element and can be compactly packaged or mounted. An apparatus is provided.

[0006]

An integrated circuit device according to the present invention comprises a semiconductor chip having a surface on which a semiconductor element and a plurality of bumps are formed, a first substrate, a passive element on one main surface, and a main element on the other side. A second substrate having a heat-dissipating metal layer formed on a surface thereof, the back surface of the semiconductor chip being connected to one main surface of the first substrate via a metal layer, and the front surface of the semiconductor chip being connected via a bump. And connected to the passive element and the heat dissipation metal layer of the second substrate.

Further, the integrated circuit device of the present invention is such that the entirety of the semiconductor chip, the first substrate and the second substrate are molded with resin.

According to the configuration of the present invention described above, the back surface of the semiconductor chip is connected to the metal layer on the main surface of the first substrate, and the surface of the semiconductor chip is connected to the metal layer for heat radiation of the second substrate via the bump. The heat generated in the semiconductor element of the semiconductor chip can be radiated from the metal layer on the main surface of the first substrate and the metal layer for heat radiation of the second substrate. Therefore, heat can be radiated from the front and back surfaces of the semiconductor chip, and heat can be efficiently radiated.

[0009]

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor chip having a semiconductor element and a plurality of bumps formed on a surface, a first substrate, a passive element on one main surface, and a heat radiation metal layer on the other main surface. Formed on the second substrate, the back surface of the semiconductor chip is connected to one main surface of the first substrate via a metal layer, and the surface of the semiconductor chip is connected to the second substrate via bumps. An integrated circuit device connected to a passive element and a metal layer for heat dissipation.

Further, according to the present invention, in the above integrated circuit device, the bump and the passive element are connected by a wiring layer penetrating the second substrate.

Further, the present invention provides the above-mentioned integrated circuit device, wherein one or more semiconductor elements operating at a high frequency are formed on a semiconductor chip.

Further, the present invention is configured such that, in the above-mentioned integrated circuit device, a plurality of semiconductor chips are connected to the first substrate and the second substrate.

According to the present invention, in the above integrated circuit device, a bump is formed on the back surface of the semiconductor chip, a wiring layer is formed on the other main surface of the first substrate, and the semiconductor element and the bump on the back surface of the semiconductor chip are formed. Are connected by a wiring layer penetrating the semiconductor chip, and the bump on the back surface of the semiconductor chip and the wiring layer on the other main surface of the first substrate are connected by a wiring layer penetrating the first substrate. Configuration.

According to the present invention, a semiconductor chip having a semiconductor element and a plurality of bumps formed on a surface thereof, a first substrate, a passive element on one main surface, and a heat-dissipating metal layer on the other main surface are formed. A second substrate, and the back surface of the semiconductor chip is the first substrate.
The semiconductor chip is connected to one main surface of the substrate via a metal layer, and the surface of the semiconductor chip is connected to the passive element and the heat dissipation metal layer of the second substrate via bumps.
This is an integrated circuit device in which the entire substrate and the second substrate are resin-molded.

FIG. 1 shows a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device as one embodiment of the integrated circuit device of the present invention.

The high-frequency integrated circuit device 10 includes a semiconductor chip 15 on which high-frequency semiconductor elements such as MESFETs and HEMTs are formed, and a die-bond substrate 11 made of, for example, a ceramic substrate or a printed substrate as a first substrate. A heat sink substrate 12 made of, for example, a ceramic substrate or a printed substrate as the second substrate
And The die bond substrate 11 and the heat sink substrate 12 are arranged so as to sandwich both surfaces of the semiconductor chip 15.

The back surface of the semiconductor chip 15 is formed on the die bonding substrate 1 via a die bonding metal layer 14 made of, for example, copper or aluminum formed on the die bonding substrate 11.
It is attached to 1. On the other hand, a plurality of bumps, that is, signal input / output terminal connection bumps 16A and heat radiation metal connection bumps 16B are formed on the surface of the semiconductor chip 15, and the heat radiation metal connection bumps 16B are
Is connected to a heat sink metal layer 13 made of, for example, copper or aluminum or the like formed on the back surface of the heat sink.

A similar heat sink metal layer 13 is also formed outside the die bond substrate 11 and the heat sink substrate 12, and is connected to the die bond metal layer 14 on the front surface of the die bond substrate 11 and the heat sink metal layer 13 on the back surface of the heat sink substrate 12. Have been.

The semiconductor chip 15 is formed by the heat sink metal layer 13 on the back and outside of the heat sink substrate 12.
The heat generated by the active elements in the device
B can escape from the surface of the semiconductor chip 15. Further, these metal layers 13 and 14 also have a role as a ground metal layer for grounding the high frequency semiconductor element of the semiconductor chip 15.

On the surface of the heat sink substrate 12, that is, on the side opposite to the semiconductor chip 15, a passive element 18 such as a matching circuit or a filter is formed. This passive element 18 is connected to the outside via a connector 19. The passive element 18 and the semiconductor chip 1
Reference numeral 5 denotes a wiring layer made of a conductor formed in a via hole 17 formed in the heat sink substrate 12 and a signal input / output terminal connection bump 16A on the surface of the semiconductor chip 15.
And are electrically connected through.

By the wiring layer in the via hole 17 and the signal input / output terminal connection bump 16A, the passive element 18 such as a matching circuit or a bandpass filter and the H in the semiconductor chip 15 are formed.
An active element such as an EMT is connected, and can operate as a high-frequency circuit IC.

Although the die bond substrate 11 and the heat sink substrate 12 can be composed of different substrates, a problem caused by a difference in the coefficient of thermal expansion between the two substrates 11 and 12, for example, of the outer heat sink metal 13. In order to prevent peeling or the like, it is preferable to use the same substrate material or a substrate material having a small difference in thermal expansion coefficient from each other.

Here, one form of the pattern of the surface of the semiconductor chip 15 is shown in FIG. 2A as a schematic plan view. For comparison, a pattern on the surface of the conventional MMIC chip 51 is also shown in FIG. 2B.

Referring to FIG. 2A, on the surface of the semiconductor chip 15, signal input / output terminal connection bumps 16A connected to active elements 21 (elements hatched in the figure) such as HEMTs are shown.
And a large number of bumps including the heat radiation metal connection bumps 16B.

On the other hand, in the conventional MMIC chip 51 shown in FIG. 2B, a matching circuit, a band-pass filter, etc. Passive elements 59 (elements not hatched in the figure) are formed by a metal pattern. still,
Numeral 57 (element hatched in the figure with a downward slant line) indicates a ground portion of an active element 58 described later.

In the high-frequency integrated circuit device 10 according to the present embodiment, these passive elements are
Since the semiconductor chip 15 alone is not provided above, the circuit operation as an IC cannot be performed with the semiconductor chip 15 alone. However, as shown in FIG. 1, the semiconductor chip 15 is connected to the heat sink substrate 12 on which the passive element 18 such as a matching circuit is formed. It is possible to operate the circuit of the IC by connecting via the terminal connection bump 16A.

In the conventional MMIC chip 51 shown in FIG. 7, heat generated by an active element such as a HEMT must be released from the back surface of the MMIC chip 51 as described above, and the heat radiation efficiency is poor.

On the other hand, in the high-frequency integrated circuit device 10 of the present embodiment, the heat generated in the active element 21 is directly released from the surface of the semiconductor chip 15 by employing the structure shown in FIGS. The circuit operation as an IC can be realized in the same manner as in the prior art.

Since the passive element 18 is formed on the surface of the heat sink substrate 12, the bump 16 (16
A, 16B), the area of the semiconductor chip 15 can be reduced to about the same size as the MMIC chip 51 of the conventional layout. Further, since only the active elements 21 and the bumps 16 are provided on the surface of the semiconductor chip 15, the degree of freedom in layout design is increased. It should be noted that the more the heat-dissipating metal connection bumps 16B are formed on the semiconductor chip 15, the higher the heat-dissipation efficiency and the faster the steady state to the ground potential. FIG. 2 shows the case of a circuit configuration in which the source electrode is grounded. However, a radiating metal connection bump 16B is formed very close to the source electrode, and the active element 21 is formed.
By setting all other parts to ground as much as possible, heat radiation efficiency and grounding can be improved.

Since the die bond substrate 11 and the heat sink substrate 12 have areas slightly larger than the semiconductor chip 15, the high-frequency integrated circuit device
The size can be reduced to such an extent that the area does not largely differ from that of the MIC chip 51.

As described above, according to the high-frequency integrated circuit device 10 of the present embodiment, the heat generated in the active element 21 in the semiconductor chip 15 is released from the surface of the semiconductor chip 15 through the bump radiating metal connection 16B. Thereby, the efficiency of cooling and heat radiation of the semiconductor chip 15 can be improved. Further, the high-frequency integrated circuit device 10 can be formed with a compact structure while improving the heat radiation efficiency.

Further, the high-frequency integrated circuit device 10 of the present embodiment is replaced with an expensive semiconductor chip 15 such as GaAs.
In the case where the present invention is applied to an integrated circuit device using only the active element 21, only the active element 21 is formed on the expensive semiconductor chip 15, and the passive element 18 such as a matching circuit is mounted on the inexpensive heat sink substrate 12 made of an organic substrate or the like. So that
As a whole, material costs can be reduced.

The passive element 18 such as a matching circuit is
Since the semiconductor chip 15 is formed on the heat sink substrate 12 different from the semiconductor chip 15, it is possible to freely adjust and repair these circuits even after the semiconductor chip 15 is mounted.

Next, a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device as another embodiment of the integrated circuit device of the present invention.
Is shown in FIG. As shown in FIG. 3, the high-frequency integrated circuit device 20 according to the present embodiment is configured by connecting a plurality of semiconductor chips 15A and 15B each having a high-frequency semiconductor element to a die bond substrate 11 and a heat sink substrate 12. Other configurations are similar to those of the high-frequency integrated circuit device 10 shown in FIG.
The same reference numerals are given and duplicate explanations are omitted.

Thus, with respect to the substrates 11 and 12,
By connecting a plurality of semiconductor chips 15A and 15B, a so-called MCM (multi-chip module) can be formed.

Next, FIG. 4 shows a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device as still another embodiment of the integrated circuit device of the present invention. As shown in FIG. 4, in the high-frequency integrated circuit device 30 of the present embodiment, via holes 17 are formed in the semiconductor chip 15 and the die bond substrate 11, respectively, and are formed in the semiconductor chip 15 and the die bond substrate 11. The wiring 3 provided on the back side of the die bond substrate 11 through a wiring layer made of a conductor in the via hole 17.
1 is also electrically connected.

The wiring 31 provided on the back side of the die bond substrate 11 is electrically connected to the input / output terminals I / O and the like, and external power supply voltage and the like are supplied through the wiring 31. To be.

The other configuration is the same as the configuration of the high-frequency integrated circuit device 10 shown in FIG. 1 previously.

For example, a high-frequency signal is supplied to the semiconductor chip 15 from the front side of the semiconductor chip 15, that is, the heat sink substrate 12, and a power supply voltage and control signals are supplied to the back side of the semiconductor chip 15, that is, the die bond substrate 11. Accordingly, a high-frequency signal can be more strictly separated from noise generated by a power supply or the like.

Further, a package in which the integrated circuit device of the present invention is integrally sealed by a mold can be provided. The schematic configuration of the package in this case is shown in the cross-sectional view of FIG.

As shown in FIG. 5, the die bonding substrate 11,
The semiconductor chip 15 and the heat sink substrate 12 are integrally formed as in FIG. 1, and these are integrally sealed with a mold 41 made of, for example, resin. A lead 42 projecting from a mold 41 is connected to a connector 19 extending from the passive element 18 formed on the heat sink substrate 12 to form a package structure 60.

Thus, the integrated circuit device of the present invention can be made into a mold type package. And, for example, the so-called CSP (chip scale package)
That is, a compact package close to the size of the semiconductor chip 15 can be formed.

Next, as another embodiment of the integrated circuit device of the present invention, FIG. 6A shows a schematic configuration diagram (cross-sectional view) of a heat sink substrate in a high frequency integrated circuit device. In this high-frequency integrated circuit device, the heat sink substrate 12 is composed of a lower heat sink substrate 12A and an upper heat sink substrate 12B.
This is a configuration in which a two-layer substrate is used.

A transmission line 22, a spiral inductor 25 having a spirally wound transmission line, and a MIM (metal-insulator-metal) capacitor formed as a capacitive element are disposed between the two heat sink substrates 12A and 12B. 24, a lower metal electrode 22A is formed. The MIM capacitor 24 is formed in the upper heat sink substrate 12B, and the upper metal electrode 22B is embedded in the heat sink substrate 12B with the dielectric film 23 interposed therebetween. As shown in the plan view of FIG. 6B, the spiral inductor 25 is formed by a spiral transmission line, and both ends 25A and 25B are respectively connected to conductors in the via hole 17 shown in FIG. 6A. In FIG. 6A, 22 indicates a transmission line, and 26 indicates a resistive film.

The two heat sink substrates 12A, 12A
B is a heat sink metal layer 1 on the front and back surfaces, respectively.
3 and via hole 17 and the conductor inside thereof, transmission line 2
2. Spiral inductor 25, MIM capacitor 24
Is formed on the lower metal electrode 22A. The upper heat sink substrate 12B has two substrates 12A and 12B.
Before bonding, a hole for forming an MIM capacitor 24 is formed, and after bonding, a dielectric film 23 is formed.
The upper metal electrode 22 is formed so as to fill the hole on the dielectric film 23.
Form B. After forming the element and the metal layer in this way, the two heat sink substrates 12A and 12B are joined,
The laminated heat sink substrate 12 is formed.

The other components are the same as those of the high-frequency integrated circuit 10 shown in FIG. The configuration of the semiconductor chip and the die bond substrate is shown in FIG.
Since it is the same as that of FIG.

According to the present embodiment, similarly to the above-described embodiment, the radiation efficiency of the semiconductor chip can be improved and the high-frequency integrated circuit device can be formed in a compact structure.

Further, by forming the heat sink substrate 12 with a multilayer structure of two or more layers, the number of semiconductor elements per one plane area can be increased.

In the above-described embodiment, the high-frequency integrated circuit device in which the semiconductor chip 15 has a high-frequency device, for example, a device such as a MESFET or a HEMT, has been described. By applying the present invention also to an integrated circuit device having the semiconductor chip 15 having the same, an effect of increasing cooling efficiency can be obtained.

The integrated circuit device of the present invention is not limited to the above-described embodiment, but may take various other configurations without departing from the gist of the present invention.

[0051]

According to the present invention, since heat can be radiated directly from the surface of the semiconductor chip, the heat radiation efficiency is improved.

When a plurality of chips having the same structure are freely combined on the same substrate, a so-called multi-chip module can be formed.

For example, when the present invention is applied to an integrated circuit device using an expensive semiconductor chip such as GaAs, only an active element portion is formed on the expensive semiconductor chip, and a passive element such as a matching circuit is an organic substrate or the like. Since it is formed on the inexpensive second substrate, the cost can be reduced as a whole.

Since the matching circuit pattern and the like are formed on another second substrate even after the semiconductor chip is mounted, the adjustment and repair of these circuits can be performed freely.

Further, in the integrated circuit device of the present invention, the package structure is easily formed by sealing the first substrate and the second substrate and the semiconductor chip integrally with each other by molding and forming leads. be able to.

When a wiring layer penetrating the semiconductor chip is formed to supply an electric signal also from the back side of the semiconductor chip, a high-frequency signal path and a power supply line are connected to the front side of the semiconductor chip, respectively. Since it can be separated on the back side, the interference between the high frequency signal and the power supply system signal can be more strictly suppressed and prevented.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a plan view comparing patterns on the surface of a semiconductor chip. A This is the case of the high-frequency integrated circuit device of FIG. B This is the case of a conventional MMIC chip.

FIG. 3 is a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device according to another embodiment of the present invention.

FIG. 4 is a schematic configuration diagram (cross-sectional view) of a high-frequency integrated circuit device according to still another embodiment of the present invention.

FIG. 5 is a schematic configuration diagram (cross-sectional view) of a package obtained by integrally molding a high-frequency integrated circuit device.

FIG. 6 is a diagram showing a high-frequency integrated circuit device according to another embodiment of the present invention. A is a cross-sectional view of a heat sink substrate of the high-frequency integrated circuit device. B is a plan view of the spiral inductor in FIG. 6A.

FIG. 7 is a diagram showing a mounting state of a conventional MMIC.

[Explanation of symbols]

1, 20, 30: High frequency integrated circuit device, 11: Die bond substrate, 12, 12A, 12B: Heat sink substrate, 1
3: heat sink metal layer, 14: die bond metal layer, 1
5, 15A, 15B: semiconductor chip, 16: bump, 1
6A: bump for connecting a signal input / output terminal, 16B: bump for connecting a heat dissipating metal, 17: via hole, 18: passive element, 19: connector, 21: active element, 22: transmission line, 22A: lower metal electrode, 22B: Upper metal electrode, 23: Dielectric film, 24: MIM capacitor, 25:
Spiral inductor, 26 ... resistive film, 31 ... wiring, 4
1 ... mold, 42 ... lead, 51 ... MMIC chip,
52: heat sink metal, 53: electrode pad, 54: substrate, 55: wire, 56: terminal, 58: active element, 59
... Passive element, 60 ... Package structure

Claims (6)

[Claims] 1. A semiconductor chip having a surface on which a semiconductor element and a plurality of bumps are formed, a first substrate, a passive element on one main surface, and a second substrate having a heat dissipation metal layer formed on the other main surface. A back surface of the semiconductor chip is connected to one main surface of the first substrate via a metal layer, and a front surface of the semiconductor chip is connected to the second substrate via the bumps An integrated circuit device connected to the passive element and the heat dissipating metal layer. 2. The integrated circuit device according to claim 1, wherein the bump and the passive element are connected by a wiring layer penetrating the second substrate. 3. The integrated circuit device according to claim 1, wherein one or more semiconductor elements operating at a high frequency are formed on said semiconductor chip. 4. The integrated circuit device according to claim 1, wherein a plurality of semiconductor chips are connected to said first substrate and said second substrate. 5. A bump is also formed on the back surface of the semiconductor chip, a wiring layer is formed on the other main surface of the first substrate, and a gap is formed between the semiconductor element and the bump on the back surface of the semiconductor chip. A wiring layer penetrating the semiconductor chip is connected, and a bump on the back surface of the semiconductor chip and the wiring layer on the other main surface of the first substrate are connected by a wiring layer penetrating the first substrate. The integrated circuit device according to claim 1, wherein the integrated circuit device comprises: 6. A semiconductor chip having a semiconductor element and a plurality of bumps formed on a surface thereof, a first substrate, a passive element on one main surface, and a second substrate having a heat dissipation metal layer formed on the other main surface. A back surface of the semiconductor chip is connected to one main surface of the first substrate via a metal layer, and a front surface of the semiconductor chip is connected to the second substrate via the bumps An integrated circuit device connected to the passive element and the heat-dissipating metal layer, wherein the semiconductor chip, the first substrate, and the second substrate are entirely resin-molded.