JP2000023351A - Switching control device with temperature protection function and power control device for vehicle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize both a control operation and a temperature protection function which corresponds to a number of loads by mounting a power element with an over-temperature-breaking means for breaking current supply on the same substrate or an enclosure. SOLUTION: Power elements (MOS-FET) 113-118 with an overtemperature automatic breaking function are mounted on a ceramic substrate 101, and a metal substrate 102 and are arranged in a box (enclosure) 110. Then, a wiring pattern is printed onto a substrate for electrical connection. In this case, power elements for a small current and for a large current are distributed to MOS-FET groups 113 and 114 or the like with overtemperature automatic breaking function and MOS-FET groups 115, 116, 117 or the like, respectively for grouping, and the thermal resistance of each group is changed, thus preventing automatic breaking in a steady load and operating an automatic breaking function in an abnormal current that is set to several times larger with respect to a steady load and hence allowing overtemperature protection to function fully.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch control device having a temperature protection function using a power element semiconductor for controlling an on / off switch operation of a lamp and a motor and detecting an overload and shifting to a cutoff. .

[0002]

2. Description of the Related Art As a conventional technique, a general method is to detect a current supplied to a load and automatically cut off an excessive increase in the current. Even if this is applied to a MOS-FET, Japanese Patent Application Laid-Open No. 61-261920 and
A number of known techniques have been disclosed, such as JP-A-11916, JP-A-62-143450, and JP-A-63-87128. The outline of these known techniques will be described with reference to FIGS. 1, 2, 3, and 4. FIG. In FIG. 1, 1 is a MOS-FET control means, 2 is a MOS-FET serving as a switch, 3 is a load, and 4 is a MOS-FET.
A means for detecting the current flowing through the FET or its temperature, a means 6 for comparing with a constant value, and a means 7 for a cutoff circuit.

First, when a component for detecting an overcurrent supplied to the load 3 is added to the power element of the element 2, a comparison between a constant value, which is an abnormal value from many times the steady-state current, and a current value is made. This is performed in the element 6, and when the current value is exceeded, the interruption circuit 7 shifts to an interruption operation. Actually, the detecting means 5 is configured to include a value that changes with the flowing current, for example, a resistor or an amplifier if necessary, for example, a potential difference between both ends of the diode. Further, the comparison circuit 6 for comparing with a constant voltage can be configured by comparing the voltage of a comparator or the like. The cutoff circuit can be realized, for example, by adding a circuit for turning off the gate potential of the MOS-FET 2. These current detection means sometimes cause problems. For example, in a load such as a headlamp of an automobile, if a momentary large current is cut off from the off state to the start of lighting, a smooth lighting operation is impaired. This is illustrated in FIG. In the figure, the vertical axis is current, temperature axis, the horizontal axis is time axis, 10 is current characteristic, 1
1, 12, and 13 are temperature characteristics, and 14 is a temperature threshold. Current at the time of lighting of normal lamps (flowing through lamps), MOS
-The temperature of the FET changes over time as shown by the characteristics 10 and 12. That is, at the start of lighting, since the filament (not shown) temperature of the lamp is low, the filament has a positive temperature coefficient, and thus has a low resistance value.
A sharp current flows (Characteristic 10), but thereafter, as the filament temperature increases, the filament resistance increases, and the current rapidly decreases. Now, if the MOS-FET 2 is automatically cut off in response to the current at the time of rising (not shown), the filament of the lamp does not emit necessary light and does not generate heat. For this reason, the state of turning on and off is repeated in a very short cycle (characteristic 13 indicates temperature, but this is replaced with current, and the repetition frequency is increased, that is, the time axis is shortened). Here, a remarkable time is required until lighting is performed, and lighting at a required timing is hindered. Therefore, a sudden current in this steady state of use is indispensable. Therefore, instead of current, M
The chip temperature due to self-heating at the on-resistance of the OS-FET is monitored. As described above, the current sharply rises instantaneously at the start of lighting (characteristic 10). On the other hand, the temperature 12 at this time tends to rise with a slight delay, but shows a dull response to the current, and thereafter falls to a substantially constant value as the current becomes a steady value. Therefore, steady operation is not hindered. However, when the state of the lamp or motor, which is a load, is abnormal and is close to a short-circuit state, the current is kept at a very large value continuously, and the temperature rise of the MOS-FET also increases. A MOS-FET cutoff circuit is added so as to limit this to a fixed value (14 values converted into temperature).
However, in this case, in a configuration in which the cutoff is performed only when the threshold value is reached, a temperature increase / decrease cycle occurs near the threshold value 14 as shown in a characteristic 13. The present inventors have disclosed in Japanese Patent Application No. 8-303018 previously filed a technique for avoiding these problems by using a switch circuit having a temperature protection function. Here, the outline of the switch circuit with the temperature protection function will be described with reference to the block diagram of FIG. 2 and the operation explanatory diagram of FIG.

In FIG. 2, 5 is a temperature detecting means, 6 is a comparison circuit for comparing with a constant value, 8 is a cutoff holding circuit, and 7 is a cutoff circuit. Here, the cutoff holding circuit is reset by the off operation of the MOS-FET control means, and is set by the output of the comparison ratio path 6. Here, when the temperature becomes higher than a certain value due to a temperature abnormality, the comparison circuit 6 operates the cutoff holding circuit 8 and the cutoff circuit 7 automatically and forcibly cuts off the MOS-FET 2. This is forcibly performed even if the MOS-FET control means 1 continues the ON signal. Further, the cutoff holding operation is continued until the next time the MOS-FET control output is turned off, so that the above-mentioned temperature increase / decrease cycle is avoided. Thus, as shown in the characteristic 11, the temperature becomes a constant value 14
Is reached, control is performed in the cooling direction, and destruction of elements such as MOS-FETs due to abnormally high temperatures, heat generation and ignition of the current supply path are prevented. As described above, the operation disclosed in Japanese Patent Application No. 8-303018 is realized in which an instantaneous current of a load short-circuit or a steady load is allowed, and furthermore, the operation is automatically cut off in the event of an abnormal short-circuit.

Further, the present inventors have disclosed in WO96 / 26570 an apparatus technology for controlling the load of a vehicle based on signals on a communication line using these interrupting elements. According to these known techniques, it is possible to control each load in a vehicle using a communication line, and to realize a device that automatically shuts off in the event of a short circuit or the like.

[0006]

However, the present inventors have encountered further problems which cannot be avoided by these techniques.
This occurs when these switch devices with a temperature protection function are collectively installed on several housings of a vehicle for a plurality of loads, and heat generated by flowing current through the switches is radiated.

When a large number of power elements for avoiding the danger of heat generation by temperature monitoring are mounted on the same substrate, the heat protection elements are not thermally insulated from each other. There are cases. A conventional MOS-FET with a temperature protection function for controlling a large number of loads.
Such a problem was not clarified because there was no idea of arranging and designing the control circuit on the same substrate.

An object of the present invention is to provide an improved switch control device with a temperature protection function which can be realized at a low cost with a simple circuit configuration while achieving both a control operation corresponding to a large number of loads and a temperature protection function.

[0009]

According to the present invention, a power element having over-temperature interrupting means for interrupting a current supply at a predetermined temperature or higher is mounted on the same substrate or housing. A heat dissipating member was provided in the housing to allow heat transfer.

[0010]

DETAILED DESCRIPTION OF THE INVENTION For example, FIG. 5 shows a case where a switch control circuit C0 using a large current I0 as a steady current and a switch control circuit C1 using a relatively small current I1 as a steady current are installed on the same housing. Assume as follows. Hereinafter, the principle of the present invention will be qualitatively described with reference to FIGS.

In FIG. 5, reference numerals 33 and 33 'denote loads such as lamps and motors; 32 and 32' denote MOS-FETs;
5 'is a MOS-FET temperature detecting means, 36 and 36' are temperature / voltage converters, 37 and 37 'are comparison circuits (to a fixed value), and 38 and 38' are current monitoring of MOS-FETs 32 and 32 '. Blocking means as means, 31 is a MOS-FET control means, 40 is a housing containing each component block therein, 41 is a radiating fin mounted on the housing, 46 is a communication line with another block, and 45 is a communication line with other blocks. Communication means with other blocks. FIG. 6 shows an example in which many (three) blocks are connected. In the figure, elements 50 to 55 are load, 61
To 63 are communication means, 71 to 73 are radiation fins, 60
Is a communication line, and 57 to 59 are housings of each block. Here, for example, it is assumed that the steady current required of the load 33 is relatively large and the similar current of the load 33 'is relatively small. FIG. 7 shows a pattern of the temperature detected by the temperature detecting means 35, 35 'in this case. In the figure, 8
0 is the current of the load 33, 81 is the temperature of the chip built in the MOS-FET 32, 82 is the current of the load 33 ', 83 is the temperature of the chip built in the MOS-FET 32', 8
4 and 85 are current and temperature characteristic diagrams.

Normally, when the current I flows, the MOS-F
The power (loss) consumed by ET (resistance R at the time of ON) is I
MOS-FE of size appropriate for current value due to × I × R
It is ideal to select and use T, but it is extremely common to use the same package product in common from the lineup of MOS-FETs and the convenience of design. In this case, the heat radiation effect is
-Similar to the FET chip, but the amount of heat generation increases in proportion to the square of the current consumption. Results. At this time, ON / OFF of the small current load hardly affects the temperature change.

For example, in contrast to a temperature change 81 with respect to the load current 80 in FIG. 7, a change in the temperature 83 with respect to the load current 82 appears as a large temperature change as shown in a temperature curve 85 even if a current abnormality 84 occurs. Absent. This is the radiation fin 4
1 has a large heat dissipation effect and is effective for heat dissipation of a load with a large steady current. However, even if an abnormal current flows to a control MOS-FET with a load of a small steady current, the thermal cutoff operation is automatically performed. Shows absorbing temperature changes to occur. That is, in order to prevent an abnormal current from flowing to the load, even if a temperature protection function of monitoring the temperature of the chip and automatically shutting off the chip is provided in each MOS-FET,
On the MOS-FET side where a switch in which the current in the steady state is relatively small does not rise to the chip temperature detected as abnormal. As a result, an abnormal current far exceeding the steady value is applied to the load, which causes abnormal heat generation of the load, fusing and destruction, or abnormal heat generation of wiring to the load, smoking, and the like. If the overall heat radiation effect is degraded in order to avoid this, the temperature of the control MOS-FET for a large-current load will always increase, and the automatic cutoff function will operate with a slight load. As a result, problems such as the inability to drive a large current steady load can occur. This also occurs for each module even when a large number of load control circuits are collectively arranged on a module as shown in FIG.

The above is quantitatively shown in FIG.

[0015]

[Table 1]

Now, a MOS-FET chip for controlling on / off of two loads is disposed on the module housing 41, and is placed in an atmosphere at an ambient temperature Ta = 20 ° C. Is 90, the chip of the small current control MOS-FET 32 'is 91, the power consumption is W1, W2, and the temperature is T1, T2. For the sake of simplicity, the two chips are arranged close to each other, and the thermal resistance 92, 93 between each package and the peripheral substrate is Rtcp =
0.5 ° C / W is common. Further, the ambient temperature of both packages is set to Tp, and the thermal resistance between the package and the outside of the housing radiation fin 41 is set to Rtpa = 7 ° C./W. These are summarized in Table 1. Note that the thermal resistance is not a name of the element but a quantitative value indicating the ease of conducting heat when analyzing heat. Now, ΔT = W between the power consumption W, the thermal resistance R, and the temperature rise ΔT.
× R, for example, W1 = 10W, W2 =
In the case of 1 W, Tp = Ta + Rtpa × (W1 + W2) = 97 ° C. T1 = Tp + Rcp × W1 = 102 ° C. T2 = Tp + Rcp × W2 = 97.5 ° C. Similarly, when there is a steady current and when there is an abnormality (3
Table 2 shows the chip temperature and the like at the time of the current. Note that the * 1 mark in the figure is a calculated value assuming that the large current chip 90 does not automatically shut off at T1. Actually, the interruption as a current monitoring means on the side of the large current control MOS-FET 90 is performed. It is considered that the temperature is slightly increased because the circuit 38 is shut down in advance. The problem in this example is the temperature at * 2 and * 3. Although the current on the small current load side is an abnormal value of 3 times (9 times the power), the automatic cutoff function does not operate because the chip temperature does not rise. That is. Set the temperature at which the automatic shutoff circuit operates to 18
If the temperature is set to 0 ° C., the rise in chip temperature is particularly insufficient at * 3. When the current value of 180 ° C. is solved under the condition of W1 = 0, the current ratio is 4.6 and the power ratio is 22. Even if the leakage current continues to flow on the wiring, it cannot be automatically cut off and is thin. When wiring is used, it generates abnormal heat and smoke.

The present inventors have further improved this point.

Hereinafter, a further improved embodiment will be described with reference to the block diagram of FIG. In FIG. 9, an element 100 is a member having a thermal resistance Rtbu (° C./W), and other elements are the same as those in FIG. Now, taking into consideration that the change in current (or power consumption) in the case of the comparatively small current has not been reflected in the rise in chip temperature due to the good heat dissipation, the chip with respect to the change in load current with a relatively small current has been considered. It is conceived to take measures to increase the temperature change. First, assuming that the values of the respective elements in the present embodiment are the same as those in Table 1, it is considered that a member 100 is inserted so that the relationship between the power and the thermal resistance in the steady state has the following relationship.

ΔT = W1 × Rtcp = W2 × (Rtcp + Rtbu) (1) That is, the temperature difference between the large current chip and the package surface = the temperature difference between the small current chip and the package surface + the package surface and the insertion member Temperature difference = power consumption × (heat resistance of package + heat resistance of insertion member).

Here, W1 = 10W, W2 = 1W, Rtcp
= 0.5 ° C / W, Rtbu = 4.5 ° C / W
Get. That is, a member having a thermal resistance of 4.5 ° C./W is inserted. Table 3 shows various calculations corresponding to Table 2 under these conditions.

[0021]

[Table 2]

[0022]

[Table 3]

The portions indicated by * 4 and * 6 in the table are virtual values for the implementation, as described above. As is clear from * 5 in this table, the low power control MOS-FET chip 9
It can be seen that the effect of the abnormal current flowing through 1 appears as an increase in the temperature of T2, which is close to the desired operation of automatically shutting off at 180 ° C. * 7 has an improvement effect, but still does not reach the automatic shutoff temperature of 180 ° C. When the power consumption Wy reaching 180 ° C. is calculated in the following formula, ΔT = (180−Ta) ° C. = (Rtcp + Rtbu + Rtpa) × Wy Wy = 13 W In other words, the current ratio is about 3.7 times, which is the square root of the current ratio. The improvement is 4.6 times, that is, the threshold value of the abnormal current that can be detected is reduced. The method of obtaining these by the theoretical formula will be described later in detail. In the present embodiment, it is assumed that the temperature serving as a threshold value for causing the automatic shutoff operation is about 180 ° C.
This value is a threshold value that is almost commonly used for protection in a semiconductor device made of silicon. In this embodiment, the ratio of the power constantly supplied to the load is set to 10: 1 for the large current and the small current, that is, about three times the current.
In order to increase this ratio, the thermal resistance of the member 100 is increased,
To reduce the ratio, the thermal resistance may be reduced.

FIG. 10 shows a specific embodiment of the present invention. In the figure, 101 is a ceramic substrate, 102 is a metal substrate,
113 to 118 are MOS-F with automatic over-temperature shut-off function
ET, 110 is a box (case). Of course, the material of the element 101 is not limited to ceramic, but may be any material having an appropriate thermal resistance. A wiring pattern is printed on the substrate and electrically connected. MOS-FET 113 to 1
Although 18 is shown as a package product, it may be a bare chip product that is not molded. Here, depending on the type of load, for example, a MOS-FET group with an over-temperature protection function for controlling a load having a large steady current such as a headlamp or a fog lamp, and an over-temperature protection for a relatively small load current control related to an interior lamp and a wiper control. The group of MOS-FETs with functions is divided into groups, and for example, small-current applications are assigned to 113 and 114 in FIG. 10 and large-current applications are assigned to 115, 116 and 117 in FIG. There are various ways to change the thermal resistance of each group by grouping, and some embodiments will be disclosed below.

FIG. 11 is a sectional view of another embodiment of the present invention. In the figure, reference numeral 111 denotes a substrate made of a material having a large thermal resistance, 1
Reference numeral 02 denotes a substrate made of a metal (a material having good thermal conductivity such as aluminum). It is first conceivable to partially change the heat radiation material in this way.

FIG. 12 is a sectional view of still another embodiment.
In the figure, 120 and 121 are radiation fins. By dissipating heat by increasing the fin density of the group whose thermal resistance is to be increased and increasing the fin density of the group whose thermal resistance is to be decreased, the heat radiation of the mounting portion of the large current MOS-FET is improved. Can be considered.

FIG. 13 shows an example of mounting in a completely different housing or box for each group. Substrates of the group whose thermal resistance is desired to be reduced are treated with metal having good heat conductivity, use of heat radiating fins, and the like.

FIG. 14 shows an example in which the material of the substrate is changed for each group and the heat radiation area of each MOS-FET with overtemperature protection is changed. The group in which the elements are sparsely arranged has good heat radiation, and the group in which the elements are closely arranged utilizes poor heat radiation.

FIG. 15 is a block diagram further quantifying the heat radiation of the embodiment in which the plurality of control MOS-FETs are grouped. In the present embodiment, a method of disposing two each for large current control and small current control is disclosed. Of course, the MOS-FET used in this embodiment is also premised on the over-temperature protection function, but for simplicity, the blocks in the figure are represented by an automatic shut-off circuit (over-temperature protection). In the figure, 33-a to 33-d are loads,
33-b requires a relatively large steady-state current,
3-c and 33-d are those of a relatively small steady current. 32-a and 32-b are MOS-FETs with an over-temperature protection function (automatic shut-off circuit), and 90-a to 90-d are MO-FETs.
Chips in S-FET, 92-a to 92-d are chips
Schematic representation of the thermal resistance to the package surface, 1
30-a to 130-d are automatic shutoff circuits in the package,
140 and 141 are the thermal resistances of the members inserted into the load of a relatively small steady current, 94 is the thermal resistance from the radiation fin 41 to the substrate, and 150 to 152 are points at a certain temperature.
Other elements are indicated by the same numbers as in the previous example.

In the embodiment shown in FIG. 15, the external environmental temperature Ta is set to 20 ° C., and the power consumption of each of the chips 90-a to 90-d is represented by W11, W12, W21, W22 (indicated in watts). Are expressed as T11, T12, T21, and T22, the thermal relationship is shown in FIG. Where each MOS
-The thermal resistance of the FETs (32-a to 32-d) is Rtcp (common), the power consumption of W11 and W12 is substantially equal (W1), and the power consumption of W21 and W22 is substantially equal (W2). Further, if the thermal resistance of the insertion member is designed with the common Rtbu, the relational expression from the chip to the substrate (temperature Tp) is as follows: the temperature difference from the high power chip to the point 150 = W11 × Rtcp = W12 × Rtcp = W1 × Rtcp = low power Temperature difference from tip to point 151 + temperature difference between points 151 to 150 = W21 × (Rtcp + Rtbu) = W22 × (Rtcp + Rtbu) = W2 × (Rtcp + Rtbu) Therefore, Rtbu = (Rtcp / 2) × (W1 / W2-1), Rtc
Assuming that p = 0.5 ° C./W, W1 = 10 W, and W2 = 1 W, Rtbu = 4.5 ° C./W from the above equation. In the example of FIG. 9, since Rtbu = 4.5 ° C./W, the thermal resistance of the members may be equal. In the example of FIG. 16, the relational expression from point 150 to point 152 is as follows. That is, when the current of one small current chip is tripled (9 W) (for example, W
21 = 9W, W11 = W12 = W22 = 0)
Considering that the temperature should be 80 ° C., W21 × (Rtcp + Rtbu + Rtpa) = (180−20) ° C. Substituting Rtcp = 0.5 ° C./W, Rtbu = 4.5 ° C./W, and Rtpa = 13 (° C. / W) In this case, the problem is whether or not these will not automatically shut off due to temperature rise at the time of a steady current of W11 = W12 = 10W and W21 = W22 = 1W. In this case, the temperature difference ΔTd from the temperature difference Ta to the chip of W11 is ΔTd = (W11 + W12 + W21 + W22) × Rtpa +
Rtcp × W11 = 291 (° C.), which does not satisfy the condition of 180 ° C. or less. Therefore, the thickness of the wiring is designed to be large so as to allow a larger current (power consumption) of the threshold value for automatic cutoff,
Rtpa is made independent for the large current and the small current (a separate housing as in the embodiment of FIG.
Use a separate board, independent heat radiation, etc.). For example, different thermal resistance values Rtpa1 and Rtpa for large current and small current
Consider the embodiment of FIG. 17 as having two. In this case, if Rtcp = 0.5 ° C./W, Rtbu = 4.5 ° C./W, and Rtpa1 = about 1.3 ° C., it is possible to automatically shut off at three times the abnormal current. Because W11 = 90W,
This is because the temperature difference when W12 = 0 W is: ΔTd1 = 90 × (0.5 + 1.3) = 162 (° C.) The chip temperature is expected to be about 180 ° C. On the other hand, for a load with a relatively small current, Rtpa
It is assumed that 2 = 13. As above, W21 = 9W, W2
Temperature difference Td2 from chip to Ta when 2 = 0W
Is ΔTd2 = 9 × (0.5 + 4.5 + 1.3) = 162 (° C.), and the chip temperature is about 180 ° C. as described above.
FIG. 18 is a block diagram of the embodiment having the temperature relationship shown in FIG. 17 described above, and Table 4 shows its temperature data table.

[0031]

[Table 4]

In FIG. 18, 170 and 171 schematically show the thermal resistance from the housing to the periphery of the package, 172 is a housing (and substrate) for controlling a relatively large current load, and 173 is This is the housing (and substrate) of the part that controls the load with relatively small current. 172 and 173 may be two parts that are connected by a heat insulating part and constitute the same box. Table 4 shows a matrix of a case where a constant current of a large current load of 10 W in this embodiment is used, and a power consumption of 90 W is set as an abnormal value with a current three times as large as this. * 1, * 3
It is also shown that even in the portions of * 5, * 2, * 4, and * 6, only the MOS-FET with the abnormal power consumption of 90 W has a temperature exceeding the shutdown threshold of 180 ° C. Also, M for relatively large power
* 1, * 3, and * 5, which indicate the chip temperature of the OS-FET, are * 2 equivalent to the temperature state of the low-power MOS-FET.
The states of * 4 and * 6 are obtained. In the present embodiment, the number of loads for both relatively low power and relatively high power is equal to 2, but this may be arbitrary. Further, the case of two groups has been exemplified as the grouping according to the magnitude of the load, but the same applies to this case.

Another embodiment in which the number of loads and the number of groups are arbitrary will be described below with reference to the block diagram of FIG. In the figure, 200 is a housing, 201 is a thermal resistance from the housing to the package peripheral substrate, 203-a to 203-m are members inserted between the package and the substrate, and these thermal resistances are Rtbu.
1 to Rtbum. Reference numerals 210-a to 210-m denote driving loads (m pieces), which are desirably the same value. However, there are some differences in the members (thermal resistances Rtbu1 to Rtbu).
This can be dealt with by appropriately selecting the value of m). WN1-WNm
Is the power consumption of the chip, and TN1 to TNm are the chip temperatures.

The power consumption of the chip in a steady state is W0,
The ratio to the power consumption Wer that automatically shuts off as abnormal is designed to be three times. The condition for automatically shutting down even when the load with the lowest power consumption among the m loads consumes three times the abnormal current at the time of abnormality (assuming WN1 is the smallest) is: WN1 (Rtcp + Rtbu1 + RtpaN) = Wer (Rtcp + Rtbu1 + RtpaN) = 9 × W0 × (Rtcp + Rtbu1 + RtpaN)> = 180−20 (° C.) (2) In addition, even if all m loads are driven in a steady state, the condition for not automatically shutting down is the largest of m Assuming that the load requiring a steady current is 210-m and the power consumption is Wnm, (WN1 + WN2 + WN3 +... + WNm) × RtpaN + WNm × (Rtcp + Rtbum) <= 180−20 (° C.) (3) For the sake of simplicity, if the steady power is W0 = 1W (common), the value of m is 5, Rtcp = 0.5 ° C./W, and Rtbu1 to Rtbum are 4.5 ° C./W (common), then (2) From the equation, RtpaN> = 12.8 (° C./W) From these, RtpaN is set to 15 (° C./W). FIG. 20 shows the thermal circuit in the sense of confirmation, and Table 5 summarizes the temperature state under each condition.

[0035]

[Table 5]

In FIG. 20, WN1 to MNm indicate the power consumption of the chip, Rtcp indicates the thermal resistance from the chip to the package surface, Rtbu1 to Rtbum indicate the thermal resistance of the insertion member, and Rtpa indicates the thermal resistance from the member to the housing. MOS- with temperature protection function
Assuming that the FETs use common components, the thermal resistance of the package is assumed to be common as Rtcp. Rtpa may be considered as the thermal resistance up to the radiation fin (element 41 in FIG. 19). Table 5 shows that the temperature of each chip is 100 ° C. even when all of m = 5 are on at the time of steady current, the automatic shut-off function does not operate, and that the chip is in a desired state. Only one of them indicates that the temperature has already reached the temperature (210 ° C.> 180 ° C.) at which the automatic shut-off operation is started with the current three times that in the steady state. As these results show, the design of the thermal resistance of the thermal components within the thermally independent group, as described above,
It becomes relatively easy.

FIGS. 21, 22, and 23 show another embodiment. FIG. 21 shows how the thermal power MOS-FET is mounted, and FIG. 22 shows how the thermal power MOS-F is mounted.
FIG. 5 shows a loss, a thermal resistance, and a heat generation state between an ambient temperature and a power circuit of the ET. FIG. 23 shows the relationship between the loss (power consumption) of the power MOS-FET and the thermal resistance when the power MOS-FET is mounted on a substrate. In FIG. 21, the thermal power MOS-FET is mounted on a substrate and connected to a heat sink. Here, thermal power M
Assuming that the OS-FET is turned on and a current is flowing, the thermal power MOS-FET generates heat due to the on-resistance of the mounted thermal power MOS-FET itself. This is called a loss P. The heat generated by the loss P is transmitted to the heat sink via the substrate and radiated to the surroundings. If this is represented by a thermal circuit, a circuit as shown in FIG. 22 is obtained. The chip temperature Tc of the thermal power MOS-FET due to the loss P is the sum of the ambient temperature Ta and the product of the loss P and the thermal resistance Rt.

First, a thermal power MOS-
An example in which only one FET is mounted will be described.

F1 in FIG. 23 represents a boundary line at which the thermal power MOS-FET does not perform the cutoff operation during normal operation. This is because when the cutoff temperature is Tcutoff, the maximum temperature in a normal use state is Tamax, the loss of the thermal power MOS-FET is P, and the thermal resistance when the power MOS-FET radiates heat is Rt, Rt = (Tcutoff− Tamax) / P (Equation 1.1). Rt calculated here is the current temperature condition,
Since the cutoff temperature is just the condition under the condition of the loss of the thermal power MOS-FET, the thermal resistance Rt must be smaller than this value. That is, in a region where the thermal resistance satisfying the condition of Rt <(Tcutoff−Tamax) / P (Equation 1.2) is small, a design can be made in which the temperature of the thermal power MOS-FET is not cut off. In F1 of FIG. 23, Tcutoff = 180 ° C., Tam
ax = 105 ° C.

On the other hand, if the load becomes abnormal and a current several times higher than normal flows, the electric wire may be overheated and smoke or fire may occur. Therefore, when a current several times higher than normal flows,
It must be designed to cut off. When the boundary line is calculated, the characteristic becomes like F2 in FIG. This is designed so that the cutoff temperature is Tcutoff, the minimum temperature in a normal use state is Tamin, and the thermal power MOS-FET loss at normal current is P, and the current is cut off at N times the normal time. When the thermal resistance when the thermal power MOS-FET dissipates heat is Rt, it is calculated by Rt ≧ (Tcutoff−Tamin) / (N × N × P) (Equation 1.3). F2 in FIG. 23 is Tcutoff = 180 ° C.
It is a value calculated when Tamin = −40 ° C. and N = 3.
In a region where the thermal resistance is larger than the boundary line, a design is possible in which the thermal FET is cut off with a current N times larger than that in a normal state.

When designing the protection operation using the thermal power MOS-FET, the thermal resistance to the loss of the thermal power MOS-FET which is smaller than F1 and larger than F2 in FIG. You have to choose. The thermal resistance referred to here indicates the total thermal resistance from the chip of the thermal power MOS-FET to the ambient temperature via the package (envelope), substrate, and heat sink. As described above, the present invention is characterized in that a heat sink having a thermal resistance smaller than F1 and larger than F2 in FIG. 23 is used.

That is, the thermal resistance Rt is determined in a region where the equation of (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff−Tamax) / P (Equation 1.4) holds.

If this equation does not hold, it is necessary to change the design conditions.

Next, a plurality of thermal powers M
An example when an OS-FET is mounted is shown. As shown in FIG. 24, a plurality of thermal power MOS-FETs are arranged on a substrate attached to a heat sink as shown in FIG. If FIG. 24 is described by a thermal circuit, FIG.
become that way.

Even when a plurality of thermal power MOS-FETs are mounted, it is necessary to perform heat radiation design according to the same design policy as in the case of the single thermal power MOS-FET.

When a plurality of thermal power MOS-FETs are used, all thermal power MOS-FETs are used.
There are a case where the FET is turned on / off at once and a case where only a part of the thermal power MOS-FET is turned on / off. First, when designing the boundary line of F1, that is, the maximum capacitance value of the thermal resistance, a condition when the total loss Pmax of all or some of the thermal power MOS-FETs turned on is maximized is found, and Pmax is first determined. calculate.

Assuming that a total of N thermal power MOS-FETs are mounted as shown in FIG. 25 and the total loss Pmax of the thermal power MOS-FETs becomes maximum,
It is assumed that the thermal power MOS-FETs 1, 2 and 3 are on. That is, Pmax becomes Pmax = P1 + P2 + P3.

Next, the one with the largest loss is P1
In the same manner as in the above example, the cutoff temperature is Tcutoff, the maximum temperature of the ambient temperature Ta in a normal use state is Tamax, the chip temperature of the thermal power MOS-FET1 is Tc1, the thermal resistance between chip packages is Rtcp1, The thermal resistance between the package substrates is Rtp1, and the thermal resistance between the common substrate and the surrounding space is Rtpa.

Then, the chip temperature Tc1 is obtained by the following equation.

Tc1 = P1 × (Rtcp1 + Rtp1) + Pmax × Rtpa + Tamax (Equation 1.5) Since this chip temperature Tc1 must not exceed the cutoff temperature Tcutoff, Tcpuoff ≧ P1 × (Rtcp1 + Rtp1) + Pmax × Rtpa + Tamax (Equation 1.6) ) Must be satisfied.

Next, the design of the minimum value of the thermal resistance corresponding to F2 in FIG. 23 is performed. This condition is such that when the load is broken and a current of N times the steady current flows, the wiring material is overheated and the thermal power MOS-
This is for performing the operation of cutting off the current by the FET. At this time, a condition is found in which the total loss of the thermal power MOS-FETs, which are all or partially turned on, is minimum and the loss of each thermal power MOS-FET is minimum. Here, if the thermal power MOS-FETs 1 and 4 in FIG. 25 are turned on, it is assumed that the total loss of the thermal power MOS-FET is minimized, and the thermal power MOS-FET is further reduced.
Assume that the loss of No. 4 was minimal.

At this time, as in the above example, the cutoff temperature is Tcutoff, the minimum temperature of the ambient temperature Ta in the normal use state is Tamin, the normal loss of the thermal power MOS-FET 1 is P1, the chip temperature is Tc1, The thermal resistance between chip packages is Rtcp1, the thermal resistance between package substrates is Rtp1, the normal loss of thermal power MOS-FET4 is P4, the chip temperature is Tc4, the thermal resistance between chip packages is Rtcp4, the thermal resistance between package substrates is Rtp4, Let Rtpa be the thermal resistance between the common substrate and the surrounding space. Then, the chip temperature Tc1 when an overcurrent flows through the thermal power MOS-FET1 is obtained by the following equation.

Tc1 = (N × N × P1) × (Rtcp1 + Rtp1) + (N × N × P1 + P4) × Rtpa + Tamin (Equation 1.7) Then, the chip temperature Tc4 when an overcurrent flows through the thermal power MOS-FET4 Is obtained by the following equation.

Tc4 = (N × N × P4) × (Rtcp4 + Rtp4) + (P1 + N × N × P4) × Rtpa + Tamin (Equation 1.8) Under the respective conditions, the chip temperatures Tc1 and Tc4 do not exceed the cutoff temperature Tcutoff. And thermal MOS-FE
Since T does not perform the cutoff operation, Equations 1.7 and 1.8
Becomes the following condition.

Tcutoff ≦ (N × N × P1) × (Rtcp1 + Rtp1) + (N × N × P1 + P4) × Rtpa + Tamin (Equation 1.9) Tcutoff ≦ (N × N × P4) × (Rtcp4 + Rtp4) + (P1 + N × N) × P4) × Rtpa + Tamin (Equation 1.10) If this expression is not satisfied, the temperature of the thermal power MOS-FET chip does not rise to a temperature at which cutoff is caused by about N times overcurrent. Therefore, a thermal resistance that satisfies this condition is selected.

Further, when the combination of the thermal resistances satisfying the expressions 1.9 and 1.10 is an environment where the ambient temperature is the maximum temperature Tamax, the condition that the thermal power MOS-FET is not cut off due to the temperature rise at the current in the normal state. It must be.

Then, the chip temperature Tc1 when a normal current flows through the thermal power MOS-FET1 is obtained by the following equation.

Tc1 = R1 × (Rtcp1 + Rtp1) + (P1 + P4) × Rtpa + Tamin (Equation 1.11) Then, the chip temperature Tc3 when a normal current flows through the thermal power MOS-FET 4 is obtained by the following equation.

Tc4 = R4 × (Rtcp4 + Rtp4) + (P1 + P4) × Rtpa + Tamin (Equation 1.12) The chip temperature T under the conditions of the equations 1.11 and 1.12.
Since c1 and Tc3 must not exceed the temperature Tcutoff at which the cutoff occurs, the results are as follows.

Tcutoff> P1 × (Rtcp1 + Rtp1) + (P1 + P3) × Rtpa + Tamax (Equation 1.13) Tcutoff> P4 × (Rtcp4 + Rtp4) + (P1 + P4) × Rtpa + Tamax (Equation 1.14) The thermal power described so far is summarized above. MOS-F
When the sum of the ET losses is maximum, 1, 2, and 3 are on at the same time, and the minimum is when 1, 4 is on and 4 is the minimum individual loss. Suppose. At this time, a desired operation can be performed by a combination of thermal resistances that simultaneously satisfies the expressions 1.6, 1.9, 1.10, 1.13, and 1.14. The feature of this embodiment is that the heat resistance of the heat sink and the substrate is set to a value within the range between the minimum value and the maximum value of the thermal resistance.

Next, still another embodiment will be described with reference to FIGS. 26, 27 and 28. Thermal power MOS-FE
Thermal loss of thermal power MOS-F is represented by Rt, where P is the loss of T, and Rt is the thermal resistance of heat radiated to the surroundings from the chip of the thermal power MOS-FET through the package, substrate and heat sink.
The temperature at which the ET is cut off is Tcutoff, the maximum value of the ambient temperature is Tamax, and the minimum value is Tamin. Then, the chip temperature Tc of the thermal power MOS-FET is represented by the thermal circuit of FIG. 22 as follows.

Tc = P × Rt + Tamax (Equation 1.15) Unless this Tc is smaller than Tcutoff, a problem occurs in a cutoff operation due to a rise in chip temperature in a normal use state. Therefore, Tcutoff> P × Rt + Tamax (Equation 1.16) must be satisfied.

On the other hand, when a large current such as a load short-circuit flows to the thermal power MOS-FET as in the above-described example, the cut-off operation is performed due to the overcurrent, and when the current N times the normal state flows, the over-temperature state It is necessary to cut off. The chip temperature at this time is expressed as follows.

Tc = N × N × P × Rt + Tamin (Equation 1.17) Since this Tc must be equal to or larger than Tcutoff, Tcutoff ≦ N × N × P × Rt + Tamin (Equation 1.18) must be satisfied.

That is, by transforming Equations 1.16 and 1.17, (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff−Tamax) / P (Equation 1.19) Thermal power MO with the thermal resistance within the range
When the heat dissipation of the S-FET is designed, a desired operation is obtained in which cutoff is not performed in a steady state and cutoff is performed depending on temperature when the current becomes N times or more.

As shown in FIG. 26, the area of the thermal resistance is uniquely determined with respect to a predetermined heat sink shape.

Therefore, a certain thermal power MOS-
With respect to the loss P of the FET, the areas A ₁ and A ₂ of the heat radiating plate 905 within the region of the thermal resistance represented by the expression 1.19 are equal to the loss P as shown in FIGS. The magnitude is determined by the value of (thermal resistance Rf). Therefore, the heat radiation area determined by the losses of the plurality of thermal power MOS-FETs having different losses is shown in FIG.
As shown in FIG. 8, the respective heat radiation areas are added.

When this is expressed by the equation, the area Af of the heat sink is represented by the thermal resistance Rt, where Af = f (Rt), Rt = g (Af) (Equation 1.20). Is represented by

(Tcutoff−Tamin) / (N × N × P) ≦ g (Af) <(Tcutoff−Tamax) / P (Equation 1.21) As described above, in the present embodiment, the area of the heat sink is determined by the equation 1. The feature is that it is set within the range of 21.

As described above, the power element is described as MOS-FE.
T (Metal Oxide Semiconductor Field Effect Transi
MIS-FET (Metal Insulator Semiconductor Fi)
eld Effect Transistor) but also IGBT (Insulated Gate)
It may be a bipolar transistor or a bipolar transistor.

Although the heat radiation supporting member, the substrate, and the heat sink (heat radiation plate) have been described separately in the above description, all or a part of them may be integrated or formed integrally. It does not depart from the spirit of the invention.

[0072]

As described above, according to the present invention, a plurality of modules (boxes, housings) mounted on each part of the vehicle having different steady-state loads (current or power) have an over-temperature protection function. The power element does not automatically shut off at a steady load, but the over-temperature protection can function satisfactorily by designing the automatic shut-off function to operate with an abnormal current (abnormal power consumption) set several times the steady load. it can. In addition, since the minimum wiring diameter for supplying power to the load can be specified, there is an economic effect.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a conventional technique.

FIG. 2 is an explanatory diagram of another conventional technique.

FIG. 3 is an operation explanatory diagram of a technical example.

FIG. 4 is an operation explanatory diagram of a technical example.

FIG. 5 is a block diagram showing a basic configuration of the present invention.

FIG. 6 is a block diagram showing another configuration of the present invention.

FIG. 7 is a diagram illustrating the basic operation of the present invention.

FIG. 8 is a block diagram showing another configuration of the present invention.

FIG. 9 is a block diagram of an embodiment of the present invention.

FIG. 10 is an explanatory diagram of the embodiment in FIG. 1;

FIG. 11 is another explanatory view of the embodiment in FIG. 1;

FIG. 12 is another explanatory view of the embodiment in FIG. 1;

FIG. 13 is another explanatory view of the embodiment of FIG. 1;

FIG. 14 is another explanatory view of the embodiment of FIG. 1;

FIG. 15 is a block diagram of another embodiment of the present invention.

FIG. 16 is an explanatory view of another embodiment of the present invention.

FIG. 17 is an explanatory view of another embodiment of the present invention.

FIG. 18 is a block diagram of still another embodiment of the present invention.

FIG. 19 is a block diagram of another embodiment of the present invention.

FIG. 20 is an explanatory view of still another embodiment of the present invention.

FIG. 21 is a view showing a mounting state of a thermal power MOS-FET.

FIG. 22 is a view for explaining a thermal circuit of a thermal power MOS-FET.

FIG. 23 is a view showing a relationship between a loss (power consumption) and a thermal resistance of a thermal power MOS-FET.

FIG. 24 is a view showing another mounting state of the thermal power MOS-FET.

FIG. 25 is a view for explaining the thermal circuit of the embodiment in FIG. 24;

FIG. 26 is a view showing a relationship between a heat resistance and a heat radiation area.

27 (a) and 27 (b) are diagrams showing a magnitude relationship between a loss P and a heat radiation area A.

FIG. 28 is a view showing the relationship between the loss of a plurality of thermal power MOS-FETs and the area of a heat sink.

[Explanation of symbols]

1,31 ... MOS-FET control means, 2,32,32 '
... MOS-FET, 3, 33, 33 ', 33-a to 33
-D, 51 to 55, 210-a to 210-m ... load, 4
... Battery, 32-a to 32-d, 113 to 116 ... MOS-FET with over-temperature protection function, 35, 35 '... Temperature detecting means, 36, 36' ... Temperature / voltage converter, 37, 3
7 ': comparison circuit, 38, 38': current monitoring means, 90,
91, 90-a to 90-d ... MOS-FET chip, 9
2,93,94,92-a to 92-d, 100,203
-A to 203-m ... thermal resistance, 110, 172, 173 ...
Housing, 45: communication means, 46: communication line, 150: package ambient temperature, 152: housing ambient air temperature, 901
... thermal power MOS-FET, 902 ... substrate, 90
3: heat sink, 911: thermal power MOS-F
ET loss, 912: chip temperature, 913: thermal resistance, 9
14: ambient temperature, 921: thermal resistance between substrate and ambient space, 9
22: thermal resistance between package and substrate, 923: thermal resistance between chip and package, 924: package (envelope), 9
25: chip temperature, 926: chip.

Continued on the front page (72) Inventor Tatsuya Yoshida 2520 Ojitakaba, Hitachinaka City, Ibaraki Prefecture Inside the Automotive Equipment Division of Hitachi, Ltd. Automotive Equipment Division (72) Inventor Mitsuhiko Watanabe 4-6 Kanda Surugadai, Chiyoda-ku, Tokyo Hitachi, Ltd.

Claims (16)

[Claims] An electric power is supplied from a battery of a vehicle to an actuator via a power element, and the power element is disposed close to a control terminal. A power supply control device for a vehicle, wherein the power supply control device is disposed on a board or a housing. 2. A power supply control device for a vehicle according to claim 1, wherein said power elements are composed of a plurality of groups, and are arranged on a support housing composed of partial substrates having different thermal resistances for each group. . 3. At least two or more loads driven by power supply from a battery of a vehicle, transmitting and receiving signals of a communication line wired to the vehicle, and generating a plurality of conduction / cutoff control signals from the received signals. A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. An over-temperature interrupting means for interrupting the current supply; and a heat-dissipating support member for supporting the power element, having a thermal resistance inversely proportional to a square of a current value in a steady state supplied to the plurality of loads. A switch control device with a temperature protection function. 4. At least two or more loads driven by power supply from a battery of a vehicle, and a signal of a communication line wired to the vehicle are transmitted and received, and a plurality of conduction / cutoff control signals are received from the received signal. A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. An over-temperature interrupting means for interrupting the current supply; and a heat-dissipating support member for supporting the power element, having a thermal resistance substantially inversely proportional to the average power consumption when the power element is turned on. Switch control device with temperature protection function. 5. A vehicle comprising: at least two or more loads driven by power supply from a battery of a vehicle; transmitting and receiving signals of a communication line wired to the vehicle; A plurality of power elements for conducting and interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal; detecting a temperature of the power element and detecting a predetermined temperature , Tcutoff or more, an over-temperature interrupting means for interrupting the current supply, and M heat dissipating support members for dividing and supporting the plurality of power elements into M groups, wherein the heat dissipated by the M heat dissipating support members is provided. The resistance Rt, the maximum value Pmax at the time of the steady loss P of the power element in the group, the normal use temperature Tamax, and the Tcutoff are in a relation of Rt <(Tcutoff-Tamax) / Pmax. Temperature protection function with a switch controller. 6. A vehicle comprising at least two or more loads driven by electric power supplied from a battery of a vehicle, transmitting and receiving signals of a communication line wired to the vehicle, and generating a plurality of conduction / cutoff control signals from the received signals. A plurality of power elements for conducting and interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal; detecting a temperature of the power element and detecting a predetermined temperature , Tcutoff or higher, an over-temperature interrupting means for interrupting the current supply, and M heat dissipating supporting members for dividing and supporting the plurality of power elements into M groups. The heat resistance Rt of the heat radiating support member and the minimum value of the power element in the group at the time of the steady loss P of the power element are defined as Pmin, and the relationship with the Tcutoff is Lt ≧ (L × Pmin) when the loss is L × Pmin. Tcuto ff-Tmax) / (L × Pmin). A switch control device with a temperature protection function, characterized in that: 7. The thermal resistance Rt of the M heat radiation supporting members according to claim 5 is (Tcutoff−Tmax) / (L × Pmin) ≦ Rt <(Tcutoff−
(Tamax) / Pmax. A switch control device having a temperature protection function. 8. A vehicle comprising: at least two or more loads driven by power supply from a battery of a vehicle; and a signal on a communication line wired to the vehicle. A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. A temperature control function-equipped switch control device comprising: an over-temperature interrupting means for interrupting the current supply, wherein the thermal resistance is inversely proportional to the square of a current value in a steady state supplied to each of the plurality of loads, and A switch control device with a temperature protection function, wherein each power element includes a heat dissipation support member that supports the power element. 9. At least two or more loads driven by power supply from a battery of a vehicle, and a signal of a communication line wired to the vehicle are transmitted and received, and a plurality of conduction / cutoff control signals are obtained from the received signal. A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. In a switch control device with a temperature protection function, comprising an over-temperature cut-off means for cutting off current supply, each of the power elements has a predetermined temperature at which the current supply is cut off as Tcutoff, and a maximum temperature in a normal use state as Tamax. Assuming that the minimum temperature in the use state is Tamin, and that the current supply is to be cut off at N times the current in the normal state, the loss of the power element is P and the heat sink supporting the power element is P. Assuming that the thermal resistance of the holding member is Rt, the thermal resistance of the radiating support member is represented by (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
−Tamax) / P. The switch control device with a temperature protection function, comprising the heat-dissipating support member in the range of: 10. A vehicle comprising: at least two or more loads driven by electric power supplied from a battery of a vehicle; transmitting and receiving signals of a communication line wired to the vehicle; A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. In a switch control device with a temperature protection function, comprising an over-temperature cut-off means for cutting off current supply, each of the power elements has a predetermined temperature at which the current supply is cut off as Tcutoff, and a maximum temperature in a normal use state as Tamax. Assuming that the minimum temperature in the use state is Tamin, and that the current supply is to be cut off at N times the current in the normal state, the loss of the power element is P and the heat dissipation supporting the power element is P. Assuming that the thermal resistance of the support member is Rt, the thermal resistance of the heat dissipation support member is represented by (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
−Tamax) / P The switch control device with a temperature protection function is provided with one heat dissipation support member in total. 11. A vehicle comprising: at least two or more loads driven by electric power supplied from a battery of a vehicle; transmitting and receiving signals of a communication line wired to the vehicle; A power element for conducting or interrupting the current supply from the battery to each of the loads according to the conduction / interruption control signal, and detecting a temperature of the power element. In a switch control device with a temperature protection function, comprising an over-temperature cut-off means for cutting off current supply, each of the power elements has a predetermined temperature at which the current supply is cut off as Tcutoff, and a maximum temperature in a normal use state as Tamax. Assuming that the minimum temperature in the use state is Tamin, and that the current supply is to be cut off at N times the current in the normal state, the loss of the power element is P and the heat dissipation supporting the power element is P. Assuming that the thermal resistance of the support member is Rt, the thermal resistance of the heat dissipation support member is represented by (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
-Tamax) / P The switch control device with a temperature protection function is provided with the independent heat dissipation support members so as to fall within the range. 12. A power element for conducting and interrupting current supply from a battery to each load, and an over-temperature interrupting means for detecting a temperature of the power element and interrupting the current supply when the temperature exceeds a predetermined temperature. In the switch control device with a temperature protection function provided, the heat dissipation support member having a heat resistance inversely proportional to the square of a current value in a steady state supplied to each of the plurality of loads, and supporting the power element, A switch control device with a temperature protection function, wherein each of the power elements includes: 13. A power element for conducting and interrupting current supply from a battery to each load, and an over-temperature interrupting means for detecting a temperature of the power element and interrupting the current supply when the temperature exceeds a predetermined temperature. In the switch control device with a temperature protection function provided, each of the power elements has a predetermined temperature at which the current supply is cut off is Tcutoff, a maximum temperature in a normal use state is Tamax, a minimum temperature in a normal use state is Tamin, and a normal state is Tamin. Assuming that it is desired to cut off the current supply with N times the current, if the loss of the power element is P and the thermal resistance of the radiating support member supporting the power element is Rt, the thermal resistance of the radiating supporting member is (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
−Tamax) / P. The switch control device with a temperature protection function, comprising the heat-dissipating support member in the range of: 14. A power element for conducting and interrupting the current supply from a battery to each load, and an over-temperature interrupting means for detecting the temperature of the power element and interrupting the current supply when the temperature exceeds a predetermined temperature. In the switch control device with a temperature protection function provided, each of the power elements has a predetermined temperature at which the current supply is cut off is Tcutoff, a maximum temperature in a normal use state is Tamax, a minimum temperature in a normal use state is Tamin, and a normal state is Tamin. Assuming that it is desired to cut off the current supply with N times the current, if the loss of the power element is P and the thermal resistance of the radiating support member supporting the power element is Rt, the thermal resistance of the radiating supporting member is (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
−Tamax) / P The switch control device with a temperature protection function is provided with one heat dissipation support member in total. 15. A power element for conducting and interrupting current supply from a battery to each load, and an over-temperature interrupting means for detecting a temperature of the power element and interrupting the current supply when the temperature exceeds a predetermined temperature. In the switch control device with a temperature protection function provided, each of the power elements has a predetermined temperature at which the current supply is cut off is Tcutoff, a maximum temperature in a normal use state is Tamax, a minimum temperature in a normal use state is Tamin, and a normal state is Tamin. Assuming that it is desired to cut off the current supply with N times the current, if the loss of the power element is P and the thermal resistance of the radiating support member supporting the power element is Rt, the thermal resistance of the radiating supporting member is (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
-Tamax) / P The switch control device with a temperature protection function is provided with the independent heat dissipation support members so as to be in the range of (Tamax) / P. 16. A power element for conducting and interrupting current supply from a battery to each load, and an over-temperature interrupting means for detecting a temperature of the power element and interrupting the current supply when the temperature exceeds a predetermined temperature. In the switch control device with a temperature protection function provided, the predetermined temperature at which the current supply is cut off is Tcutoff, the maximum temperature in the normal use state is Tamax, the minimum temperature in the normal use state is Tamin, and the current supply is N times the current in the normal state. And the thermal resistance of the heat radiating support member that supports the power element is Rt, the thermal resistance of the heat radiating support member is (Tcutoff−Tamin) / (N × N × P) ≦ Rt <(Tcutoff
−Tamax) / P. Each of the power elements has a size of the heat radiating support member in a range of −Tamax) / P, and the heat radiating support member of one size obtained by adding the sizes of the heat radiating support members is obtained. A switch control device with a temperature protection function, comprising: