JP2000021636A - Electronic component - Google Patents

Electronic component

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Publication number
JP2000021636A
JP2000021636A JP10182859A JP18285998A JP2000021636A JP 2000021636 A JP2000021636 A JP 2000021636A JP 10182859 A JP10182859 A JP 10182859A JP 18285998 A JP18285998 A JP 18285998A JP 2000021636 A JP2000021636 A JP 2000021636A
Authority
JP
Japan
Prior art keywords
electronic component
insulating resin
substrate
resin layer
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP10182859A
Other languages
Japanese (ja)
Inventor
Kenji Sato
健治 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP10182859A priority Critical patent/JP2000021636A/en
Publication of JP2000021636A publication Critical patent/JP2000021636A/en
Withdrawn legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide an electronic component of high reliability which satisfied the specification of low resistance. SOLUTION: In an electronic component 1 containing a substrate 3 and a plurality of flat coils 52a', 52b' which are laminated on the substrate in the thickness direction making insulating resin layers 51a-51d interpose, a plurality of the coils 52a', 52b' are so laminated that a coil 52b of the next layer is accommodated in a recessed part of the unevenness generated in the insulating resin layer 51b covering the coil 52a'.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、インダクタ
(L)、キャパシタ(C)、抵抗素子(R)等の単一素
子部品、又はEMIフィルタ、コモンモードチョークコ
イル、カレントセンサ、信号トタンス等の複合素子部品
等の電子部品(表面実装部品、リード部品)に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single element component such as an inductor (L), a capacitor (C), a resistance element (R), or a composite of an EMI filter, a common mode choke coil, a current sensor, a signal capacitance, and the like. The present invention relates to electronic components such as element components (surface mounted components, lead components).

【0002】[0002]

【従来の技術】従来、この種の電子部品は、図5の断面
図に示される構成が知られている。
2. Description of the Related Art Heretofore, this type of electronic component has been known in a configuration shown in a sectional view of FIG.

【0003】この断面図においては、電子部品1の回路
素子5は、絶縁性であるアルミナ等の基板3の表面にフ
ォトリソグラフィ技術を用いて形成されており、絶縁樹
脂層51a,51b,51c,51dは、ポリイミド又
はBCB等を使用し、導体パターン層52a,52b,
52cは、Cu金属等を主成分としたスパッタ又はメッ
キにて形成されている。
In this cross-sectional view, a circuit element 5 of an electronic component 1 is formed on the surface of a substrate 3 made of an insulating material such as alumina using a photolithography technique, and has insulating resin layers 51a, 51b, 51c, 51c. 51d is made of polyimide or BCB or the like, and has conductor pattern layers 52a, 52b,
52c is formed by sputtering or plating mainly composed of Cu metal or the like.

【0004】また、フォトリソグラフィ技術によるポリ
イミド又はBCBでの絶縁樹脂層、レジストでの導体パ
ターン層を形成するには、下層の平坦性が必要であるこ
とは言うまでもなく、凹凸が著しいと安定したフォトリ
ソグラフィが出来なくなり、形成する形状がばらつき、
必要形状及び必要特性に悪影響を与える。
Also, in order to form an insulating resin layer of polyimide or BCB by photolithography and a conductor pattern layer of resist, it is needless to say that the lower layer is required to be flat. Lithography becomes impossible, the shape to be formed varies,
The required shape and required characteristics are adversely affected.

【0005】また、絶縁樹脂層となる絶縁樹脂は、感光
性樹脂を用いるとプロセスの簡略化が図れる。導体パタ
ーン層を電気メッキによって形成する際は、少なからず
下地膜としてのTi−Cu、Cr−Cu等をスパッタに
て形成する必要があると共にエッチングによる所要形状
の確保が必要と言える。
When a photosensitive resin is used as the insulating resin to be the insulating resin layer, the process can be simplified. When the conductor pattern layer is formed by electroplating, it is necessary to form not only Ti--Cu, Cr--Cu, etc. as a base film by sputtering, but also to secure a required shape by etching.

【0006】上記方法により絶縁樹脂層と導体パターン
層を交互に積層していくことで回路素子5を形成した上
で、チップ形状に基板3を切断し、チップ形状の基板3
の端面に回路素子5の回路と電気的導通が可能な外部電
極を形成することで電子部品1を製造している。
After the circuit element 5 is formed by alternately laminating the insulating resin layer and the conductor pattern layer by the above method, the substrate 3 is cut into a chip shape.
The electronic component 1 is manufactured by forming an external electrode that can be electrically connected to the circuit of the circuit element 5 on the end face of the electronic component 1.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前記回
路素子の抵抗を1/2〜1/4程度低くして特性改善を
図りたい場合、平面コイルの導体パターンの膜厚を2〜
4倍程度増やす必要があり、平面コイルを上下に対向さ
せて積層を重ねて行くにつれて、表面の凹凸が著しくな
り、安定したフォトリソグラフィが出来ず、電気検査に
おいて断線・短絡が頻発して信頼性のある製品を製造す
ることが難しいと言う欠点があった。
However, when it is desired to improve the characteristics by lowering the resistance of the circuit element by about 1/2 to 1/4, the thickness of the conductor pattern of the planar coil is set to 2 to 2.
It is necessary to increase about 4 times, and as the stack is stacked with the planar coils facing up and down, the surface irregularities become remarkable, and stable photolithography cannot be performed. There is a drawback that it is difficult to manufacture a product with a problem.

【0008】そこで本発明の技術的課題は、信頼性が高
くかつ低抵抗の仕様の充実した電子部品を提供すること
にある。
[0008] Therefore, a technical object of the present invention is to provide an electronic component having high reliability and low resistance and having a sufficient specification.

【0009】[0009]

【課題を解決するための手段】本発明によれば、基板
と、該基板上に絶縁樹脂層を介在させて厚さ方向に積層
された複数の平面コイルとを含む電子部品において、前
記複数の平面コイルは、一の平面コイルを覆う前記絶縁
樹脂層に生じた凹凸の凹部に次の層の平面コイルが収容
されるように積層されていることを特徴とする電子部品
が得られる。
According to the present invention, there is provided an electronic component including a substrate and a plurality of planar coils stacked in a thickness direction with an insulating resin layer interposed on the substrate. An electronic component is obtained in which the planar coils are stacked such that the planar coil of the next layer is accommodated in concave and convex portions formed in the insulating resin layer covering the one planar coil.

【0010】また、本発明によれば、基板と、該基板上
に絶縁樹脂層を介在させて厚さ方向に積層された複数の
平面コイルとを含む電子部品において、前記複数の平面
コイルの内の一の平面コイルを構成する導体パターンの
間にある空間に前記絶縁樹脂層が入り込むことによって
生じた前記絶縁樹脂層の凹部に、次の層の平面コイルを
構成する導体パターンが配置されていることを特徴とす
る電子部品が得られる。
According to the present invention, in an electronic component including a substrate and a plurality of planar coils laminated in a thickness direction with an insulating resin layer interposed on the substrate, the electronic component includes a plurality of planar coils. A conductor pattern forming a plane coil of the next layer is arranged in a concave portion of the insulating resin layer caused by the insulating resin layer entering a space between the conductor patterns forming the one plane coil. An electronic component characterized by the above is obtained.

【0011】更に、本発明によれば、前記平面コイルを
構成する導体パターンの厚みを2〜20μmとし、前記
導体パターンの幅を30μm以下とし、前記空間の幅を
前記導体パターンの幅よりも大きくしたことを特徴とす
る電子部品が得られる。
Further, according to the present invention, the thickness of the conductor pattern constituting the planar coil is 2 to 20 μm, the width of the conductor pattern is 30 μm or less, and the width of the space is larger than the width of the conductor pattern. Thus, an electronic component characterized by the following is obtained.

【0012】[0012]

【作用】上述の構成により、前記平面コイルの導体パタ
ーンの膜厚を2〜4倍程度増して製造しても従来通りの
安定したフォトリソグラフィが可能となり、また電気検
査における断線・短絡の発生もなく、低コストでかつ信
頼性のある1/2〜1/4程度抵抗を低下させた仕様拡
充が可能となる。
According to the above-mentioned structure, even if the thickness of the conductor pattern of the planar coil is increased by about 2 to 4 times, stable photolithography can be performed as before, and disconnection and short circuit in the electrical inspection can be prevented. In addition, it is possible to expand the specification at a low cost and with a low resistance of about 1/2 to 1/4 which is reliable.

【0013】[0013]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0014】図1は本発明の一実施形態による電子部品
の要部の断面図であり、図2は図1に示す電子部品の分
解斜視図である。
FIG. 1 is a sectional view of a main part of an electronic component according to an embodiment of the present invention, and FIG. 2 is an exploded perspective view of the electronic component shown in FIG.

【0015】電子部品1の素体となる基板3は、絶縁性
であり、かつ容易に切断が可能であるマシナブルセラミ
クスを用いている。ここで、基板3にガラセラ基板又は
青板ガラス等を使用することも可能であることは言うま
でもなく、より低コスト化が図れる。
The substrate 3, which is a body of the electronic component 1, is made of machinable ceramics which is insulative and can be easily cut. Here, it is needless to say that a glassacea substrate or a soda lime glass or the like can be used for the substrate 3, and the cost can be further reduced.

【0016】また、電子部品1の回路素子5は、2回路
構成であり、絶縁樹脂層51a,51b,51c,51
dについては、フォトリソグラフィ技術が容易である感
光性BCBにて形成し、導体パターン層52a,52
b,52c,52dについては、次のようにして形成す
る。先ず、下地膜としてTi−Cuをスパッタで形成
し、その後、この下地膜上にフォトリソグラフィ技術に
てレジストを所要のパターン(Cu導体パターン層を形
成するためのパターン)に形成し、このレジストをマス
クとしてレジストのパターン上に電気メッキにてCuを
必要な厚みだけ析出し、その後、レジスト剥離を実施す
ることで露出する下地膜Cuと電気メッキにて得たCu
導体パターン層の全表面を下地膜Tiが現れるまでエッ
チングし、その現れた下地膜Tiについても、Cu導体
パターン層の下にある下地膜Tiを除いて、エッチング
除去している。尚、前述のエッチング加工は、ウェット
処理により容易にできるが、ドライ処理でも特に問題は
なく、作業的には安全であると言える。
The circuit element 5 of the electronic component 1 has a two-circuit configuration, and includes insulating resin layers 51a, 51b, 51c, 51
As for d, the conductive pattern layers 52a and 52b are formed by photosensitive BCB in which the photolithography technique is easy.
b, 52c and 52d are formed as follows. First, Ti-Cu is formed as a base film by sputtering, and then a resist is formed on the base film by a photolithography technique in a required pattern (a pattern for forming a Cu conductor pattern layer). As a mask, a required thickness of Cu is deposited on the pattern of the resist by electroplating, and then, the underlying film Cu exposed by performing the resist stripping and the Cu obtained by electroplating
The entire surface of the conductive pattern layer is etched until the underlying film Ti appears, and the exposed underlying film Ti is also etched away except for the underlying film Ti under the Cu conductive pattern layer. The above-mentioned etching process can be easily performed by a wet process, but there is no particular problem in a dry process, and it can be said that the process is safe.

【0017】ここで、導体パターン層52a,52b
は、それぞれ回路の平面コイル(好ましくは1ターン以
上のコイル)であり、同一層内に配置することはなく、
絶縁樹脂層51bを介して積層しており、かつ導体パタ
ーン層52a,52bの平面コイルを構成する導体パタ
ーン52a′,52b′は、上下(導体パターンの厚さ
方向)で対向するのではなく、これらで挟み込む絶縁樹
脂層51aに発生する凹凸形状の凹部に配置し、平面コ
イルのスペース部(導体パターンの間にある空間)にそ
の上の層の導体パターンが配置される様に積層を実施し
ている。
Here, the conductor pattern layers 52a, 52b
Are planar coils (preferably one or more turns) of a circuit, and are not arranged in the same layer.
The conductor patterns 52a 'and 52b', which are laminated via the insulating resin layer 51b and form the planar coil of the conductor pattern layers 52a and 52b, do not face each other vertically (in the thickness direction of the conductor pattern). Lamination is carried out such that the conductor pattern of the layer above is arranged in the concave portion of the uneven shape generated in the insulating resin layer 51a sandwiched between them, and the conductor pattern of the layer thereover is arranged in the space portion (space between the conductor patterns) of the planar coil. ing.

【0018】また、上述の各導体パターンは、厚みを1
2μm程度にしている。また、導体パターンのパターン
幅は、20μm程度にしてあり、平面コイルのスペース
部については、導体パターンのパターン幅の少なくとも
1倍以上として24μm程度となる様に構成している。
Each of the above conductor patterns has a thickness of one.
It is about 2 μm. The pattern width of the conductor pattern is set to about 20 μm, and the space portion of the planar coil is configured to be about 24 μm, which is at least one time greater than the pattern width of the conductor pattern.

【0019】図3は図1に示す電子部品の全体像を示す
斜視図である。
FIG. 3 is a perspective view showing an overall image of the electronic component shown in FIG.

【0020】図には示さないが、回路素子5は同一基板
3上に多数配列させて形成してあるので、図3に示すよ
うに、個々の回路素子5に対応させて基板3を切断し、
これに外部電極7a,7b,8a,8bを形成すること
で、電子部品1を完成させている。ここで、外部電極7
a,7b,8a,8bは、回路素子5の導体パターン層
52d上、及び基板3の端面に熱硬化樹脂にNi等の金
属が混在した導電ペーストにて外部電極下地を形成し、
Ni膜、半田膜等にて外部電極7a,7b,9a,9b
が形成されていることは言うまでもない。
Although not shown in the figure, since a large number of circuit elements 5 are arranged on the same substrate 3, the substrate 3 is cut corresponding to each circuit element 5 as shown in FIG. ,
By forming the external electrodes 7a, 7b, 8a, 8b on this, the electronic component 1 is completed. Here, the external electrode 7
a, 7b, 8a and 8b are formed on the conductive pattern layer 52d of the circuit element 5 and on the end face of the substrate 3 by forming an external electrode base with a conductive paste in which a metal such as Ni is mixed in a thermosetting resin;
External electrodes 7a, 7b, 9a, 9b using Ni film, solder film, etc.
It is needless to say that is formed.

【0021】図4は図3に示す電子部品の等価回路図で
ある。
FIG. 4 is an equivalent circuit diagram of the electronic component shown in FIG.

【0022】図4から明らかなように、回路素子5の2
回路構成は、少なくともそれぞれ平面コイルを有する様
に構成されている。
As is apparent from FIG.
The circuit configuration is configured to have at least each planar coil.

【0023】[0023]

【発明の効果】以上に説明したように、本発明によれ
ば、低抵抗の仕様拡充において平面コイルの導体パター
ンの膜厚を2〜4倍程度増やしても、従来通りの安定し
たフォトリソグラフィが可能で、電気検査における断線
・短絡の発生もなく、低コストでかつ信頼性のある電子
製品を従来通りに提供することにある。
As described above, according to the present invention, the conventional stable photolithography can be achieved even if the thickness of the conductor pattern of the planar coil is increased by about 2 to 4 times when the specification of the low resistance is expanded. An object of the present invention is to provide a low-cost and reliable electronic product that is possible, has no disconnection or short circuit in an electrical test, and has low cost and reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態による電子部品の要部の断
面図である。
FIG. 1 is a sectional view of a main part of an electronic component according to an embodiment of the present invention.

【図2】図1に示す電子部品の分解斜視図である。FIG. 2 is an exploded perspective view of the electronic component shown in FIG.

【図3】図1に示す電子部品の全体像を示す斜視図であ
る。
FIG. 3 is a perspective view showing an overall image of the electronic component shown in FIG.

【図4】図3に示す電子部品の等価回路図である。4 is an equivalent circuit diagram of the electronic component shown in FIG.

【図5】従来の電子部品の要部の断面図である。FIG. 5 is a cross-sectional view of a main part of a conventional electronic component.

【符号の説明】[Explanation of symbols]

1 電子部品 3 基板 5 回路素子 51a 絶縁樹脂層 51b 絶縁樹脂層 51c 絶縁樹脂層 51d 絶縁樹脂層 52a 導体パターン層 52b 導体パターン層 52c 導体パターン層 52d 導体パターン層 7a 外部電極 7b 外部電極 9a 外部電極 9b 外部電極 DESCRIPTION OF SYMBOLS 1 Electronic component 3 Substrate 5 Circuit element 51a Insulating resin layer 51b Insulating resin layer 51c Insulating resin layer 51d Insulating resin layer 52a Conductive pattern layer 52b Conductive pattern layer 52c Conductive pattern layer 52d Conductive pattern layer 7a External electrode 7b External electrode 9a External electrode 9b External electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 基板と、該基板上に絶縁樹脂層を介在さ
せて厚さ方向に積層された複数の平面コイルとを含む電
子部品において、前記複数の平面コイルは、一の平面コ
イルを覆う前記絶縁樹脂層に生じた凹凸の凹部に次の層
の平面コイルが収容されるように積層されていることを
特徴とする電子部品。
1. An electronic component including a substrate and a plurality of planar coils stacked in a thickness direction with an insulating resin layer interposed on the substrate, wherein the plurality of planar coils cover one planar coil. An electronic component, wherein the planar coil of the next layer is stacked in a concave portion of the unevenness generated in the insulating resin layer.
【請求項2】 基板と、該基板上に絶縁樹脂層を介在さ
せて厚さ方向に積層された複数の平面コイルとを含む電
子部品において、前記複数の平面コイルの内の一の平面
コイルを構成する導体パターンの間にある空間に前記絶
縁樹脂層が入り込むことによって生じた前記絶縁樹脂層
の凹部に、次の層の平面コイルを構成する導体パターン
が配置されていることを特徴とする電子部品。
2. An electronic component comprising: a substrate; and a plurality of planar coils stacked in a thickness direction with an insulating resin layer interposed on the substrate, wherein one of the plurality of planar coils is replaced with a planar coil. A conductor pattern forming a planar coil of the next layer is disposed in a concave portion of the insulating resin layer caused by the insulating resin layer entering a space between the conductor patterns to be formed. parts.
【請求項3】 前記平面コイルを構成する導体パターン
の厚みを2〜20μmとし、前記導体パターンの幅を3
0μm以下とし、前記空間の幅を前記導体パターンの幅
よりも大きくしたことを特徴とする請求項2記載の電子
部品。
3. The conductor pattern forming the planar coil has a thickness of 2 to 20 μm, and a width of the conductor pattern is 3 μm.
3. The electronic component according to claim 2, wherein the width of the space is set to be 0 μm or less, and the width of the space is made larger than the width of the conductor pattern.
JP10182859A 1998-06-29 1998-06-29 Electronic component Withdrawn JP2000021636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10182859A JP2000021636A (en) 1998-06-29 1998-06-29 Electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10182859A JP2000021636A (en) 1998-06-29 1998-06-29 Electronic component

Publications (1)

Publication Number Publication Date
JP2000021636A true JP2000021636A (en) 2000-01-21

Family

ID=16125708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10182859A Withdrawn JP2000021636A (en) 1998-06-29 1998-06-29 Electronic component

Country Status (1)

Country Link
JP (1) JP2000021636A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006324490A (en) * 2005-05-19 2006-11-30 Matsushita Electric Ind Co Ltd Electronic component and manufacturing method thereof
WO2013054587A1 (en) * 2011-10-13 2013-04-18 株式会社村田製作所 Electronic component and method for producing same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006324490A (en) * 2005-05-19 2006-11-30 Matsushita Electric Ind Co Ltd Electronic component and manufacturing method thereof
WO2013054587A1 (en) * 2011-10-13 2013-04-18 株式会社村田製作所 Electronic component and method for producing same
JP5610081B2 (en) * 2011-10-13 2014-10-22 株式会社村田製作所 Electronic component and manufacturing method thereof
JPWO2013054587A1 (en) * 2011-10-13 2015-03-30 株式会社村田製作所 Electronic component and manufacturing method thereof
US9240273B2 (en) 2011-10-13 2016-01-19 Murata Manufacturing Co., Ltd. Electronic component and method for producing same

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