JP2000021613A - Manufacture of chip resistor - Google Patents

Manufacture of chip resistor

Info

Publication number
JP2000021613A
JP2000021613A JP10183789A JP18378998A JP2000021613A JP 2000021613 A JP2000021613 A JP 2000021613A JP 10183789 A JP10183789 A JP 10183789A JP 18378998 A JP18378998 A JP 18378998A JP 2000021613 A JP2000021613 A JP 2000021613A
Authority
JP
Japan
Prior art keywords
electrode films
resistance film
film
resistive film
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10183789A
Other languages
Japanese (ja)
Inventor
Toshihiro Teramae
敏宏 寺前
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP10183789A priority Critical patent/JP2000021613A/en
Publication of JP2000021613A publication Critical patent/JP2000021613A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To reduce mixed unacceptable products whose overlap is extremely small in manufacturing by forming notched parts or through holes in the parts on which either electrode film of both the pairs of right and left electrode films which have lateral width larger than that of a resistance film is overlapped with the resistance film. SOLUTION: After material paste is spread on a resistance film partly overlapping by using screen printing, both electrode films 8, 9 are formed by drying and baking. A lateral width W2 of the electrode films is larger than the lateral width of the resistance film which is previously formed and set as a dimension approximate to the lateral width of an insulating board 1. In both of the electrode films 8, 9, notched parts 10, 11 are formed on parts overlapping with the resistance film. Even if, both ends of the resistance film are covered with both of the electrode films 8, 9 a parts of which are overlapped with both of the ends, both of the ends of the resistance film are seen in the notched parts 10, 11, degree and quality of print deviation in the longitudinal direction of the resistance film out of print deviation between the resistance film and both of the electrode films 8, 9 can surely recognized.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップ型の絶縁基
板の上面に、抵抗膜を厚膜状に形成して成るチップ型抵
抗器において、その製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip-type resistor in which a resistive film is formed in a thick film on an upper surface of a chip-type insulating substrate.

【0002】[0002]

【従来の技術】一般に、この種のチップ型抵抗器は、そ
の絶縁基板の上面に、厚膜の抵抗膜と、この抵抗膜の両
端に対して電気的に接続する左右一対の電極膜とを形成
すると言う構成である。従来、このチップ型抵抗器は、
絶縁基板の上面に、先づ、前記左右一対の電極膜を、そ
の材料ペーストをスクリーン印刷にて塗着したのち乾燥
・焼成することによって形成し、次いで、前記抵抗膜
を、その材料ペーストを両電極膜に対して一部だけ重な
るようにスクリーン印刷にて塗着したのち乾燥・焼成す
ることによって形成すると言う製造方法を採用してい
た。
2. Description of the Related Art Generally, a chip resistor of this type includes a thick resistive film and a pair of left and right electrode films electrically connected to both ends of the resistive film on the upper surface of an insulating substrate. It is a structure called forming. Conventionally, this chip type resistor
First, on the upper surface of the insulating substrate, the pair of left and right electrode films is formed by applying the material paste by screen printing, and then drying and firing. Then, the resistive film is coated with the material paste. A manufacturing method has been adopted in which coating is performed by screen printing so as to partially overlap the electrode film, followed by drying and firing to form the electrode film.

【0003】しかし、このように、先に、左右一対の電
極膜を、次いで、抵抗膜をその両端の一部が前記両電極
膜に重なるように形成することは、抵抗膜における膜厚
さが変化するばかりか、両電極膜における一部の成分が
抵抗膜中に拡散するから、抵抗膜の性能が低下すること
になる。そこで、最近では、例えば、特開昭64−73
702号公報等に記載されているように、絶縁基板の上
面に、先づ、厚膜の抵抗膜を、その材料ペーストをスク
リーン印刷にて塗着したのち乾燥・焼成することによっ
て形成し、次いで、前記両電極膜を、その材料ペースト
を抵抗膜に対して一部だけ重なるようにスクリーン印刷
にて塗着したのち乾燥・焼成することによって形成する
と言う製造方法を採用している。
However, as described above, forming a pair of left and right electrode films first, and then forming a resistive film such that a part of both ends thereof overlaps with the two electrode films is necessary to reduce the thickness of the resistive film. In addition to the change, some components in both electrode films diffuse into the resistance film, so that the performance of the resistance film is reduced. Therefore, recently, for example, Japanese Patent Application Laid-Open No. 64-73
As described in JP-A-702, for example, a thick resistive film is first formed on the upper surface of an insulating substrate by applying its material paste by screen printing, drying and firing, and then forming In addition, a manufacturing method is adopted in which the two electrode films are formed by applying a material paste by screen printing so as to partially overlap the resistance film, followed by drying and firing.

【0004】[0004]

【発明が解決しようとする課題】しかし、この製造のよ
うに、先に抵抗膜を、次いで、その両端に対する両電極
膜を形成すると言う製造方法において、両電極膜におけ
る横幅寸法は、前記特開昭64−73702号公報の第
2図等に記載されているように、両電極膜と抵抗膜との
相互間に存在する印刷ずれのうち抵抗膜の横幅方向への
印刷ずれを考慮して、抵抗膜における横幅寸法よりも大
きくするように構成されるが、このように構成すると、
抵抗膜の両端が、これに一部重なる両電極膜によって覆
い隠されることになって、この抵抗膜を両端を認識する
ことができないから、抵抗膜と両電極膜との相互間に存
在する印刷ずれのうち抵抗膜の長さ方向への印刷ずれの
ために、抵抗膜の一端に対する一方の電極膜の重なりが
極端に小さくなっている状態になっていても、これを製
造工程から除外することができずに、そのまま最終工程
まで移行され、製造された製品の中に、前記した重なり
が極端に小さくなっている不良品が混入するおそれが大
きいと言う問題があった。
However, in this manufacturing method in which a resistive film is formed first, and then both electrode films are formed on both ends of the resistive film as in this manufacturing method, the width of each of the electrode films is determined by the method disclosed in As described in, for example, FIG. 2 of JP-A-64-73702, among the printing shifts existing between the two electrode films and the resistive film, the printing shift in the width direction of the resistive film is taken into consideration. It is configured to be larger than the width dimension of the resistive film.
Since both ends of the resistive film are covered by the two electrode films that partially overlap the resistive film, the two ends of the resistive film cannot be recognized. Even if the overlap of one electrode film with one end of the resistive film is extremely small due to printing displacement in the length direction of the resistive film, it should be excluded from the manufacturing process. However, there is a problem that there is a high possibility that the above-mentioned defective product whose overlap is extremely small is mixed in the manufactured product without being transferred to the final process.

【0005】本発明は、この問題を解消した製造方法を
提供することを技術的課題とするものである。
An object of the present invention is to provide a manufacturing method which solves this problem.

【0006】[0006]

【課題を解決するための手段】この技術的課題を達成す
るため本発明は、「チップ型絶縁基板の上面に、先づ、
抵抗膜を、その材料ペーストの塗着及び乾燥・焼成にて
形成し、次いで、この抵抗膜よりも大きい横幅寸法した
左右一対の両電極膜を、その材料ペーストの塗着及び乾
燥・焼成にて形成するようにした製造方法において、前
記両電極膜を形成するに際して、当該両電極膜のうち少
なくともいずれか一方の電極膜が前記抵抗膜に対して重
なる部分に切欠部又は抜き孔を設けたことを特徴とす
る。」ものである。
In order to achieve this technical object, the present invention provides a method for manufacturing a semiconductor device comprising the steps of:
A resistive film is formed by applying the material paste, drying and firing, and then forming a pair of left and right electrode films having a larger width than the resistive film by applying the material paste and drying and firing. In the manufacturing method, a notch or a hole is provided in a portion where at least one of the two electrode films overlaps the resistance film when forming the two electrode films. It is characterized by. Is the thing.

【0007】[0007]

【発明の作用・効果】このように、抵抗膜より後から形
成する両電極膜を、当該両電極膜のうち少なくともいず
れか一方の電極膜が前記抵抗膜に対して重なる部分に切
欠部又は抜き孔を設けて形成することにより、抵抗膜の
両端が、これに一部重なる両電極膜によって覆い隠され
ていても、この抵抗膜における一端は、この両端を覆い
隠す両電極膜のうちいずれか一方の電極膜に設けた切欠
部又は抜き孔内に見えることになるから、これによっ
て、抵抗膜と両電極との相互間に存在する印刷ずれのう
ち抵抗膜の長さ方向への印刷ずれの程度、ひいては、前
記印刷ずれの良否を確実に認識することができるのであ
る。
As described above, the two electrode films formed after the resistive film are cut or cut out at a portion where at least one of the two electrode films overlaps the resistive film. By forming the holes, even if both ends of the resistive film are covered by the two electrode films partially overlapping with each other, one end of the resistive film is formed by any one of the two electrode films covering the both ends. This can be seen in the notch or the hole formed in one of the electrode films, and as a result, the printing displacement in the longitudinal direction of the resistive film among the print displacements existing between the resistive film and the two electrodes can be reduced. The extent and, consequently, the quality of the printing deviation can be reliably recognized.

【0008】つまり、本発明によると、抵抗膜と両電極
膜との相互間に存在する印刷ずれのうち抵抗膜の長さ方
向に沿っての印刷ずれの程度、ひいては、前記印刷ずれ
の良否を、前記両電極膜のうちいずれか一方の電極膜が
抵抗膜に対して重なる部分に設けた切欠部又は抜き孔に
よって確実に認識できることにより、この長さ方向への
印刷ずれの大きいものをチップ型抵抗器の製造工程から
除外することができるから、製品の中に重なりの小さい
不良品が混入するおそれを大幅に低減できる効果を有す
る。
That is, according to the present invention, the degree of the printing shift along the length direction of the resistive film among the print shifts existing between the resistive film and the two electrode films, and furthermore, the quality of the print shift is determined. The chip type having a large printing displacement in the length direction can be reliably recognized by a notch or a hole provided in a portion where one of the two electrode films overlaps the resistance film. Since it can be excluded from the manufacturing process of the resistor, there is an effect that the possibility that a defective product having a small overlap is mixed in the product can be greatly reduced.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施の形態を図面
について説明する。図1は、一つのチップ型抵抗器を構
成する長さ寸法Lで横幅寸法Wの矩形状絶縁基板1の複
数個を縦及び横方向に並べて一体化すると共に、周囲に
余白部3,4を一体的に設けて成る素材セラミック基板
2を示す。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a plurality of rectangular insulating substrates 1 having a length L and a width W constituting a single chip type resistor, which are arranged side by side in the vertical and horizontal directions and integrated with margins 3 and 4 around the periphery. 1 shows a material ceramic substrate 2 provided integrally.

【0010】なお、この図1において、符号5,6は、
前記素材セラミック基板2を前記各絶縁基板1ごとにブ
レイクするための筋目溝を示す。前記素材セラミック基
板2における上面のうち前記各絶縁基板1の部分に、図
2に示すように、先づ、横幅寸法W1の厚膜状抵抗膜7
を、その材料ペーストをスクリーン印刷にて塗着したの
ち乾燥・焼成することによって形成する。
In FIG. 1, reference numerals 5 and 6 are:
The figure shows a groove for breaking the material ceramic substrate 2 for each of the insulating substrates 1. As shown in FIG. 2, a thick film-shaped resistive film 7 having a width W1
Is formed by applying the material paste by screen printing, followed by drying and firing.

【0011】次いで、前記素材セラミック基板2におけ
る上面のうち前記各絶縁基板1の部分に、図3に示すよ
うに、両電極膜8,9を、その材料ペーストを抵抗膜7
に対して一部だけ重なるようにスクリーン印刷にて塗着
したのち乾燥・焼成することによって形成する。なお、
この両電極膜8,9における横幅寸法W2は、先に形成
した抵抗膜7における横幅寸法W1よりも大きくて、絶
縁基板1における横幅寸法Wに近似した寸法に設定され
ている。
Next, as shown in FIG. 3, both electrode films 8 and 9 are applied to a portion of the upper surface of the material ceramic substrate 2 where the insulating substrate 1 is provided, and the material paste is applied to a resistive film 7.
It is formed by applying by screen printing so as to partially overlap, followed by drying and baking. In addition,
The width W2 of each of the electrode films 8, 9 is set to be larger than the width W1 of the previously formed resistive film 7 and approximate to the width W of the insulating substrate 1.

【0012】そして、前記両電極膜8,9の形成に際し
ては、この両電極膜8,9のうち前記抵抗膜7に対して
重なる部分に切欠部10,11を設けるようにして形成
するのである。このように、抵抗膜7よりも後から形成
する両電極膜8,9を、当該両電極膜8,9のうち前記
抵抗膜7に対して重なる部分に切欠部10,11を設け
て形成することにより、抵抗膜7の両端が、これに一部
重なる両電極膜8,9によって覆い隠されていても、こ
の抵抗膜7の両端は、この両端を覆い隠す両電極膜8,
9に設けた切欠部10,11内に見えることになるか
ら、これによって、抵抗膜7と両電極8,9との相互間
に存在する印刷ずれのうち抵抗膜7の長さ方向への印刷
ずれの程度、ひいては、印刷ずれの良否を確実に認識す
ることができる。
When the two electrode films 8 and 9 are formed, the notch portions 10 and 11 are formed in portions of the two electrode films 8 and 9 which overlap with the resistance film 7. . As described above, the two electrode films 8 and 9 formed later than the resistance film 7 are formed by providing the cutouts 10 and 11 in portions of the two electrode films 8 and 9 that overlap the resistance film 7. Thus, even if both ends of the resistive film 7 are covered by the two electrode films 8 and 9 partially overlapping the resist film 7, both ends of the resistive film 7 cover the two ends.
9 can be seen in the cutouts 10 and 11 provided in the resistive film 9, thereby printing in the longitudinal direction of the resistive film 7 in the printing displacement existing between the resistive film 7 and the electrodes 8 and 9. It is possible to reliably recognize the degree of the shift, and thus the quality of the print shift.

【0013】なお、前記した実施の形態は、前記両電極
膜8,9のうち抵抗膜7に対して重なる部分に切欠部1
0,11を設けた場合を示したが、この切欠部10,1
1に代えて、図4に示すように、抜き孔10′,11′
に構成しても良い。また、両電極膜8,9の両方に、切
欠部10,11又は抜き孔10′,11′を設けること
に代えて、両電極膜8,9のうちいずれか一方の電極膜
にのみ切欠部又は抜き孔を設けることによっても、抵抗
膜7と両電極8,9との相互間に存在する印刷ずれのう
ち抵抗膜7の長さ方向への印刷ずれの程度、ひいては、
印刷ずれの良否を確実に認識することができるのであ
る。
In the above-described embodiment, the notch 1 is formed in a portion of the two electrode films 8 and 9 which overlaps the resistance film 7.
Although the case where 0 and 11 are provided is shown, the notches 10 and 1 are provided.
1, the holes 10 ', 11' as shown in FIG.
May be configured. Instead of providing the cutouts 10 and 11 or the holes 10 ′ and 11 ′ in both the electrode films 8 and 9, the cutouts are formed only in one of the electrode films 8 and 9. Alternatively, by providing the holes, the degree of the printing shift in the length direction of the resistive film 7 among the print shifts existing between the resistive film 7 and the two electrodes 8 and 9, and further,
It is possible to reliably recognize the quality of the print misregistration.

【0014】また、前記したように、両電極膜8,9を
形成した後は、概略的に、抵抗膜7に対してガラスによ
るアンダーコートを形成する工程、前記抵抗膜7にその
抵抗値が所定値になるようにトリミング調整する工程、
絶縁基板1の上面に保護膜を形成する工程、前記素材セ
ラミック基板2を横方向の筋目溝5に沿って複数個の絶
縁基板1が横方向に並ぶ棒状基板にブレイクする工程、
この棒状基板における各各絶縁基板1の両端面に側面電
極膜を前記両電極膜8,9に電気的に接続するように形
成する工程、この棒状基板を縦方向の筋目溝5に沿って
各絶縁基板1ごとにブレイクする工程を経て、チップ型
抵抗器の完成品にするのである。
As described above, after the formation of the two electrode films 8 and 9, a step of forming an undercoat of glass on the resistance film 7. A step of trimming adjustment to a predetermined value,
A step of forming a protective film on the upper surface of the insulating substrate 1, a step of breaking the material ceramic substrate 2 along a lateral groove 5 into a rod-shaped substrate in which a plurality of insulating substrates 1 are arranged in a horizontal direction,
A step of forming side electrode films on both end surfaces of each insulating substrate 1 in the rod-shaped substrate so as to be electrically connected to the two electrode films 8 and 9; Through a step of breaking for each insulating substrate 1, a chip-type resistor is completed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態に使用する素材セラミック
基板の一部を示す斜視図である。
FIG. 1 is a perspective view showing a part of a material ceramic substrate used in an embodiment of the present invention.

【図2】前記素材セラミック基板における各絶縁基板に
抵抗膜を形成した状態を示す斜視図である。
FIG. 2 is a perspective view showing a state in which a resistive film is formed on each insulating substrate in the material ceramic substrate.

【図3】前記素材セラミック基板における各絶縁基板に
左右一対の電極膜を形成した状態を示す斜視図である。
FIG. 3 is a perspective view showing a state in which a pair of left and right electrode films is formed on each insulating substrate in the material ceramic substrate.

【図4】本発明の別の実施の形態を示す斜視図である。FIG. 4 is a perspective view showing another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 チップ型絶縁基板 2 素材セラミック基板 7 抵抗膜 8,9 電極膜 10,11 切欠部 10′,11′ 抜き孔 REFERENCE SIGNS LIST 1 chip-type insulating substrate 2 ceramic substrate 7 resistive film 8, 9 electrode film 10, 11 cutout 10 ', 11' hole

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】チップ型絶縁基板の上面に、先づ、抵抗膜
を、その材料ペーストの塗着及び乾燥・焼成にて形成
し、次いで、この抵抗膜よりも大きい横幅寸法した左右
一対の両電極膜を、その材料ペーストの塗着及び乾燥・
焼成にて形成するようにした製造方法において、 前記両電極膜を形成するに際して、当該両電極膜のうち
少なくともいずれか一方の電極膜が前記抵抗膜に対して
重なる部分に切欠部又は抜き孔を設けたことを特徴とす
るチップ型抵抗器の製造方法。
A resistive film is first formed on an upper surface of a chip-type insulating substrate by applying a material paste thereof, drying and baking, and then forming a pair of left and right sides having a width larger than that of the resistive film. The electrode film is coated with the material paste and dried.
In the manufacturing method which is formed by firing, when forming the two electrode films, a notch or a hole is formed at a portion where at least one of the two electrode films overlaps the resistance film. A method for manufacturing a chip resistor, comprising:
JP10183789A 1998-06-30 1998-06-30 Manufacture of chip resistor Pending JP2000021613A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10183789A JP2000021613A (en) 1998-06-30 1998-06-30 Manufacture of chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10183789A JP2000021613A (en) 1998-06-30 1998-06-30 Manufacture of chip resistor

Publications (1)

Publication Number Publication Date
JP2000021613A true JP2000021613A (en) 2000-01-21

Family

ID=16141966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10183789A Pending JP2000021613A (en) 1998-06-30 1998-06-30 Manufacture of chip resistor

Country Status (1)

Country Link
JP (1) JP2000021613A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6511891B2 (en) * 2001-06-14 2003-01-28 United Microelectronics Corp. Method of preventing toppling of lower electrode through flush cleaning
KR100773414B1 (en) * 2000-05-26 2007-11-05 중소기업은행 Method for producting flat panel type thick film resistor
JP2015099821A (en) * 2013-11-18 2015-05-28 コーア株式会社 Chip resistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773414B1 (en) * 2000-05-26 2007-11-05 중소기업은행 Method for producting flat panel type thick film resistor
US6511891B2 (en) * 2001-06-14 2003-01-28 United Microelectronics Corp. Method of preventing toppling of lower electrode through flush cleaning
JP2015099821A (en) * 2013-11-18 2015-05-28 コーア株式会社 Chip resistor

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