JP2000010783A - Program control method for electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve problems of current consumption, a processing speed, etc., generated so far when a program was run on an external memory by using a microcomputer which has a CPU and a RAM in the same packet. SOLUTION: The microcomputer 1 incorporates the CPU 2 and the RAM 3 in the same package. The CPU 2 is able to access a ROM 4 and the internal RAM 3 through an address bus. The program that the CPU 2 reads out is stored in the external ROM 4. Further, a program for a process for switching the microcomputer 1 to power-saving mode is also stored as a data group in the external ROM 4. When the microcomputer 1 is switched to the power-saving mode, the data group is copied to a specific area of the internal RAM 3 and then a jump to the head of the area is made to perform the process for switching to the power-saving mode. After the jump to the area of the RAM 3 is made, the external ROM 3 is not active, so the current consumption of the external ROM 4 is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program control method for an electronic device having a microprocessor (hereinafter, "microcomputer") and a control program.

[0002]

2. Description of the Related Art FIG. 3 shows an example of the configuration of a conventional electronic device. The CPU 2 performs various controls of the electronic device. The control program is stored in the external ROM 4. The RAM 3 has a CPU similar to the external ROM 4.
2 connected to the outside through an address bus. The power switch 5 of this device is connected to the CPU 2 and controls the power of the device by software. The operation of the conventional example having this configuration will be described below. When the power switch 5 is pressed while the electronic device is operating, the CPU 2 turns off the power of the peripheral circuits, and then sets the CPU 2 itself in a power saving mode (called a standby mode, a sleep mode, or the like depending on the type of CPU). (The process of switching the CPU 2 to the power saving mode is also stored in the external ROM 4). At this time, the power is supplied to the CPU 2 and the external ROM 4 (the process of turning on the power again is also stored in the external ROM 4, so the power cannot be turned off).
From the outside, it looks as if the power of this device was turned off. Even when the CPU 2 is switched to the power saving mode, a large current is consumed because the external ROM 4 is in the active state (the program counter (PC) of the CPU 2 points to the address of the external ROM 4). Although this current value differs depending on the type of ROM, the standby state (the program counter (PC) of the CPU 2 is
4 (a state in which address 4 is not pointed).

Next, another operation example of the electronic apparatus having the configuration shown in FIG. 3 will be described. CPU used in this example
(2) When the program is run in the external memory, the processing clock is 2-3 times longer than in the case of the internal memory (the processing speed becomes 1/2 to 1/3). In order to solve this, it is necessary to increase the operation clock, and the CP
Problems such as restrictions on the types of U and ROM and an increase in current consumption of the CPU occur.

[0004]

SUMMARY OF THE INVENTION As described above,
Operating the CPU with a program stored in an external ROM may be disadvantageous in terms of current consumption and processing speed. The present invention aims to solve these problems.

[0005]

In order to achieve the above object, the present invention uses a microcomputer having a CPU and a RAM incorporated in the same package. Also, C
A part of the program read by the PU is
M and is operated by a program in the RAM according to the situation. For example, in the above-described conventional example, if the process of switching the microcomputer to the power saving mode is stored in the internal RAM and operated, the ROM does not become active when the microcomputer is switched to the power saving mode (the internal RAM becomes active). RO)
The current consumption of M is a value in the standby state. Further, in another conventional example, if only the processing requiring a high processing speed is stored in the internal RAM and operated, the operation clock does not need to be increased, so that the above-described problem does not occur.

[0006]

1 and 2 show an embodiment of the present invention. FIG. 1 is an internal configuration diagram of the electronic apparatus of the present embodiment, and FIG. 2 is an address map showing address assignment of a ROM and a RAM. As shown in FIG. 1, the microcomputer 1 includes a CPU 2 and a RAM 3 in the same package. The CPU
External ROM 4 and internal RAM through address bus
3 each can be accessed. The program read by the CPU 2 is stored in the external ROM 4. In addition, a program for processing for switching the microcomputer 1 to the power saving mode is also provided.
The data is stored in the external ROM 4 as a data group.

Further, as shown in FIG. 2, when the microcomputer 1 is switched to the power saving mode (for example, when the power switch 5 of the device is pressed), this data group is stored in the internal RAM.
After copying to the specific area of No. 3, the processing is switched to the power saving mode by jumping to the head (address a) of this area. After jumping to the RAM 3 area, the external ROM 4 is not in an active state (the CPU 2
Since the OM 4 is not accessed), the current consumption of the external ROM 4 in the power saving mode can be suppressed. With a similar configuration,
If a process requiring an operation speed (such as a complicated data operation) is copied to the internal RAM 3 at the time of startup, the CPU 2 accesses the internal RAM 3 when this process is called. Can be increased.

[0008]

According to the present invention, it is possible to solve problems such as current consumption and processing speed which have conventionally occurred when a program is operated in an external memory.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing an address map according to one embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration example of a conventional technique.

[Description of symbols] 1: microcomputer, 2: CPU, 3:
Internal RAM, 4: External ROM, 5:
Power switch.

Claims (1)

[Claims] 1. An electronic device having a microprocessor, an internal memory built in the microprocessor, and an external memory, wherein when the microprocessor is set to a power saving mode,
A program control method for an electronic device, wherein a processing program for switching the microprocessor to a power saving mode is copied from the external memory to the internal memory, and the internal memory is accessed.