ITRM20010549A0 - METHOD AND APPARATUS FOR MANIPULATING ADDRESS INFORMATION IN A MEMORY TESTING DEVICE. - Google Patents

METHOD AND APPARATUS FOR MANIPULATING ADDRESS INFORMATION IN A MEMORY TESTING DEVICE.

Info

Publication number
ITRM20010549A0
ITRM20010549A0 IT2001RM000549A ITRM20010549A ITRM20010549A0 IT RM20010549 A0 ITRM20010549 A0 IT RM20010549A0 IT 2001RM000549 A IT2001RM000549 A IT 2001RM000549A IT RM20010549 A ITRM20010549 A IT RM20010549A IT RM20010549 A0 ITRM20010549 A0 IT RM20010549A0
Authority
IT
Italy
Prior art keywords
address information
testing device
memory testing
manipulating address
manipulating
Prior art date
Application number
IT2001RM000549A
Other languages
Italian (it)
Inventor
Alan S Krech Jr
John M Freeseman
Stephen D Jordan
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of ITRM20010549A0 publication Critical patent/ITRM20010549A0/en
Publication of ITRM20010549A1 publication Critical patent/ITRM20010549A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
IT2001RM000549A 2000-09-11 2001-09-11 METHOD AND APPARATUS FOR HANDLING THE ADDRESS INFORMATION IN A MEMORY TESTING DEVICE. ITRM20010549A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65919500A 2000-09-11 2000-09-11

Publications (2)

Publication Number Publication Date
ITRM20010549A0 true ITRM20010549A0 (en) 2001-09-11
ITRM20010549A1 ITRM20010549A1 (en) 2003-03-11

Family

ID=24644441

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2001RM000549A ITRM20010549A1 (en) 2000-09-11 2001-09-11 METHOD AND APPARATUS FOR HANDLING THE ADDRESS INFORMATION IN A MEMORY TESTING DEVICE.

Country Status (4)

Country Link
JP (1) JP2002163898A (en)
KR (1) KR20020020862A (en)
DE (1) DE10144645A1 (en)
IT (1) ITRM20010549A1 (en)

Also Published As

Publication number Publication date
KR20020020862A (en) 2002-03-16
ITRM20010549A1 (en) 2003-03-11
DE10144645A1 (en) 2002-04-25
JP2002163898A (en) 2002-06-07

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