ITMI20052309A1 - Procedimento per la formazione di uno strato cristallino su un substrato di silicio - Google Patents

Procedimento per la formazione di uno strato cristallino su un substrato di silicio

Info

Publication number
ITMI20052309A1
ITMI20052309A1 ITMI20052309A ITMI20052309A1 IT MI20052309 A1 ITMI20052309 A1 IT MI20052309A1 IT MI20052309 A ITMI20052309 A IT MI20052309A IT MI20052309 A1 ITMI20052309 A1 IT MI20052309A1
Authority
IT
Italy
Prior art keywords
procedure
formation
silicon substrate
crystalline layer
crystalline
Prior art date
Application number
Other languages
English (en)
Inventor
Dadgar Armin
Ando Feyh
Silvia Kronmueller
Franz Laermer
Ralf Reichenbach
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Publication of ITMI20052309A1 publication Critical patent/ITMI20052309A1/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
ITMI20052309 2004-12-10 2005-12-02 Procedimento per la formazione di uno strato cristallino su un substrato di silicio ITMI20052309A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE200410059651 DE102004059651A1 (de) 2004-12-10 2004-12-10 Verfahren zur Bildung einer kristallinen Schicht auf einem Silizium-Substrat

Publications (1)

Publication Number Publication Date
ITMI20052309A1 true ITMI20052309A1 (it) 2006-06-11

Family

ID=36498675

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI20052309 ITMI20052309A1 (it) 2004-12-10 2005-12-02 Procedimento per la formazione di uno strato cristallino su un substrato di silicio

Country Status (3)

Country Link
DE (1) DE102004059651A1 (it)
FR (1) FR2879346A1 (it)
IT (1) ITMI20052309A1 (it)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG67458A1 (en) * 1996-12-18 1999-09-21 Canon Kk Process for producing semiconductor article
US6344375B1 (en) * 1998-07-28 2002-02-05 Matsushita Electric Industrial Co., Ltd Substrate containing compound semiconductor, method for manufacturing the same and semiconductor device using the same

Also Published As

Publication number Publication date
FR2879346A1 (fr) 2006-06-16
DE102004059651A1 (de) 2006-06-14

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