ITMI20011928A0 - Circuito pll - Google Patents

Circuito pll

Info

Publication number
ITMI20011928A0
ITMI20011928A0 IT2001MI001928A ITMI20011928A ITMI20011928A0 IT MI20011928 A0 ITMI20011928 A0 IT MI20011928A0 IT 2001MI001928 A IT2001MI001928 A IT 2001MI001928A IT MI20011928 A ITMI20011928 A IT MI20011928A IT MI20011928 A0 ITMI20011928 A0 IT MI20011928A0
Authority
IT
Italy
Prior art keywords
pll circuit
pll
circuit
Prior art date
Application number
IT2001MI001928A
Other languages
English (en)
Inventor
Marco Schwarzmuller
Original Assignee
Atmel Germany Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Germany Gmbh filed Critical Atmel Germany Gmbh
Publication of ITMI20011928A0 publication Critical patent/ITMI20011928A0/it
Publication of ITMI20011928A1 publication Critical patent/ITMI20011928A1/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
IT2001MI001928A 2000-10-10 2001-09-14 Circuito pll ITMI20011928A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10050294A DE10050294B4 (de) 2000-10-10 2000-10-10 PLL-Schaltung

Publications (2)

Publication Number Publication Date
ITMI20011928A0 true ITMI20011928A0 (it) 2001-09-14
ITMI20011928A1 ITMI20011928A1 (it) 2003-03-14

Family

ID=7659372

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2001MI001928A ITMI20011928A1 (it) 2000-10-10 2001-09-14 Circuito pll

Country Status (5)

Country Link
US (1) US7120217B2 (it)
DE (1) DE10050294B4 (it)
FR (1) FR2815198B1 (it)
GB (1) GB2367961B (it)
IT (1) ITMI20011928A1 (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7161436B2 (en) * 2002-11-27 2007-01-09 Mediatek Inc. Charge pump structure for reducing capacitance in loop filter of a phase locked loop
EP1661249B1 (en) * 2003-09-06 2018-11-14 Semtech Corporation Phase locked loop
FR2860663B1 (fr) 2003-10-01 2006-09-01 Arteris Dispositif de retard numerique, oscillateur numerique generateur de signal d'horloge, et interface memoire
DE10351101B3 (de) 2003-10-31 2005-06-02 Texas Instruments Deutschland Gmbh Kompakte PLL-Schaltung
GB2410387B (en) * 2004-01-23 2006-06-21 Zarlink Semiconductor Ab PLL phase/frequency detector with fully differential output charge pump
US7536161B2 (en) * 2004-03-31 2009-05-19 Silicon Laboratories Inc. Magnetically differential input
DE102004020975A1 (de) 2004-04-22 2005-11-17 Atmel Germany Gmbh Oszillator und Verfahren zum Betreiben eines Oszillators
US7345550B2 (en) * 2005-12-05 2008-03-18 Sirific Wireless Corporation Type II phase locked loop using dual path and dual varactors to reduce loop filter components
US7706767B2 (en) * 2006-03-28 2010-04-27 Qualcomm, Incorporated Dual path loop filter for phase lock loop
JP2009200703A (ja) * 2008-02-20 2009-09-03 Toshiba Corp チャージポンプ回路およびｐｌｌ回路
US7692458B1 (en) * 2008-10-11 2010-04-06 Applied Micro Circuits Corporation Wide dynamic range charge pump

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH600340A5 (it) * 1975-10-20 1978-06-15 Zellweger Uster Ag
GB1495203A (en) 1976-05-28 1977-12-14 Solartron Electronic Group Phase locked loop circuits
US4819081A (en) * 1987-09-03 1989-04-04 Intel Corporation Phase comparator for extending capture range
US5142246A (en) * 1991-06-19 1992-08-25 Telefonaktiebolaget L M Ericsson Multi-loop controlled VCO
US5121085A (en) 1991-06-28 1992-06-09 Digital Equipment Corporation Dual-charge-pump bandwidth-switched phase-locked loop
US5281789A (en) * 1992-07-24 1994-01-25 Robert Merz Method and apparatus for depositing molten metal
US5315623A (en) * 1992-08-04 1994-05-24 Ford Motor Company Dual mode phase-locked loop
US5384502A (en) * 1993-06-24 1995-01-24 Intel Corporation Phase locked loop circuitry with split loop filter
JP2778421B2 (ja) * 1993-09-07 1998-07-23 日本電気株式会社 チャージポンプ型位相同期ループ
GB9405805D0 (en) 1994-03-24 1994-05-11 Discovision Ass Improved phase locked loop
US5740213A (en) * 1994-06-03 1998-04-14 Dreyer; Stephen F. Differential charge pump based phase locked loop or delay locked loop
US5592120A (en) * 1994-09-07 1997-01-07 Analog Devices, Inc. Charge pump system
EP0718978A1 (en) * 1994-12-23 1996-06-26 STMicroelectronics S.r.l. Differential charge pump
DE69519663T2 (de) * 1995-03-07 2001-04-26 St Microelectronics Srl Voll-Integrierbarer Phasenregelkreis mit geringem Jitter
DE19617635A1 (de) * 1996-05-02 1997-11-13 Siemens Ag Phasenregelkreis
US5838204A (en) * 1996-09-11 1998-11-17 Oki America, Inc. Phase locked loop with multiple, programmable, operating frequencies, and an efficient phase locked loop layout method
US5821789A (en) * 1997-01-28 1998-10-13 Industrial Technology Research Institution Fast switching phase-locked loop
US5854575A (en) * 1997-11-13 1998-12-29 Lsi Logic Corporation Dual-loop phase-locked loop

Also Published As

Publication number Publication date
ITMI20011928A1 (it) 2003-03-14
FR2815198A1 (fr) 2002-04-12
US7120217B2 (en) 2006-10-10
DE10050294B4 (de) 2006-08-24
GB2367961B (en) 2005-01-12
DE10050294A1 (de) 2002-07-11
GB0123995D0 (en) 2001-11-28
GB2367961A (en) 2002-04-17
US20020041651A1 (en) 2002-04-11
FR2815198B1 (fr) 2005-10-14

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