IT961727B - Metodo per fabbricare transistori a guadagno elevato - Google Patents

Metodo per fabbricare transistori a guadagno elevato

Info

Publication number
IT961727B
IT961727B IT51807/72A IT5180772A IT961727B IT 961727 B IT961727 B IT 961727B IT 51807/72 A IT51807/72 A IT 51807/72A IT 5180772 A IT5180772 A IT 5180772A IT 961727 B IT961727 B IT 961727B
Authority
IT
Italy
Prior art keywords
high gain
manufacturing high
gain transistors
transistors
manufacturing
Prior art date
Application number
IT51807/72A
Other languages
English (en)
Italian (it)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Application granted granted Critical
Publication of IT961727B publication Critical patent/IT961727B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs
    • H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/087—I2L integrated injection logic
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion
IT51807/72A 1971-08-02 1972-07-27 Metodo per fabbricare transistori a guadagno elevato IT961727B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00168034A US3817794A (en) 1971-08-02 1971-08-02 Method for making high-gain transistors

Publications (1)

Publication Number Publication Date
IT961727B true IT961727B (it) 1973-12-10

Family

ID=22609812

Family Applications (1)

Application Number Title Priority Date Filing Date
IT51807/72A IT961727B (it) 1971-08-02 1972-07-27 Metodo per fabbricare transistori a guadagno elevato

Country Status (10)

Country Link
US (1) US3817794A (OSRAM)
JP (1) JPS5145944B2 (OSRAM)
BE (1) BE786889A (OSRAM)
CA (1) CA954637A (OSRAM)
DE (1) DE2236897A1 (OSRAM)
FR (1) FR2148175B1 (OSRAM)
GB (1) GB1340306A (OSRAM)
IT (1) IT961727B (OSRAM)
NL (1) NL160433C (OSRAM)
SE (1) SE374457B (OSRAM)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5147762B1 (OSRAM) * 1974-02-04 1976-12-16
JPS5148978A (OSRAM) * 1974-10-24 1976-04-27 Nippon Electric Co
JPS5180786A (OSRAM) * 1975-01-10 1976-07-14 Nippon Electric Co
DE2532608C2 (de) * 1975-07-22 1982-09-02 Deutsche Itt Industries Gmbh, 7800 Freiburg Planardiffusionsverfahren zum Herstellen einer monolithisch integrierten Schaltung
US4026740A (en) * 1975-10-29 1977-05-31 Intel Corporation Process for fabricating narrow polycrystalline silicon members
DE3020609C2 (de) * 1979-05-31 1985-11-07 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zum Herstellen einer integrierten Schaltung mit wenigstens einem I↑2↑L-Element
US4298402A (en) * 1980-02-04 1981-11-03 Fairchild Camera & Instrument Corp. Method of fabricating self-aligned lateral bipolar transistor utilizing special masking techniques
DE3317437A1 (de) * 1983-05-13 1984-11-15 Deutsche Itt Industries Gmbh, 7800 Freiburg Planartransistor mit niedrigem rauschfaktor und verfahren zu dessen herstellung
GB2188479B (en) * 1986-03-26 1990-05-23 Stc Plc Semiconductor devices
JPH02230742A (ja) * 1989-03-03 1990-09-13 Matsushita Electron Corp 半導体装置
US5138413A (en) * 1990-10-22 1992-08-11 Harris Corporation Piso electrostatic discharge protection device

Also Published As

Publication number Publication date
BE786889A (fr) 1972-11-16
FR2148175A1 (OSRAM) 1973-03-11
DE2236897B2 (OSRAM) 1975-09-04
NL160433B (nl) 1979-05-15
SE374457B (OSRAM) 1975-03-03
NL160433C (nl) 1979-10-15
GB1340306A (en) 1973-12-12
DE2236897A1 (de) 1973-02-15
NL7210358A (OSRAM) 1973-02-06
US3817794A (en) 1974-06-18
CA954637A (en) 1974-09-10
FR2148175B1 (OSRAM) 1977-08-26
JPS4825483A (OSRAM) 1973-04-03
JPS5145944B2 (OSRAM) 1976-12-06

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