IT949808B - Sistema di interruzioni per elaboratori di dati - Google Patents

Sistema di interruzioni per elaboratori di dati

Info

Publication number
IT949808B
IT949808B IT21316/72A IT2131672A IT949808B IT 949808 B IT949808 B IT 949808B IT 21316/72 A IT21316/72 A IT 21316/72A IT 2131672 A IT2131672 A IT 2131672A IT 949808 B IT949808 B IT 949808B
Authority
IT
Italy
Prior art keywords
data processors
interruption system
interruption
processors
data
Prior art date
Application number
IT21316/72A
Other languages
English (en)
Original Assignee
Bunker Ramo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bunker Ramo filed Critical Bunker Ramo
Application granted granted Critical
Publication of IT949808B publication Critical patent/IT949808B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Computer And Data Communications (AREA)
  • Multi Processors (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
IT21316/72A 1971-06-03 1972-03-02 Sistema di interruzioni per elaboratori di dati IT949808B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14947471A 1971-06-03 1971-06-03

Publications (1)

Publication Number Publication Date
IT949808B true IT949808B (it) 1973-06-11

Family

ID=22530445

Family Applications (1)

Application Number Title Priority Date Filing Date
IT21316/72A IT949808B (it) 1971-06-03 1972-03-02 Sistema di interruzioni per elaboratori di dati

Country Status (6)

Country Link
US (1) US3789365A (it)
CA (1) CA953425A (it)
DE (1) DE2210704A1 (it)
FR (1) FR2141661B1 (it)
GB (2) GB1374166A (it)
IT (1) IT949808B (it)

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KR100294276B1 (ko) * 1991-07-08 2001-09-17 야스카와 히데아키 고속트랩및예외상태를구현한알아이에스씨마이크로프로세서구조
US5961629A (en) * 1991-07-08 1999-10-05 Seiko Epson Corporation High performance, superscalar-based computer system with out-of-order instruction execution
US5493687A (en) 1991-07-08 1996-02-20 Seiko Epson Corporation RISC microprocessor architecture implementing multiple typed register sets
US5438668A (en) * 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
EP0636256B1 (en) * 1992-03-31 1997-06-04 Seiko Epson Corporation Superscalar risc processor instruction scheduling
KR950701437A (ko) * 1992-05-01 1995-03-23 요시오 야마자끼 슈퍼스칼라 마이크로프로세서에서의 명령어 회수를 위한 시스템 및 방법
US5412782A (en) 1992-07-02 1995-05-02 3Com Corporation Programmed I/O ethernet adapter with early interrupts for accelerating data transfer
US5319752A (en) * 1992-09-18 1994-06-07 3Com Corporation Device with host indication combination
US6735685B1 (en) * 1992-09-29 2004-05-11 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
EP0663083B1 (en) 1992-09-29 2000-12-20 Seiko Epson Corporation System and method for handling load and/or store operations in a superscalar microprocessor
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US5628021A (en) * 1992-12-31 1997-05-06 Seiko Epson Corporation System and method for assigning tags to control instruction processing in a superscalar processor
JP3531166B2 (ja) 1992-12-31 2004-05-24 セイコーエプソン株式会社 レジスタ・リネーミングのシステム及び方法
JP3135094B2 (ja) * 1993-03-13 2001-02-13 株式会社リコー 統合ビジネス用ネットワークシステム
US5694588A (en) * 1993-05-07 1997-12-02 Texas Instruments Incorporated Apparatus and method for synchronizing data transfers in a single instruction multiple data processor
US5627745A (en) * 1995-05-03 1997-05-06 Allen-Bradley Company, Inc. Parallel processing in a multitasking industrial controller
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US5708814A (en) * 1995-11-21 1998-01-13 Microsoft Corporation Method and apparatus for reducing the rate of interrupts by generating a single interrupt for a group of events
US5944818A (en) * 1996-06-28 1999-08-31 Intel Corporation Method and apparatus for accelerated instruction restart in a microprocessor
US6061711A (en) * 1996-08-19 2000-05-09 Samsung Electronics, Inc. Efficient context saving and restoring in a multi-tasking computing system environment
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US5987601A (en) * 1997-02-14 1999-11-16 Xyron Corporation Zero overhead computer interrupts with task switching
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US6298403B1 (en) * 1998-06-02 2001-10-02 Adaptec, Inc. Host adapter having a snapshot mechanism
US6336184B1 (en) * 1998-08-14 2002-01-01 International Business Machines Corporation Method and apparatus for performing a trap operation in an information handling system
US6477600B1 (en) * 1999-06-08 2002-11-05 Intel Corporation Apparatus and method for processing isochronous interrupts
US6718413B1 (en) * 1999-08-31 2004-04-06 Adaptec, Inc. Contention-based methods for generating reduced number of interrupts
US20030014474A1 (en) * 2001-05-30 2003-01-16 Mckaig Ray S. Alternate zero overhead task change circuit
US20040172631A1 (en) * 2001-06-20 2004-09-02 Howard James E Concurrent-multitasking processor
US6754738B2 (en) 2001-09-28 2004-06-22 International Business Machines Corporation Low overhead I/O interrupt
DE10231651B4 (de) * 2002-07-12 2004-07-08 Infineon Technologies Ag Verfahren zum Steuern mehrerer Interruptquellen und zur Durchführung des Verfahrens eingerichtete Schaltungsanordnung
US10282227B2 (en) * 2014-11-18 2019-05-07 Intel Corporation Efficient preemption for graphics processors

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US3341817A (en) * 1964-06-12 1967-09-12 Bunker Ramo Memory transfer apparatus
US3373408A (en) * 1965-04-16 1968-03-12 Rca Corp Computer capable of switching between programs without storage and retrieval of the contents of operation registers
US3359544A (en) * 1965-08-09 1967-12-19 Burroughs Corp Multiple program computer
US3440612A (en) * 1966-02-28 1969-04-22 Ibm Program mode switching circuit
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US3386083A (en) * 1967-01-13 1968-05-28 Ibm Interruptions in a large scale data processing system
FR1567705A (it) * 1967-06-09 1969-04-08
US3534339A (en) * 1967-08-24 1970-10-13 Burroughs Corp Service request priority resolver and encoder
US3602901A (en) * 1969-10-31 1971-08-31 Bunko Ramo Corp The Circuit for controlling the loading and editing of information in a recirculating memory
US3643229A (en) * 1969-11-26 1972-02-15 Stromberg Carlson Corp Interrupt arrangement for data processing systems

Also Published As

Publication number Publication date
US3789365A (en) 1974-01-29
FR2141661B1 (it) 1973-07-13
FR2141661A1 (it) 1973-01-26
GB1374165A (en) 1974-11-20
DE2210704A1 (de) 1972-12-14
CA953425A (en) 1974-08-20
GB1374166A (en) 1974-11-20

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