IT946939B - ARRANGEMENT OF TWO DATA PROCESSING PLANTS EACH CONTROLLED BY A PROGRAMMING DEVICE - Google Patents
ARRANGEMENT OF TWO DATA PROCESSING PLANTS EACH CONTROLLED BY A PROGRAMMING DEVICEInfo
- Publication number
- IT946939B IT946939B IT19834/72A IT1983472A IT946939B IT 946939 B IT946939 B IT 946939B IT 19834/72 A IT19834/72 A IT 19834/72A IT 1983472 A IT1983472 A IT 1983472A IT 946939 B IT946939 B IT 946939B
- Authority
- IT
- Italy
- Prior art keywords
- processor
- control
- control unit
- program
- diagnosis
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2736—Tester hardware, i.e. output processing circuits using a dedicated service processor for test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
- H04Q3/54558—Redundancy, stand-by
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Software Systems (AREA)
- Signal Processing (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
1350864 Data processor SIEMENS AG 25 Jan 1972 [29 Jan 1971] 3358/72 Heading G4A A data processing system contains two data processors each controlled by a respective program from unit PL1, PL2 and a link connects the processors so that a diagnostic program from one may control a search for faults in the other. Each processor contains subsidiary devices such as calculator RW, working register AR, storage control device SS and memory SP, input/output device EA coupled to peripherals PE and a program interrupt device PU, coupled together via a data distributor line DL and controlled via a line SL coupled to the control unit. Each processor also contains a control and monitoring device BW and a diagnosis link DA. The control and data distributer lines and control unit PL are connected to their respective diagnosis link and the control unit and the diagnosis link of one processor are connected respectively to the diagnosis link and the control unit of the other processor, the connections allowing two way transfer. Each diagnosis link contains registers and a comparator, the register holding control words supplied by the control unit of the other processor and the comparator acting to stop a control program if a result obtained from its processor does not agree with a result calculated by the diagnosis program from the other processor.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2104298A DE2104298C3 (en) | 1971-01-29 | 1971-01-29 | Arrangement of two data processing systems, each controlled by a program control unit |
Publications (1)
Publication Number | Publication Date |
---|---|
IT946939B true IT946939B (en) | 1973-05-21 |
Family
ID=5797325
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT19834/72A IT946939B (en) | 1971-01-29 | 1972-01-26 | ARRANGEMENT OF TWO DATA PROCESSING PLANTS EACH CONTROLLED BY A PROGRAMMING DEVICE |
Country Status (10)
Country | Link |
---|---|
AT (1) | AT315536B (en) |
BE (1) | BE778652A (en) |
CH (1) | CH548064A (en) |
DE (1) | DE2104298C3 (en) |
FR (1) | FR2124698A5 (en) |
GB (1) | GB1350864A (en) |
IT (1) | IT946939B (en) |
LU (1) | LU64669A1 (en) |
NL (1) | NL7201113A (en) |
SE (1) | SE369633B (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2350371C3 (en) * | 1973-10-08 | 1981-03-26 | IBM Deutschland GmbH, 70569 Stuttgart | Method and device for testing and maintenance of data processing systems by means of spatially distant maintenance stations |
US4149244A (en) * | 1976-06-07 | 1979-04-10 | Amdahl Corporation | Data processing system including a program-executing secondary system controlling a program-executing primary system |
DE2647137C2 (en) * | 1976-10-19 | 1983-11-10 | Siemens AG, 1000 Berlin und 8000 München | Arrangement of two data processing systems that process the same information |
DE2733921C3 (en) * | 1977-07-27 | 1981-03-26 | Siemens AG, 1000 Berlin und 8000 München | Circuit arrangement for an indirectly controlled switching system, in particular telephone switching system |
DE2826063A1 (en) * | 1978-06-14 | 1979-12-20 | Siemens Ag | INDIRECTLY CONTROLLED SWITCHING SYSTEM WITH TIME CHANNEL LINKS, IN PARTICULAR TELEPHONE SWITCHING SYSTEM |
-
1971
- 1971-01-29 DE DE2104298A patent/DE2104298C3/en not_active Expired
- 1971-12-31 FR FR7147743A patent/FR2124698A5/fr not_active Expired
-
1972
- 1972-01-12 CH CH42672A patent/CH548064A/en not_active IP Right Cessation
- 1972-01-17 AT AT36472A patent/AT315536B/en not_active IP Right Cessation
- 1972-01-25 GB GB335872A patent/GB1350864A/en not_active Expired
- 1972-01-26 IT IT19834/72A patent/IT946939B/en active
- 1972-01-27 NL NL7201113A patent/NL7201113A/xx unknown
- 1972-01-27 LU LU64669D patent/LU64669A1/xx unknown
- 1972-01-28 BE BE778652A patent/BE778652A/en unknown
- 1972-01-28 SE SE01027/72A patent/SE369633B/xx unknown
Also Published As
Publication number | Publication date |
---|---|
FR2124698A5 (en) | 1972-09-22 |
NL7201113A (en) | 1972-08-01 |
SE369633B (en) | 1974-09-09 |
DE2104298C3 (en) | 1974-01-10 |
CH548064A (en) | 1974-04-11 |
LU64669A1 (en) | 1972-06-26 |
AT315536B (en) | 1974-05-27 |
DE2104298A1 (en) | 1972-08-10 |
DE2104298B2 (en) | 1973-06-14 |
BE778652A (en) | 1972-07-28 |
GB1350864A (en) | 1974-04-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3462742A (en) | Computer system adapted to be constructed of large integrated circuit arrays | |
ES465431A1 (en) | Microprocessor architecture with integrated interrupts and cycle steals prioritized channel | |
US3541516A (en) | Vector arithmetic multiprocessor computing system | |
GB1412690A (en) | Description driven micro-programmable multi-processor system | |
ES438727A1 (en) | Input/output port control | |
GB1445219A (en) | Bus controller for digital computer system | |
KR930001078A (en) | Computer systems | |
DE3485635D1 (en) | MULTI-PROCESSOR CONTROL FOR VECTOR CALCULATOR. | |
DK462584D0 (en) | CENTRAL PROCESSING UNIT WITH MULTIPLE DATA WAYS FOR USE IN DATA PROCESSING PLANTS | |
GB1425173A (en) | Data processing systems | |
ES419438A1 (en) | Data processing system employing one of a plurality of identical processors as a controller | |
IT946939B (en) | ARRANGEMENT OF TWO DATA PROCESSING PLANTS EACH CONTROLLED BY A PROGRAMMING DEVICE | |
JPS56114063A (en) | Multiprocessor | |
JPS57117059A (en) | Multiprocessor system | |
ES315571A1 (en) | A data processing machine. (Machine-translation by Google Translate, not legally binding) | |
JPS57113144A (en) | Stored program computer | |
GB1076775A (en) | Data processing apparatus | |
JPS54124938A (en) | Memory access control system | |
JPS58208806A (en) | Sequence controller | |
ES8201330A1 (en) | A redundant computer system (Machine-translation by Google Translate, not legally binding) | |
IT1172111B (en) | Multi processor system | |
GB1297052A (en) | ||
FR2286439A1 (en) | Single memory unit access system for multiple central processors - has multiprocessor control for time shared address and data transfers | |
GB1377557A (en) | Data processing systems | |
DE3878044D1 (en) | CIRCUIT ARRANGEMENT FOR CONTROLLING PARALLEL ACCESSES TO DECENTRALIZED MEMORY DEVICES (ERROR ADDRESS MEMORY). |