CH548064A - ARRANGEMENT OF TWO DATA PROCESSING SYSTEMS, EACH CONTROLLED BY A PROGRAM CONTROL UNIT. - Google Patents

ARRANGEMENT OF TWO DATA PROCESSING SYSTEMS, EACH CONTROLLED BY A PROGRAM CONTROL UNIT.

Info

Publication number
CH548064A
CH548064A CH42672A CH42672A CH548064A CH 548064 A CH548064 A CH 548064A CH 42672 A CH42672 A CH 42672A CH 42672 A CH42672 A CH 42672A CH 548064 A CH548064 A CH 548064A
Authority
CH
Switzerland
Prior art keywords
processor
control unit
control
program
diagnosis
Prior art date
Application number
CH42672A
Other languages
German (de)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH548064A publication Critical patent/CH548064A/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/273Tester hardware, i.e. output processing circuits
    • G06F11/2736Tester hardware, i.e. output processing circuits using a dedicated service processor for test
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558Redundancy, stand-by

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Signal Processing (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

1350864 Data processor SIEMENS AG 25 Jan 1972 [29 Jan 1971] 3358/72 Heading G4A A data processing system contains two data processors each controlled by a respective program from unit PL1, PL2 and a link connects the processors so that a diagnostic program from one may control a search for faults in the other. Each processor contains subsidiary devices such as calculator RW, working register AR, storage control device SS and memory SP, input/output device EA coupled to peripherals PE and a program interrupt device PU, coupled together via a data distributor line DL and controlled via a line SL coupled to the control unit. Each processor also contains a control and monitoring device BW and a diagnosis link DA. The control and data distributer lines and control unit PL are connected to their respective diagnosis link and the control unit and the diagnosis link of one processor are connected respectively to the diagnosis link and the control unit of the other processor, the connections allowing two way transfer. Each diagnosis link contains registers and a comparator, the register holding control words supplied by the control unit of the other processor and the comparator acting to stop a control program if a result obtained from its processor does not agree with a result calculated by the diagnosis program from the other processor.
CH42672A 1971-01-29 1972-01-12 ARRANGEMENT OF TWO DATA PROCESSING SYSTEMS, EACH CONTROLLED BY A PROGRAM CONTROL UNIT. CH548064A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2104298A DE2104298C3 (en) 1971-01-29 1971-01-29 Arrangement of two data processing systems, each controlled by a program control unit

Publications (1)

Publication Number Publication Date
CH548064A true CH548064A (en) 1974-04-11

Family

ID=5797325

Family Applications (1)

Application Number Title Priority Date Filing Date
CH42672A CH548064A (en) 1971-01-29 1972-01-12 ARRANGEMENT OF TWO DATA PROCESSING SYSTEMS, EACH CONTROLLED BY A PROGRAM CONTROL UNIT.

Country Status (10)

Country Link
AT (1) AT315536B (en)
BE (1) BE778652A (en)
CH (1) CH548064A (en)
DE (1) DE2104298C3 (en)
FR (1) FR2124698A5 (en)
GB (1) GB1350864A (en)
IT (1) IT946939B (en)
LU (1) LU64669A1 (en)
NL (1) NL7201113A (en)
SE (1) SE369633B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2350371C3 (en) * 1973-10-08 1981-03-26 IBM Deutschland GmbH, 70569 Stuttgart Method and device for testing and maintenance of data processing systems by means of spatially distant maintenance stations
US4149244A (en) * 1976-06-07 1979-04-10 Amdahl Corporation Data processing system including a program-executing secondary system controlling a program-executing primary system
DE2647137C2 (en) * 1976-10-19 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Arrangement of two data processing systems that process the same information
DE2733921C3 (en) * 1977-07-27 1981-03-26 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for an indirectly controlled switching system, in particular telephone switching system
DE2826063A1 (en) * 1978-06-14 1979-12-20 Siemens Ag INDIRECTLY CONTROLLED SWITCHING SYSTEM WITH TIME CHANNEL LINKS, IN PARTICULAR TELEPHONE SWITCHING SYSTEM

Also Published As

Publication number Publication date
FR2124698A5 (en) 1972-09-22
NL7201113A (en) 1972-08-01
SE369633B (en) 1974-09-09
IT946939B (en) 1973-05-21
DE2104298C3 (en) 1974-01-10
LU64669A1 (en) 1972-06-26
AT315536B (en) 1974-05-27
DE2104298A1 (en) 1972-08-10
DE2104298B2 (en) 1973-06-14
BE778652A (en) 1972-07-28
GB1350864A (en) 1974-04-24

Similar Documents

Publication Publication Date Title
ES458224A1 (en) Input/output interface logic for concurrent operations
GB1327731A (en) Data processing systems
ES465431A1 (en) Microprocessor architecture with integrated interrupts and cycle steals prioritized channel
ATE154151T1 (en) MULTI-PROCESSOR CONTROL FOR VECTOR COMPUTERS
ES438727A1 (en) Input/output port control
DK462584A (en) CENTRAL PROCESSING UNIT WITH MULTIPLE DATA WAYS FOR USE IN DATA PROCESSING PLANTS
GB1425173A (en) Data processing systems
CH548064A (en) ARRANGEMENT OF TWO DATA PROCESSING SYSTEMS, EACH CONTROLLED BY A PROGRAM CONTROL UNIT.
GB993029A (en) Improvements in data processing systems
US3248528A (en) Simple general purpose digital computer
ES315571A1 (en) A data processing machine. (Machine-translation by Google Translate, not legally binding)
JP2507473B2 (en) Processing equipment
ES8201330A1 (en) A redundant computer system (Machine-translation by Google Translate, not legally binding)
JPS54124938A (en) Memory access control system
GB1317714A (en) Data handling systems
JPH03189868A (en) Data processor
DE3878044D1 (en) CIRCUIT ARRANGEMENT FOR CONTROLLING PARALLEL ACCESSES TO DECENTRALIZED MEMORY DEVICES (ERROR ADDRESS MEMORY).
JPH02114362A (en) Parallel arithmetic unit
ES396450A1 (en) Data processing machines for the control of automated systems. (Machine-translation by Google Translate, not legally binding)
Pirz A technique for speeding up heavily compute bound jobs using multiple, high speed, peripheral processors
GB1190498A (en) Data Processing System.
Sites Floating point significance interrupt proposal
JPS5685174A (en) Pseudo multi-cpu system
JPS57132226A (en) Interprocessor data transfer system
JPS6220025A (en) Pipeline system

Legal Events

Date Code Title Description
PL Patent ceased