IT8547666A1 - Procedimento per eliminare il latch up e gli errori nei segnali analogici dovuti ad iniezione di corrente dal substrato in circuiti integrati con transistore di uscita di potenza verticale e relativi circuiti integrati - Google Patents
Procedimento per eliminare il latch up e gli errori nei segnali analogici dovuti ad iniezione di corrente dal substrato in circuiti integrati con transistore di uscita di potenza verticale e relativi circuiti integratiInfo
- Publication number
- IT8547666A1 IT8547666A1 IT1985A47666A IT4766685A IT8547666A1 IT 8547666 A1 IT8547666 A1 IT 8547666A1 IT 1985A47666 A IT1985A47666 A IT 1985A47666A IT 4766685 A IT4766685 A IT 4766685A IT 8547666 A1 IT8547666 A1 IT 8547666A1
- Authority
- IT
- Italy
- Prior art keywords
- integrated circuits
- procedure
- substrate
- power output
- analog signal
- Prior art date
Links
- 238000002347 injection Methods 0.000 title 1
- 239000007924 injection Substances 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/582,356 US4581547A (en) | 1984-02-22 | 1984-02-22 | Integrated circuit that eliminates latch-up and analog signal error due to current injected from the substrate |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| IT8547666A0 IT8547666A0 (it) | 1985-02-12 |
| IT8547666A1 true IT8547666A1 (it) | 1986-08-12 |
| IT1182188B IT1182188B (it) | 1987-09-30 |
Family
ID=24328819
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT47666/85A IT1182188B (it) | 1984-02-22 | 1985-02-12 | Procedimento per eliminare il latchup e gli errori nei segnali analogici dovuti ad iniezione di corrente dal substrato in circuiti integrati con transistore di uscita di potenza verticale, e relativi circuiti integrati |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4581547A (it) |
| EP (1) | EP0172174A1 (it) |
| IT (1) | IT1182188B (it) |
| WO (1) | WO1985003808A1 (it) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4933573A (en) * | 1987-09-18 | 1990-06-12 | Fuji Electric Co., Ltd. | Semiconductor integrated circuit |
| US4812891A (en) * | 1987-12-17 | 1989-03-14 | Maxim Integrated Products | Bipolar lateral pass-transistor for CMOS circuits |
| US4999585A (en) * | 1989-11-06 | 1991-03-12 | Burr-Brown Corporation | Circuit technique for cancelling non-linear capacitor-induced harmonic distortion |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1764234A1 (de) * | 1968-04-27 | 1971-07-01 | Bosch Gmbh Robert | Monolithische Halbleiteranordnung mit integrierten Leistungstransistoren,insbesondere als Spannungsregler fuer Fahrzeuglichtmaschinen |
| US3821784A (en) * | 1972-07-10 | 1974-06-28 | Univ California | Switching transistor with memory |
| DE2514466B2 (de) * | 1975-04-03 | 1977-04-21 | Ibm Deutschland Gmbh, 7000 Stuttgart | Integrierte halbleiterschaltung |
| US4147992A (en) * | 1977-12-27 | 1979-04-03 | Motorola, Inc. | Amplifier circuit having a high degree of common mode rejection |
| US4345166A (en) * | 1979-09-28 | 1982-08-17 | Motorola, Inc. | Current source having saturation protection |
-
1984
- 1984-02-22 US US06/582,356 patent/US4581547A/en not_active Expired - Lifetime
- 1984-12-07 WO PCT/US1984/002001 patent/WO1985003808A1/en unknown
- 1984-12-07 EP EP85900381A patent/EP0172174A1/en not_active Withdrawn
-
1985
- 1985-02-12 IT IT47666/85A patent/IT1182188B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| IT1182188B (it) | 1987-09-30 |
| EP0172174A1 (en) | 1986-02-26 |
| IT8547666A0 (it) | 1985-02-12 |
| US4581547A (en) | 1986-04-08 |
| WO1985003808A1 (en) | 1985-08-29 |
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