IT8323690A0 - POLYCRYSTALLINE SILICON LAYERS FOR SEMICONDUCTOR DEVICES. - Google Patents

POLYCRYSTALLINE SILICON LAYERS FOR SEMICONDUCTOR DEVICES.

Info

Publication number
IT8323690A0
IT8323690A0 IT8323690A IT2369083A IT8323690A0 IT 8323690 A0 IT8323690 A0 IT 8323690A0 IT 8323690 A IT8323690 A IT 8323690A IT 2369083 A IT2369083 A IT 2369083A IT 8323690 A0 IT8323690 A0 IT 8323690A0
Authority
IT
Italy
Prior art keywords
semiconductor devices
polycrystalline silicon
silicon layers
layers
polycrystalline
Prior art date
Application number
IT8323690A
Other languages
Italian (it)
Other versions
IT1171797B (en
Inventor
Alois Erhard Widmer
Gunther Harbeke
Liselotte Krausbauer
Edgar Felix Steigmeier
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8323690A0 publication Critical patent/IT8323690A0/en
Application granted granted Critical
Publication of IT1171797B publication Critical patent/IT1171797B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)
IT23690/83A 1982-11-12 1983-11-11 POLYCRYSTALLINE SILICON LAYERS FOR SEMICONDUCTOR DEVICES IT1171797B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US44137182A 1982-11-12 1982-11-12

Publications (2)

Publication Number Publication Date
IT8323690A0 true IT8323690A0 (en) 1983-11-11
IT1171797B IT1171797B (en) 1987-06-10

Family

ID=23752618

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23690/83A IT1171797B (en) 1982-11-12 1983-11-11 POLYCRYSTALLINE SILICON LAYERS FOR SEMICONDUCTOR DEVICES

Country Status (6)

Country Link
JP (1) JPH0652715B2 (en)
DE (1) DE3340584A1 (en)
FR (1) FR2536210B1 (en)
GB (1) GB2130009B (en)
IT (1) IT1171797B (en)
SE (1) SE500463C2 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4504521A (en) * 1984-03-22 1985-03-12 Rca Corporation LPCVD Deposition of tantalum silicide
GB8504725D0 (en) * 1985-02-23 1985-03-27 Standard Telephones Cables Ltd Integrated circuits
US4789883A (en) * 1985-12-17 1988-12-06 Advanced Micro Devices, Inc. Integrated circuit structure having gate electrode and underlying oxide and method of making same
EP0253014B1 (en) * 1986-07-18 1990-04-11 Nippondenso Co., Ltd. Method of manufacturing a monvolatile semiconductor memory apparatus with writing and erasing capability
GB2204066A (en) * 1987-04-06 1988-11-02 Philips Electronic Associated A method for manufacturing a semiconductor device having a layered structure
JP2690917B2 (en) * 1987-12-07 1997-12-17 株式会社日立製作所 Thin film forming method and semiconductor device manufacturing method
FR2627012B1 (en) * 1988-02-10 1990-06-01 France Etat METHOD FOR DEPOSITING A POLYCRYSTALLINE LAYER WITH LARGE GRAIN, LAYER OBTAINED AND TRANSISTOR PROVIDED WITH SUCH A LAYER
DE69030864T2 (en) * 1989-12-01 1997-11-13 Texas Instruments Inc Process of in-situ doping of deposited silicon
US5366917A (en) * 1990-03-20 1994-11-22 Nec Corporation Method for fabricating polycrystalline silicon having micro roughness on the surface
JP2508948B2 (en) * 1991-06-21 1996-06-19 日本電気株式会社 Method for manufacturing semiconductor device
GB2290908B (en) * 1991-09-07 1996-05-01 Samsung Electronics Co Ltd Semiconductor memory device
KR960026821A (en) * 1994-12-20 1996-07-22 김주용 Capacitor Manufacturing Method
JP4003888B2 (en) * 1995-06-06 2007-11-07 旭化成エレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
US5733641A (en) * 1996-05-31 1998-03-31 Xerox Corporation Buffered substrate for semiconductor devices
US6970644B2 (en) 2000-12-21 2005-11-29 Mattson Technology, Inc. Heating configuration for use in thermal processing chambers
US7015422B2 (en) 2000-12-21 2006-03-21 Mattson Technology, Inc. System and process for heating semiconductor wafers by optimizing absorption of electromagnetic energy

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS558815B2 (en) * 1973-06-29 1980-03-06
DE2536174C3 (en) * 1975-08-13 1983-11-03 Siemens AG, 1000 Berlin und 8000 München Process for producing polycrystalline silicon layers for semiconductor components
JPS5249782A (en) * 1975-10-20 1977-04-21 Fujitsu Ltd Process for production of semiconductor device
US4179528A (en) * 1977-05-18 1979-12-18 Eastman Kodak Company Method of making silicon device with uniformly thick polysilicon
FR2394173A1 (en) * 1977-06-06 1979-01-05 Thomson Csf METHOD OF MANUFACTURING ELECTRONIC DEVICES WHICH INCLUDE A THIN LAYER OF AMORPHIC SILICON AND AN ELECTRONIC DEVICE OBTAINED BY SUCH A PROCESS
JPS5423386A (en) * 1977-07-22 1979-02-21 Hitachi Ltd Manufacture of semiconductor device
JPS5617083A (en) * 1979-07-20 1981-02-18 Hitachi Ltd Semiconductor device and its manufacture
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor

Also Published As

Publication number Publication date
GB2130009A (en) 1984-05-23
DE3340584A1 (en) 1984-05-17
SE8306070L (en) 1984-05-13
SE500463C2 (en) 1994-06-27
JPH0652715B2 (en) 1994-07-06
DE3340584C2 (en) 1993-02-11
GB2130009B (en) 1986-04-03
IT1171797B (en) 1987-06-10
FR2536210A1 (en) 1984-05-18
GB8329381D0 (en) 1983-12-07
JPS59100561A (en) 1984-06-09
FR2536210B1 (en) 1986-03-28
SE8306070D0 (en) 1983-11-04

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971125